Commit 5a668651 authored by Paul Mundt's avatar Paul Mundt

sh: Split out PXSEG segmentation per-CPU family.

The CPU family abstraction already exists, so move out the PXSEG
definition for each one. SH-2A already has this special cased,
and SH-5 will as well.
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 39d28a2d
......@@ -9,24 +9,13 @@
*/
#ifndef __ASM_SH_ADDRSPACE_H
#define __ASM_SH_ADDRSPACE_H
#ifdef __KERNEL__
#include <asm/cpu/addrspace.h>
/* Memory segments (32bit Privileged mode addresses) */
#ifndef CONFIG_CPU_SH2A
#define P0SEG 0x00000000
#define P1SEG 0x80000000
#define P2SEG 0xa0000000
#define P3SEG 0xc0000000
#define P4SEG 0xe0000000
#else
#define P0SEG 0x00000000
#define P1SEG 0x00000000
#define P2SEG 0x20000000
#define P3SEG 0x00000000
#define P4SEG 0x80000000
#endif
/* If this CPU supports segmentation, hook up the helpers */
#ifdef P1SEG
/* Returns the privileged segment base of a given address */
#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000)
......@@ -37,10 +26,16 @@
/*
* Map an address to a certain privileged segment
*/
#define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG))
#define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG))
#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
#define P1SEGADDR(a) \
((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG))
#define P2SEGADDR(a) \
((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG))
#define P3SEGADDR(a) \
((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
#define P4SEGADDR(a) \
((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
#endif /* P1SEG */
#endif /* __KERNEL__ */
#endif /* __ASM_SH_ADDRSPACE_H */
......@@ -10,7 +10,10 @@
#ifndef __ASM_CPU_SH2_ADDRSPACE_H
#define __ASM_CPU_SH2_ADDRSPACE_H
/* Should fill here */
#define P0SEG 0x00000000
#define P1SEG 0x80000000
#define P2SEG 0xa0000000
#define P3SEG 0xc0000000
#define P4SEG 0xe0000000
#endif /* __ASM_CPU_SH2_ADDRSPACE_H */
#include <asm/cpu-sh2/addrspace.h>
#ifndef __ASM_SH_CPU_SH2A_ADDRSPACE_H
#define __ASM_SH_CPU_SH2A_ADDRSPACE_H
#define P0SEG 0x00000000
#define P1SEG 0x00000000
#define P2SEG 0x20000000
#define P3SEG 0x00000000
#define P4SEG 0x80000000
#endif /* __ASM_SH_CPU_SH2A_ADDRSPACE_H */
......@@ -10,7 +10,10 @@
#ifndef __ASM_CPU_SH3_ADDRSPACE_H
#define __ASM_CPU_SH3_ADDRSPACE_H
/* Should fill here */
#define P0SEG 0x00000000
#define P1SEG 0x80000000
#define P2SEG 0xa0000000
#define P3SEG 0xc0000000
#define P4SEG 0xe0000000
#endif /* __ASM_CPU_SH3_ADDRSPACE_H */
......@@ -10,6 +10,12 @@
#ifndef __ASM_CPU_SH4_ADDRSPACE_H
#define __ASM_CPU_SH4_ADDRSPACE_H
#define P0SEG 0x00000000
#define P1SEG 0x80000000
#define P2SEG 0xa0000000
#define P3SEG 0xc0000000
#define P4SEG 0xe0000000
/* Detailed P4SEG */
#define P4SEG_STORE_QUE (P4SEG)
#define P4SEG_IC_ADDR 0xf0000000
......
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