Commit 5af81c6e authored by Kevin Wang's avatar Kevin Wang Committed by Alex Deucher

drm/amdgpu: add aldebaran sdma firmware support (v2)

add sdma firmware load support for soc model

v2: drop some emulator leftovers (Alex)
Signed-off-by: default avatarKevin Wang <kevin1.wang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarLe Ma <Le.Ma@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 36e22d59
...@@ -564,7 +564,8 @@ static void sdma_v4_0_destroy_inst_ctx(struct amdgpu_device *adev) ...@@ -564,7 +564,8 @@ static void sdma_v4_0_destroy_inst_ctx(struct amdgpu_device *adev)
/* arcturus shares the same FW memory across /* arcturus shares the same FW memory across
all SDMA isntances */ all SDMA isntances */
if (adev->asic_type == CHIP_ARCTURUS) if (adev->asic_type == CHIP_ARCTURUS ||
adev->asic_type == CHIP_ALDEBARAN)
break; break;
} }
...@@ -639,8 +640,9 @@ static int sdma_v4_0_init_microcode(struct amdgpu_device *adev) ...@@ -639,8 +640,9 @@ static int sdma_v4_0_init_microcode(struct amdgpu_device *adev)
goto out; goto out;
for (i = 1; i < adev->sdma.num_instances; i++) { for (i = 1; i < adev->sdma.num_instances; i++) {
if (adev->asic_type == CHIP_ARCTURUS) { if (adev->asic_type == CHIP_ARCTURUS ||
/* Acturus will leverage the same FW memory adev->asic_type == CHIP_ALDEBARAN) {
/* Acturus & Aldebaran will leverage the same FW memory
for every SDMA instance */ for every SDMA instance */
memcpy((void *)&adev->sdma.instance[i], memcpy((void *)&adev->sdma.instance[i],
(void *)&adev->sdma.instance[0], (void *)&adev->sdma.instance[0],
...@@ -2575,6 +2577,10 @@ static void sdma_v4_0_set_irq_funcs(struct amdgpu_device *adev) ...@@ -2575,6 +2577,10 @@ static void sdma_v4_0_set_irq_funcs(struct amdgpu_device *adev)
adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1; adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1;
adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1; adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1;
break; break;
case 5:
adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE5;
adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE5;
break;
case 8: case 8:
adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST; adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_LAST; adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
......
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