Commit 5bb4ee47 authored by Paul Mackerras's avatar Paul Mackerras

Merge bk://stop.crashing.org/linux-2.5-obsolete

into samba.org:/home/paulus/kernel/for-linus-ppc
parents 3cf09fdd c5bddde0
......@@ -450,9 +450,6 @@ config EV64260
config SPRUCE
bool "IBM-Spruce"
config MENF1
bool "MEN-F1"
config LOPEC
bool "Motorola-LoPEC"
......@@ -490,9 +487,6 @@ config GEMINI
series Single Board Computer. More information is available at:
<http://www.synergymicro.com/PressRel/97_10_15.html>.
config ZX4500
bool "Zynx-ZX4500"
endchoice
config PPC_CHRP
......@@ -536,7 +530,7 @@ config WILLOW
config MPC10X_STORE_GATHERING
bool "Enable MPC10x store gathering"
depends on FORCE || MENF1 || SANDPOINT || ZX4500
depends on FORCE || SANDPOINT
config GT64260
bool
......@@ -1528,7 +1522,7 @@ config BOOTX_TEXT
config SERIAL_TEXT_DEBUG
bool "Support for early boot texts over serial port"
depends on 4xx || GT64260 || LOPEC || MCPN765 || PPLUS || PRPMC800 || SANDPOINT || ZX4500
depends on 4xx || GT64260 || LOPEC || MCPN765 || PPLUS || PRPMC800 || SANDPOINT
config OCP
bool
......
......@@ -61,12 +61,6 @@ ZIMAGEINITRD := zImage.initrd-STRIPELF
END := gemini
TFTPIMAGE := /tftpboot/zImage.$(END)
endif
ifeq ($(CONFIG_MENF1),y)
ZIMAGE := zImage-MENF1
ZIMAGEINITRD := zImage.initrd-MENF1
EXTRA := chrpmap.o
TFTPIMAGE := /tftpboot/zImage.menf1
endif
ifeq ($(CONFIG_K2),y)
EXTRA := legacy.o
TFTPIMAGE := /tftpboot/zImage.k2
......@@ -101,12 +95,6 @@ ENTRYPOINT := 0x00800000
MISC := misc-spruce.o
TFTPIMAGE := /tftpboot/zImage.$(END)
endif
ifeq ($(CONFIG_ZX4500),y)
ZIMAGE := zImage-STRIPELF
ZIMAGEINITRD := zImage.initrd-STRIPELF
END := zx4500
TFTPIMAGE := /tftpboot/zImage.$(END)
endif
ifeq ($(CONFIG_SMP),y)
TFTPIMAGE += .smp
endif
......@@ -208,12 +196,6 @@ $(images)/zImage.initrd-TREE: $(obj)/zvmlinux.initrd $(MKTREE)
$(MKTREE) $(obj)/zvmlinux.initrd $(images)/zImage.initrd.$(END) \
$(ENTRYPOINT)
$(images)/zImage-MENF1: $(obj)/zvmlinux $(MKPREP)
$(MKPREP) -pbp $(obj)/zvmlinux $(images)/zImage.menf1
$(images)/zImage.initrd-MENF1: $(obj)/zvmlinux.initrd $(MKPREP)
$(MKPREP) -pbp $(obj)/zvmlinux.initrd $(images)/zImage.initrd.menf1
$(images)/zImage-PPLUS: $(obj)/zvmlinux $(MKPREP) $(MKBUGBOOT)
$(MKPREP) -pbp $(obj)/zvmlinux $(images)/zImage.pplus
$(MKBUGBOOT) $(obj)/zvmlinux $(images)/zImage.bugboot
......
......@@ -55,7 +55,6 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -67,7 +66,6 @@ CONFIG_ADIR=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_ALTIVEC is not set
......
......@@ -56,7 +56,6 @@ CONFIG_APUS=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -68,7 +67,6 @@ CONFIG_APUS=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_ALTIVEC is not set
......
......@@ -56,7 +56,6 @@ CONFIG_PPC_MULTIPLATFORM=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -68,7 +67,6 @@ CONFIG_PPC_MULTIPLATFORM=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
CONFIG_PPC_CHRP=y
CONFIG_PPC_PMAC=y
CONFIG_PPC_PREP=y
......
......@@ -55,7 +55,6 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_POWERPMC250 is not set
CONFIG_EV64260=y
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -67,7 +66,6 @@ CONFIG_EV64260=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
CONFIG_GT64260=y
CONFIG_SERIAL_CONSOLE_BAUD=115200
# CONFIG_SMP is not set
......
......@@ -55,7 +55,6 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -67,7 +66,6 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
CONFIG_GEMINI=y
# CONFIG_ZX4500 is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
CONFIG_ALTIVEC=y
......
......@@ -55,7 +55,6 @@ CONFIG_PPC_MULTIPLATFORM=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -67,7 +66,6 @@ CONFIG_PPC_MULTIPLATFORM=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
CONFIG_PPC_CHRP=y
CONFIG_PPC_PMAC=y
CONFIG_PPC_PREP=y
......
......@@ -55,7 +55,6 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -67,7 +66,6 @@ CONFIG_PPC_STD_MMU=y
CONFIG_K2=y
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
# CONFIG_CPC710_DATA_GATHERING is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
......
......@@ -55,7 +55,6 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
CONFIG_LOPEC=y
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -67,7 +66,6 @@ CONFIG_LOPEC=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
CONFIG_EPIC_SERIAL_MODE=y
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
......
......@@ -50,7 +50,6 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
CONFIG_MCPN765=y
# CONFIG_MVME5100 is not set
......@@ -62,7 +61,6 @@ CONFIG_MCPN765=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
CONFIG_ALTIVEC=y
......
......@@ -67,7 +67,6 @@ CONFIG_MENF1=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
CONFIG_MPC10X_STORE_GATHERING=y
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
......
......@@ -55,7 +55,6 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
CONFIG_MVME5100=y
......@@ -67,7 +66,6 @@ CONFIG_MVME5100=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
# CONFIG_MVME5100_IPMC761_PRESENT is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
......
......@@ -55,7 +55,6 @@ CONFIG_PCORE=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -67,7 +66,6 @@ CONFIG_PCORE=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
CONFIG_FORCE=y
# CONFIG_MPC10X_STORE_GATHERING is not set
# CONFIG_SMP is not set
......
......@@ -57,7 +57,6 @@ CONFIG_PPC_MULTIPLATFORM=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -69,7 +68,6 @@ CONFIG_PPC_MULTIPLATFORM=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
CONFIG_PPC_CHRP=y
CONFIG_PPC_PMAC=y
CONFIG_PPC_PREP=y
......
......@@ -55,7 +55,6 @@ CONFIG_PPC_MULTIPLATFORM=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -67,7 +66,6 @@ CONFIG_PPC_MULTIPLATFORM=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
CONFIG_PPC_CHRP=y
CONFIG_PPC_PMAC=y
CONFIG_PPC_PREP=y
......
......@@ -55,7 +55,6 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -67,7 +66,6 @@ CONFIG_PPLUS=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_ALTIVEC is not set
......
......@@ -55,7 +55,6 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -67,7 +66,6 @@ CONFIG_PRPMC750=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_ALTIVEC is not set
......
......@@ -55,7 +55,6 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -67,7 +66,6 @@ CONFIG_PRPMC800=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_ALTIVEC is not set
......
......@@ -55,7 +55,6 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -67,7 +66,6 @@ CONFIG_SANDPOINT=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
CONFIG_SANDPOINT_X3=y
CONFIG_EPIC_SERIAL_MODE=y
# CONFIG_MPC10X_STORE_GATHERING is not set
......
......@@ -55,7 +55,6 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
CONFIG_SPRUCE=y
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -67,7 +66,6 @@ CONFIG_SPRUCE=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
# CONFIG_SPRUCE_BAUD_33M is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
......
#
# Automatically generated make config: don't edit
#
CONFIG_MMU=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_HAVE_DEC_LOCK=y
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
#
# General setup
#
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_EMBEDDED=y
CONFIG_FUTEX=y
# CONFIG_EPOLL is not set
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y
#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_6xx=y
# CONFIG_40x is not set
# CONFIG_POWER3 is not set
# CONFIG_8xx is not set
#
# IBM 4xx options
#
# CONFIG_8260 is not set
CONFIG_GENERIC_ISA_DMA=y
CONFIG_PPC_STD_MMU=y
# CONFIG_PPC_MULTIPLATFORM is not set
# CONFIG_APUS is not set
# CONFIG_WILLOW_2 is not set
# CONFIG_PCORE is not set
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
# CONFIG_PPLUS is not set
# CONFIG_PRPMC750 is not set
# CONFIG_PRPMC800 is not set
# CONFIG_SANDPOINT is not set
# CONFIG_ADIR is not set
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
CONFIG_ZX4500=y
# CONFIG_MPC10X_STORE_GATHERING is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_ALTIVEC is not set
# CONFIG_TAU is not set
# CONFIG_CPU_FREQ is not set
#
# General setup
#
# CONFIG_HIGHMEM is not set
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
CONFIG_BINFMT_MISC=y
# CONFIG_PCI_LEGACY_PROC is not set
CONFIG_PCI_NAMES=y
# CONFIG_HOTPLUG is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC601_SYNC_FIX=y
# CONFIG_CMDLINE_BOOL is not set
#
# Advanced setup
#
# CONFIG_ADVANCED_OPTIONS is not set
#
# Default settings for advanced configuration options are used
#
CONFIG_HIGHMEM_START=0xfe000000
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_KERNEL_START=0xc0000000
CONFIG_TASK_SIZE=0x80000000
CONFIG_BOOT_LOAD=0x00800000
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Plug and Play support
#
# CONFIG_PNP is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NBD=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=16384
CONFIG_BLK_DEV_INITRD=y
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI support
#
# CONFIG_SCSI is not set
#
# Fusion MPT device support
#
#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
# CONFIG_I2O is not set
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
# CONFIG_XFRM_USER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_LLC is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
# CONFIG_OAKNET is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
#
# Tulip family network device support
#
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
CONFIG_NET_PCI=y
# CONFIG_PCNET32 is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_B44 is not set
# CONFIG_DGRS is not set
CONFIG_EEPRO100=y
# CONFIG_EEPRO100_PIO is not set
# CONFIG_E100 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_IXGB is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Token Ring devices (depends on LLC=y)
#
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set
#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set
#
# ISDN subsystem
#
# CONFIG_ISDN_BOOL is not set
#
# Graphics support
#
# CONFIG_FB is not set
#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set
#
# Input device support
#
# CONFIG_INPUT is not set
#
# Userland interfaces
#
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
# CONFIG_SERIO is not set
#
# Input Device Drivers
#
#
# Macintosh device drivers
#
#
# Character devices
#
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
#
# I2C support
#
# CONFIG_I2C is not set
#
# I2C Hardware Sensors Mainboard support
#
#
# I2C Hardware Sensors Chip support
#
# CONFIG_I2C_SENSOR is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
CONFIG_GEN_RTC=y
# CONFIG_GEN_RTC_X is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
# CONFIG_EXT3_FS_SECURITY is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# CD-ROM/DVD Filesystems
#
CONFIG_ISO9660_FS=y
# CONFIG_JOLIET is not set
# CONFIG_ZISOFS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_FAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_DEVFS_FS=y
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_DEVPTS_FS_XATTR is not set
CONFIG_TMPFS=y
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
# CONFIG_NFSD_TCP is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_GSS is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB is not set
# CONFIG_USB_GADGET is not set
#
# Bluetooth support
#
# CONFIG_BT is not set
#
# Library routines
#
# CONFIG_CRC32 is not set
#
# Kernel hacking
#
# CONFIG_DEBUG_KERNEL is not set
# CONFIG_KALLSYMS is not set
CONFIG_SERIAL_TEXT_DEBUG=y
#
# Security options
#
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
......@@ -56,7 +56,6 @@ CONFIG_PPC_MULTIPLATFORM=y
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_MENF1 is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
......@@ -68,7 +67,6 @@ CONFIG_PPC_MULTIPLATFORM=y
# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
CONFIG_PPC_CHRP=y
CONFIG_PPC_PMAC=y
CONFIG_PPC_PREP=y
......
......@@ -45,7 +45,6 @@ obj-$(CONFIG_PRPMC750) += prpmc750_setup.o prpmc750_pci.o
obj-$(CONFIG_PRPMC800) += prpmc800_setup.o prpmc800_pci.o
obj-$(CONFIG_SANDPOINT) += sandpoint_setup.o sandpoint_pci.o
obj-$(CONFIG_SPRUCE) += spruce_setup.o spruce_pci.o
obj-$(CONFIG_ZX4500) += zx4500_setup.o zx4500_pci.o
ifeq ($(CONFIG_SMP),y)
obj-$(CONFIG_PPC_PMAC) += pmac_smp.o
......
/*
* arch/ppc/platforms/menf1.h
*
* Definitions for MEN F1 board support
*
* Author: Matt Porter <mporter@mvista.com>
*
* 2001 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#ifndef __PPC_PLATFORMS_MENF1_H
#define __PPC_PLATFORMS_MENF1_H
#define MENF1_NVRAM_AS0 0x70
#define MENF1_NVRAM_AS1 0x72
#define MENF1_NVRAM_DATA 0x71
#define MENF1_IDE0_BASE_ADDR 0x1f0
#define MENF1_IDE1_BASE_ADDR 0x170
#endif /* __PPC_PLATFORMS_MENF1_H */
/*
* arch/ppc/platforms/menf1_pci.c
*
* PCI support for MEN F1
*
* Author: Matt Porter <mporter@mvista.com>
*
* 2001 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <asm/mpc10x.h>
#include "menf1.h"
#undef DEBUG
#ifdef DEBUG
#define DBG(x...) printk(x)
#else
#define DBG(x...)
#endif /* DEBUG */
static inline int __init
menf1_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
{10, 11, 7, 9}, /* IDSEL 26 - PCMIP 0 */
{0, 0, 0, 0}, /* IDSEL 27 - M5229 IDE */
{0, 0, 0, 0}, /* IDSEL 28 - M7101 PMU */
{9, 10, 11, 7}, /* IDSEL 29 - PCMIP 1 */
{10, 11, 7, 9}, /* IDSEL 30 - P2P Bridge */
};
const long min_idsel = 26, max_idsel = 30, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
};
static int
menf1_exclude_device(u_char bus, u_char devfn)
{
if ((bus == 0) && (devfn == 0xe0)) {
return PCIBIOS_DEVICE_NOT_FOUND;
}
else {
return PCIBIOS_SUCCESSFUL;
}
}
void __init
menf1_find_bridges(void)
{
struct pci_controller* hose;
hose = pcibios_alloc_controller();
if (!hose)
return;
hose->first_busno = 0;
hose->last_busno = 0xff;
ppc_md.pci_exclude_device = menf1_exclude_device;
mpc10x_bridge_init(hose,
MPC10X_MEM_MAP_B,
MPC10X_MEM_MAP_B,
MPC10X_MAPB_EUMB_BASE);
hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
{
/* Add ISA bus wait states */
unsigned char isa_control;
early_read_config_byte(hose, 0, 0x90, 0x43, &isa_control);
isa_control |= 0x33;
early_write_config_byte(hose, 0, 0x90, 0x43, isa_control);
}
ppc_md.pci_swizzle = common_swizzle;
ppc_md.pci_map_irq = menf1_map_irq;
}
/*
* arch/ppc/platforms/menf1_setup.c
*
* Board setup routines for MEN F1
*
* Author: Matt Porter <mporter@mvista.com>
*
* 2001 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#include <linux/config.h>
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/reboot.h>
#include <linux/pci.h>
#include <linux/kdev_t.h>
#include <linux/types.h>
#include <linux/major.h>
#include <linux/initrd.h>
#include <linux/console.h>
#include <linux/delay.h>
#include <linux/ide.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/dma.h>
#include <asm/io.h>
#include <asm/machdep.h>
#include <asm/time.h>
#include <asm/i8259.h>
#include <asm/mpc10x.h>
#include <asm/todc.h>
#include <asm/bootinfo.h>
#include "menf1.h"
extern void menf1_find_bridges(void);
extern unsigned long loops_per_jiffy;
/* Dummy variable to satisfy mpc10x_common.o */
void *OpenPIC_Addr;
static int
menf1_show_cpuinfo(struct seq_file *m)
{
seq_printf(m, "machine\t\t: MEN F1\n");
return 0;
}
static void __init
menf1_setup_arch(void)
{
/* init to some ~sane value until calibrate_delay() runs */
loops_per_jiffy = 50000000/HZ;
/* Lookup PCI host bridges */
menf1_find_bridges();
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#endif
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDA2;
#endif
#ifdef CONFIG_DUMMY_CONSOLE
conswitchp = &dummy_con;
#endif
printk("MEN F1 port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n");
}
static void
menf1_restart(char *cmd)
{
int picr1;
struct pci_dev *pdev;
local_irq_disable();
/*
* Firmware doesn't like re-entry using Map B (CHRP), so make sure the
* PCI bridge is using MAP A (PReP).
*/
pdev = pci_find_slot(0, PCI_DEVFN(0,0));
while(pdev == NULL); /* paranoia */
pci_read_config_dword(pdev, MPC10X_CFG_PICR1_REG, &picr1);
picr1 = (picr1 & ~MPC10X_CFG_PICR1_ADDR_MAP_MASK) |
MPC10X_CFG_PICR1_ADDR_MAP_A;
pci_write_config_dword(pdev, MPC10X_CFG_PICR1_REG, picr1);
asm volatile("sync");
/* SRR0 has system reset vector, SRR1 has default MSR value */
/* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
__asm__ __volatile__
("\n\
lis 3,0xfff0
ori 3,3,0x0100
mtspr 26,3
li 3,0
mtspr 27,3
rfi
");
while(1);
}
static void
menf1_halt(void)
{
local_irq_disable();
while (1);
}
static void
menf1_power_off(void)
{
menf1_halt();
}
static void __init
menf1_init_IRQ(void)
{
int i;
for ( i = 0 ; i < NUM_8259_INTERRUPTS ; i++ )
irq_desc[i].handler = &i8259_pic;
i8259_init(NULL);
}
/*
* Set BAT 3 to map 0xF0000000.
*/
static __inline__ void
menf1_set_bat(void)
{
static int mapping_set = 0;
if (!mapping_set)
{
/* wait for all outstanding memory accesses to complete */
mb();
/* setup DBATs */
mtspr(DBAT3U, 0xf0001ffe);
mtspr(DBAT3L, 0xf000002a);
/* wait for updates */
mb();
mapping_set = 1;
}
return;
}
static unsigned long __init
menf1_find_end_of_memory(void)
{
/* Cover the I/O with a BAT */
menf1_set_bat();
/* Read the memory size from the MPC107 SMC */
return mpc10x_get_mem_size(MPC10X_MEM_MAP_B);
}
static void __init
menf1_map_io(void)
{
io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO);
}
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
/* IDE functions */
static void __init
menf1_ide_init_hwif_ports (hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
unsigned long reg = data_port;
int i = 8;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
reg += 1;
}
if (ctrl_port)
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
else
hw->io_ports[IDE_CONTROL_OFFSET] =
hw->io_ports[IDE_DATA_OFFSET] + 0x206;
if (irq != NULL)
*irq = 0;
}
static int
menf1_ide_default_irq(unsigned long base)
{
if (base == MENF1_IDE0_BASE_ADDR)
return 14;
else if (base == MENF1_IDE1_BASE_ADDR)
return 15;
else
return 0;
}
static unsigned long
menf1_ide_default_io_base(int index)
{
if (index == 0)
return MENF1_IDE0_BASE_ADDR;
else if (index == 1)
return MENF1_IDE1_BASE_ADDR;
else
return 0;
}
#endif
TODC_ALLOC();
void __init
platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
parse_bootinfo(find_bootinfo());
isa_io_base = MPC10X_MAPB_ISA_IO_BASE;
isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE;
pci_dram_offset = MPC10X_MAPB_DRAM_OFFSET;
ppc_md.setup_arch = menf1_setup_arch;
ppc_md.show_cpuinfo = menf1_show_cpuinfo;
ppc_md.init_IRQ = menf1_init_IRQ;
ppc_md.get_irq = i8259_irq;
ppc_md.find_end_of_memory = menf1_find_end_of_memory;
ppc_md.setup_io_mappings = menf1_map_io;
ppc_md.restart = menf1_restart;
ppc_md.power_off = menf1_power_off;
ppc_md.halt = menf1_halt;
TODC_INIT(TODC_TYPE_MK48T59,
MENF1_NVRAM_AS0,
MENF1_NVRAM_AS1,
MENF1_NVRAM_DATA,
7);
ppc_md.time_init = todc_time_init;
ppc_md.get_rtc_time = todc_get_rtc_time;
ppc_md.set_rtc_time = todc_set_rtc_time;
ppc_md.calibrate_decr = todc_calibrate_decr;
ppc_md.nvram_read_val = todc_m48txx_read_val;
ppc_md.nvram_write_val = todc_m48txx_write_val;
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
ppc_ide_md.default_io_base = menf1_ide_default_io_base;
ppc_ide_md.default_irq = menf1_ide_default_irq;
ppc_ide_md.ide_init_hwif = menf1_ide_init_hwif_ports;
#endif
}
/* * arch/ppc/platforms/zx4500.h
*
* Board setup routines for Znyx ZX4500 cPCI board.
*
* Author: Mark A. Greer
* mgreer@mvista.com
*
* 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#ifndef __PPC_PLATFORMS_ZX4500_H_
#define __PPC_PLATFORMS_ZX4500_H_
/*
* Define the addresses of CPLD registers in CLPD area.
*/
#define ZX4500_CPLD_BOARD_ID 0xff800001
#define ZX4500_CPLD_REV 0xff800002
#define ZX4500_CPLD_RESET 0xff800011
#define ZX4500_CPLD_PHY1 0xff800014
#define ZX4500_CPLD_PHY2 0xff800015
#define ZX4500_CPLD_PHY3 0xff800016
#define ZX4500_CPLD_SYSCTL 0xff800017
#define ZX4500_CPLD_EXT_FLASH 0xff800018
#define ZX4500_CPLD_DUAL1 0xff800019
#define ZX4500_CPLD_DUAL2 0xff80001A
#define ZX4500_CPLD_STATUS 0xff800030
#define ZX4500_CPLD_STREAM 0xff800032
#define ZX4500_CPLD_PHY1_LED 0xff800034
#define ZX4500_CPLD_PHY2_LED 0xff800035
#define ZX4500_CPLD_PHY3_LED 0xff800036
#define ZX4500_CPLD_PHY1_LNK 0xff80003C
#define ZX4500_CPLD_PHY2_LNK 0xff80003D
#define ZX4500_CPLD_PHY3_LNK 0xff80003E
#define ZX4500_CPLD_RESET_SOFT 0x01 /* Soft Reset */
#define ZX4500_CPLD_RESET_XBUS 0x40 /* Reset entire board */
#define ZX4500_CPLD_SYSCTL_PMC 0x01 /* Enable INTA/B/C/D from PMC */
#define ZX4500_CPLD_SYSCTL_BCM 0x04 /* Enable INTA from BCM */
#define ZX4500_CPLD_SYSCTL_SINTA 0x08 /* Enable SINTA from 21554 */
#define ZX4500_CPLD_SYSCTL_WD 0x20 /* Enable Watchdog Timer */
#define ZX4500_CPLD_SYSCTL_PMC_TRI 0x80 /* Tri-state PMC EREADY */
#define ZX4500_CPLD_DUAL2_LED_PULL 0x01 /* Pull LED */
#define ZX4500_CPLD_DUAL2_LED_EXT_FAULT 0x02 /* External Fault LED */
#define ZX4500_CPLD_DUAL2_LED_INT_FAULT 0x04 /* Internal Fault LED */
#define ZX4500_CPLD_DUAL2_LED_OK 0x08 /* OK LED */
#define ZX4500_CPLD_DUAL2_LED_CLK 0x10 /* CLK LED */
/*
* Defines related to boot string stored in flash.
*/
#define ZX4500_BOOT_STRING_ADDR 0xfff7f000
#define ZX4500_BOOT_STRING_LEN 80
/*
* Define the IDSEL that the PCI bus side of the 8240 is connected to.
* This IDSEL must not be selected from the 8240 processor side.
*/
#define ZX4500_HOST_BRIDGE_IDSEL 20
void zx4500_find_bridges(void);
#endif /* __PPC_PLATFORMS_ZX4500_H_ */
/*
* arch/ppc/platforms/zx4500_pci.c
*
* PCI setup routines for Znyx ZX4500 cPCI boards.
*
* Author: Mark A. Greer
* mgreer@mvista.com
*
* 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/machdep.h>
#include <asm/mpc10x.h>
#include <asm/pci-bridge.h>
#include "zx4500.h"
/*
* Znyx ZX4500 interrupt routes.
*/
static inline int
zx4500_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
{ 19, 0, 0, 0 }, /* IDSEL 21 - 21554 PCI-cPCI bridge */
{ 18, 0, 0, 0 }, /* IDSEL 22 - BCM5600 INTA */
{ 16, 20, 16, 20 }, /* IDSEL 23 - PPMC Slot */
};
const long min_idsel = 21, max_idsel = 23, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
}
void __init
zx4500_board_init(struct pci_controller *hose)
{
uint val;
u_char sysctl;
/*
* CPLD Registers are mapped in by BAT 3 in zx4500_setup_arch().
*
* Turn off all interrupts routed through the CPLD.
* Also, turn off watchdog timer and drive PMC EREADY low.
*/
sysctl = in_8((volatile u_char *)ZX4500_CPLD_SYSCTL);
sysctl &= ~(ZX4500_CPLD_SYSCTL_PMC |
ZX4500_CPLD_SYSCTL_BCM |
ZX4500_CPLD_SYSCTL_SINTA |
ZX4500_CPLD_SYSCTL_WD |
ZX4500_CPLD_SYSCTL_PMC_TRI);
out_8((volatile u_char *)ZX4500_CPLD_SYSCTL, sysctl);
/*
* Kludge the size that BAR2 of the 21554 asks for
* (i.e., set Upstream I/O or Memory 0 Setup Register).
* Old versions of SROM wants 1 GB which is too large, make it ask
* for 256 MB.
*/
early_read_config_dword(hose, 0, PCI_DEVFN(21,0), 0xc4, &val);
if (val != 0) {
early_write_config_dword(hose,
0,
PCI_DEVFN(21,0),
0xc4,
val | 0xf0000000);
}
return;
}
static int
zx4500_exclude_device(u_char bus, u_char devfn)
{
if ((bus == 0) && (PCI_SLOT(devfn) == ZX4500_HOST_BRIDGE_IDSEL)) {
return PCIBIOS_DEVICE_NOT_FOUND;
}
else {
return PCIBIOS_SUCCESSFUL;
}
}
void __init
zx4500_find_bridges(void)
{
struct pci_controller *hose;
hose = pcibios_alloc_controller();
if (!hose)
return;
hose->first_busno = 0;
hose->last_busno = 0xff;
if (mpc10x_bridge_init(hose,
MPC10X_MEM_MAP_B,
MPC10X_MEM_MAP_B,
MPC10X_MAPB_EUMB_BASE) == 0) {
hose->mem_resources[0].end = 0xffffffff;
/* Initialize the board */
zx4500_board_init(hose);
/* scan PCI bus */
ppc_md.pci_exclude_device = zx4500_exclude_device;
hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
ppc_md.pcibios_fixup = NULL;
ppc_md.pcibios_fixup_bus = NULL;
ppc_md.pci_swizzle = common_swizzle;
ppc_md.pci_map_irq = zx4500_map_irq;
}
else {
if (ppc_md.progress)
ppc_md.progress("Bridge init failed", 0x100);
printk("Host bridge init failed\n");
}
return;
}
/*
* arch/ppc/platforms/zx4500_serial.h
*
* Definitions for Znyx ZX4500 board support
*
* Author: Mark A. Greer
* mgreer@mvista.com
*
* 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#ifndef __ASMPPC_ZX4500_SERIAL_H
#define __ASMPPC_ZX4500_SERIAL_H
#include <linux/config.h>
/* Define the UART base address (only 1 UART) */
#define ZX4500_SERIAL_1 0xff880000
#ifdef CONFIG_SERIAL_MANY_PORTS
#define RS_TABLE_SIZE 64
#else
#define RS_TABLE_SIZE 1
#endif
/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
#define BASE_BAUD ( 1843200 / 16 )
#ifdef CONFIG_SERIAL_DETECT_IRQ
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
#else
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
#endif
#define STD_SERIAL_PORT_DFNS \
{ 0, BASE_BAUD, ZX4500_SERIAL_1, 17, STD_COM_FLAGS, /* ttyS0 */ \
iomem_base: (u8 *)ZX4500_SERIAL_1, \
io_type: SERIAL_IO_MEM },
#define SERIAL_PORT_DFNS \
STD_SERIAL_PORT_DFNS
#endif /* __ASMPPC_ZX4500_SERIAL_H */
/*
* arch/ppc/platforms/zx4500_setup.c
*
* Board setup routines for Znyx ZX4500 family of cPCI boards.
*
* Author: Mark A. Greer
* mgreer@mvista.com
*
* 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
/*
* This file adds support for the Znyx ZX4500 series of cPCI boards.
* These boards have an 8240, UART on the processor bus, a PPMC slot (for now
* the card in this slot can _not_ be a monarch), Broadcom BCM5600, and an
* Intel 21554 bridge.
*
* Currently, this port assumes that the 8240 is the master and performs PCI
* arbitration, etc. It is also assumed that the 8240 is wired to come up
* using memory MAP B (CHRP map).
*
* Note: This board port will not work properly as it is. You must apply the
* patch that is at ftp://ftp.mvista.com/pub/Area51/zx4500/zx_patch_2_5
*/
#include <linux/config.h>
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/reboot.h>
#include <linux/pci.h>
#include <linux/kdev_t.h>
#include <linux/types.h>
#include <linux/major.h>
#include <linux/initrd.h>
#include <linux/console.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/dma.h>
#include <asm/io.h>
#include <asm/machdep.h>
#include <asm/prom.h>
#include <asm/time.h>
#include <asm/open_pic.h>
#include <asm/mpc10x.h>
#include <asm/pci-bridge.h>
#include <asm/bootinfo.h>
#include "zx4500.h"
static u_char zx4500_openpic_initsenses[] __initdata = {
0, /* 0-15 are not used on an 8240 EPIC */
0, /* 1 */
0, /* 2 */
0, /* 3 */
0, /* 4 */
0, /* 5 */
0, /* 6 */
0, /* 7 */
0, /* 8 */
0, /* 9 */
0, /* 10 */
0, /* 11 */
0, /* 12 */
0, /* 13 */
0, /* 14 */
0, /* 15 */
1, /* 16: EPIC IRQ 0: Active Low -- PMC #INTA & #INTC */
1, /* 17: EPIC IRQ 1: Active Low -- UART */
1, /* 18: EPIC IRQ 2: Active Low -- BCM5600 #INTA */
1, /* 19: EPIC IRQ 3: Active Low -- 21554 #SINTA */
1, /* 20: EPIC IRQ 4: Active Low -- PMC #INTB & #INTD */
};
static void __init
zx4500_setup_arch(void)
{
char boot_string[ZX4500_BOOT_STRING_LEN + 1];
char *boot_arg;
extern char cmd_line[];
loops_per_jiffy = 50000000 / HZ;
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#endif
#if defined(CONFIG_ROOT_NFS)
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_SDA1;
#endif
/* Get boot string from flash */
strlcpy(boot_string,
(char *)ZX4500_BOOT_STRING_ADDR,
sizeof(boot_string));
boot_string[ZX4500_BOOT_STRING_LEN] = '\0';
/* Can be delimited by 0xff */
boot_arg = strchr(boot_string, 0xff);
if (boot_arg != NULL) {
*boot_arg = '\0';
}
/* First 3 chars must be 'dev'. If not, ignore. */
if (!strncmp(boot_string, "dev", 3)) {
/* skip 'dev?' and any blanks after it */
boot_arg = strchr(boot_string, ' ');
if (boot_arg != NULL) {
while (*boot_arg == ' ') boot_arg++;
strcat(cmd_line, " ");
strcat(cmd_line, boot_arg);
}
}
/* nothing but serial consoles... */
printk("Znyx ZX4500 Series High Performance Switch\n");
printk("ZX4500 port (C) 2000, 2001 MontaVista Software, Inc. (source@mvista.com)\n");
/* Lookup PCI host bridge */
zx4500_find_bridges();
printk("ZX4500 Board ID: 0x%x, Revision #: 0x%x\n",
in_8((volatile u_char *)ZX4500_CPLD_BOARD_ID),
in_8((volatile u_char *)ZX4500_CPLD_REV));
return;
}
static ulong __init
zx4500_find_end_of_memory(void)
{
return mpc10x_get_mem_size(MPC10X_MEM_MAP_B);
}
static void __init
zx4500_map_io(void)
{
io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO);
}
/*
* Enable interrupts routed thru CPLD to reach the 8240's EPIC.
* Need to enable all 4 PMC intrs, BCM INTA, and 21554 SINTA to 8240.
* UART intrs routed directly to 8240 (not thru CPLD).
*/
static void __init
zx4500_enable_cpld_intrs(void)
{
u_char sysctl;
sysctl = in_8((volatile u_char *)ZX4500_CPLD_SYSCTL);
sysctl |= (ZX4500_CPLD_SYSCTL_PMC |
ZX4500_CPLD_SYSCTL_BCM |
ZX4500_CPLD_SYSCTL_SINTA);
out_8((volatile u_char *)ZX4500_CPLD_SYSCTL, sysctl);
return;
}
static void __init
zx4500_init_IRQ(void)
{
OpenPIC_InitSenses = zx4500_openpic_initsenses;
OpenPIC_NumInitSenses = sizeof(zx4500_openpic_initsenses);
openpic_init(1, 0, NULL, -1);
zx4500_enable_cpld_intrs(); /* Allow CPLD to route intrs to 8240 */
return;
}
static void
zx4500_restart(char *cmd)
{
local_irq_disable();
out_8((volatile u_char *)ZX4500_CPLD_RESET, ZX4500_CPLD_RESET_XBUS);
for (;;);
panic("Restart failed.\n");
/* NOTREACHED */
}
static void
zx4500_power_off(void)
{
local_irq_disable();
for(;;); /* No way to shut power off with software */
/* NOTREACHED */
}
static void
zx4500_halt(void)
{
zx4500_power_off();
/* NOTREACHED */
}
static int
zx4500_get_bus_speed(void)
{
int bus_speed;
bus_speed = 100000000;
return bus_speed;
}
static int
zx4500_show_cpuinfo(struct seq_file *m)
{
uint pvid;
seq_printf(m, "vendor\t\t: Znyx\n");
seq_printf(m, "machine\t\t: ZX4500\n");
seq_printf(m, "processor\t: PVID: 0x%x, vendor: %s\n",
pvid, (pvid & (1<<15) ? "IBM" : "Motorola"));
seq_printf(m, "bus speed\t: %dMhz\n",
zx4500_get_bus_speed()/1000000);
return 0;
}
static void __init
zx4500_calibrate_decr(void)
{
ulong freq;
freq = zx4500_get_bus_speed() / 4;
printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
freq/1000000, freq%1000000);
tb_ticks_per_jiffy = freq / HZ;
tb_to_us = mulhwu_scale_factor(freq, 1000000);
return;
}
/*
* Set BAT 3 to map 0xf0000000 to end of physical memory space 1-1.
*/
static __inline__ void
zx4500_set_bat(void)
{
unsigned long bat3u, bat3l;
static int mapping_set = 0;
if (!mapping_set) {
__asm__ __volatile__(
" lis %0,0xf800\n \
ori %1,%0,0x002a\n \
ori %0,%0,0x0ffe\n \
mtspr 0x21e,%0\n \
mtspr 0x21f,%1\n \
isync\n \
sync "
: "=r" (bat3u), "=r" (bat3l));
mapping_set = 1;
}
return;
}
#ifdef CONFIG_SERIAL_TEXT_DEBUG
#include <linux/serialP.h>
#include <linux/serial_reg.h>
#include <asm/serial.h>
static struct serial_state rs_table[RS_TABLE_SIZE] = {
SERIAL_PORT_DFNS /* Defined in <asm/serial.h> */
};
void
zx4500_progress(char *s, unsigned short hex)
{
volatile char c;
volatile unsigned long com_port;
u16 shift;
com_port = rs_table[0].port;
shift = rs_table[0].iomem_reg_shift;
while ((c = *s++) != 0) {
while ((*((volatile unsigned char *)com_port +
(UART_LSR << shift)) & UART_LSR_THRE) == 0)
;
*(volatile unsigned char *)com_port = c;
if (c == '\n') {
while ((*((volatile unsigned char *)com_port +
(UART_LSR << shift)) & UART_LSR_THRE) == 0)
;
*(volatile unsigned char *)com_port = '\r';
}
}
}
#endif /* CONFIG_SERIAL_TEXT_DEBUG */
void __init
platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
parse_bootinfo(find_bootinfo());
/* Map in board registers, etc. */
zx4500_set_bat();
isa_io_base = MPC10X_MAPB_ISA_IO_BASE;
isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE;
pci_dram_offset = MPC10X_MAPB_DRAM_OFFSET;
ppc_md.setup_arch = zx4500_setup_arch;
ppc_md.show_cpuinfo = zx4500_show_cpuinfo;
ppc_md.irq_canonicalize = NULL;
ppc_md.init_IRQ = zx4500_init_IRQ;
ppc_md.get_irq = openpic_get_irq;
ppc_md.init = NULL;
ppc_md.restart = zx4500_restart;
ppc_md.power_off = zx4500_power_off;
ppc_md.halt = zx4500_halt;
ppc_md.find_end_of_memory = zx4500_find_end_of_memory;
ppc_md.setup_io_mappings = zx4500_map_io;
ppc_md.calibrate_decr = zx4500_calibrate_decr;
ppc_md.heartbeat = NULL;
ppc_md.heartbeat_reset = 0;
ppc_md.heartbeat_count = 0;
#ifdef CONFIG_SERIAL_TEXT_DEBUG
ppc_md.progress = zx4500_progress;
#else /* !CONFIG_SERIAL_TEXT_DEBUG */
ppc_md.progress = NULL;
#endif /* CONFIG_SERIAL_TEXT_DEBUG */
return;
}
......@@ -61,8 +61,6 @@ obj-$(CONFIG_SANDPOINT) += i8259.o open_pic.o mpc10x_common.o \
pci_auto.o indirect_pci.o todc_time.o
obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \
todc_time.o
obj-$(CONFIG_ZX4500) += indirect_pci.o pci_auto.o mpc10x_common.o \
i8259.o open_pic.o
obj-$(CONFIG_8260) += m8260_setup.o ppc8260_pic.o
obj-$(CONFIG_BOOTX_TEXT) += btext.o
......@@ -28,8 +28,6 @@
#include <platforms/sandpoint_serial.h>
#elif defined(CONFIG_SPRUCE)
#include <platforms/spruce_serial.h>
#elif defined(CONFIG_ZX4500)
#include <platforms/zx4500_serial.h>
#elif defined(CONFIG_40x)
#include <asm/ibm4xx.h>
#else
......
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