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Commit 5c33696f authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'arm-soc-fixes-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM SoC/dt fixes from Arnd Bergmann:
 "This round of fixes is almost exclusively device tree changes, with
  trivial defconfig fixes and one compiler warning fix added in.

  A number of patches are to fix dtc warnings, in particular on Amlogic,
  i.MX and Rockchips.

  Other notable changes include:

  Renesas:
   - Fix a wrong clock configuration on R-Mobile A1
   - Fix IOMMU support on R-Car V3H

  Allwinner
   - Multiple audio fixes

  Qualcomm
   - Use a safe CPU voltage on MSM8996
   - Fixes to match a late audio driver change

  Rockchip:
   - Some fixes for the newly added Pinebook Pro

  NXP i.MX:
   - Fix I2C1 pinctrl configuration for i.MX27 phytec-phycard board
   - Fix imx6dl-yapp4-ursa board Ethernet connection

  OMAP:
   - A regression fix for non-existing can device on am534x-idk
   - Fix flakey wlan on droid4 where some devices would not connect at
     all because of internal pull being used with an external pull
   - Fix occasional missed wake-up events on droid4 modem uart"

* tag 'arm-soc-fixes-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (51 commits)
  ARM: dts: iwg20d-q7-dbcm-ca: Remove unneeded properties in hdmi@39
  ARM: dts: renesas: Make hdmi encoder nodes compliant with DT bindings
  arm64: dts: renesas: Make hdmi encoder nodes compliant with DT bindings
  arm64: defconfig: add MEDIA_PLATFORM_SUPPORT
  arm64: defconfig: ARCH_R8A7795: follow changed config symbol name
  arm64: defconfig: add DRM_DISPLAY_CONNECTOR
  arm64: defconfig: DRM_DUMB_VGA_DAC: follow changed config symbol name
  ARM: oxnas: make ox820_boot_secondary static
  ARM: dts: r8a7740: Add missing extal2 to CPG node
  ARM: dts: omap4-droid4: Fix occasional lost wakeirq for uart1
  ARM: dts: omap4-droid4: Fix flakey wlan by disabling internal pull for gpio
  arm64: dts: allwinner: a64: Remove unused SPDIF sound card
  arm64: dts: allwinner: a64: pinetab: Fix cpvdd supply name
  arm64: dts: meson-g12: remove spurious blank line
  arm64: dts: meson-g12b-khadas-vim3: add missing frddr_a status property
  arm64: dts: meson-g12-common: fix dwc2 clock names
  arm64: dts: meson-g12b-ugoos-am6: fix usb vbus-supply
  arm64: dts: freescale: imx8mp: update input_val for AUDIOMIX_BIT_STREAM
  ARM: dts: r7s9210: Remove bogus clock-names from OSTM nodes
  ARM: dts: rockchip: fix pinctrl sub nodename for spi in rk322x.dtsi
  ...
parents 3d1c1e59 d5fef88c
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Showing with 168 additions and 171 deletions
Documentation/devicetree/bindings/dma/fsl-edma.txt
View file @ 5c33696f
......@@ -10,7 +10,8 @@ Required properties:
- compatible :
- "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC
- "fsl,imx7ulp-edma" for eDMA2 used similar to that on i.mx7ulp
- "fsl,fsl,ls1028a-edma" for eDMA used similar to that on Vybrid vf610 SoC
- "fsl,ls1028a-edma" followed by "fsl,vf610-edma" for eDMA used on the
LS1028A SoC.
- reg : Specifies base physical address(s) and size of the eDMA registers.
The 1st region is eDMA control register's address and size.
The 2nd and the 3rd regions are programmable channel multiplexing
......
arch/arm/boot/dts/am574x-idk.dts
View file @ 5c33696f
......@@ -40,3 +40,7 @@ &mac {
status = "okay";
dual_emac;
};
&m_can0 {
status = "disabled";
};
arch/arm/boot/dts/dra7.dtsi
View file @ 5c33696f
......@@ -172,6 +172,7 @@ axi@0 {
#address-cells = <1>;
ranges = <0x51000000 0x51000000 0x3000
0x0 0x20000000 0x10000000>;
dma-ranges;
/**
* To enable PCI endpoint mode, disable the pcie1_rc
* node and enable pcie1_ep mode.
......@@ -185,7 +186,6 @@ pcie1_rc: pcie@51000000 {
device_type = "pci";
ranges = <0x81000000 0 0 0x03000 0 0x00010000
0x82000000 0 0x20013000 0x13000 0 0xffed000>;
dma-ranges = <0x02000000 0x0 0x00000000 0x00000000 0x1 0x00000000>;
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
num-lanes = <1>;
......@@ -230,6 +230,7 @@ axi@1 {
#address-cells = <1>;
ranges = <0x51800000 0x51800000 0x3000
0x0 0x30000000 0x10000000>;
dma-ranges;
status = "disabled";
pcie2_rc: pcie@51800000 {
reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
......@@ -240,7 +241,6 @@ pcie2_rc: pcie@51800000 {
device_type = "pci";
ranges = <0x81000000 0 0 0x03000 0 0x00010000
0x82000000 0 0x30013000 0x13000 0 0xffed000>;
dma-ranges = <0x02000000 0x0 0x00000000 0x00000000 0x1 0x00000000>;
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
num-lanes = <1>;
......
arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
View file @ 5c33696f
......@@ -75,8 +75,8 @@ &iomuxc {
imx27-phycard-s-rdk {
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
MX27_PAD_I2C_DATA__I2C_DATA 0x0
MX27_PAD_I2C_CLK__I2C_CLK 0x0
>;
};
......
arch/arm/boot/dts/imx6dl-yapp4-ursa.dts
View file @ 5c33696f
......@@ -38,7 +38,7 @@ &reg_usb_h1_vbus {
};
&switch_ports {
/delete-node/ port@2;
/delete-node/ port@3;
};
&touchscreen {
......
arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi
View file @ 5c33696f
......@@ -72,8 +72,6 @@ hdmi@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm/boot/dts/motorola-mapphone-common.dtsi
View file @ 5c33696f
......@@ -367,6 +367,8 @@ &mmc2 {
};
&mmc3 {
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins>;
vmmc-supply = <&wl12xx_vmmc>;
/* uart2_tx.sdmmc3_dat1 pad as wakeirq */
interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
......@@ -472,6 +474,37 @@ OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)
>;
};
/*
* Android uses PIN_OFF_INPUT_PULLDOWN | PIN_INPUT_PULLUP | MUX_MODE3
* for gpio_100, but the internal pull makes wlan flakey on some
* devices. Off mode value should be tested if we have off mode working
* later on.
*/
mmc3_pins: pinmux_mmc3_pins {
pinctrl-single,pins = <
/* 0x4a10008e gpmc_wait2.gpio_100 d23 */
OMAP4_IOPAD(0x08e, PIN_INPUT | MUX_MODE3)
/* 0x4a100102 abe_mcbsp1_dx.sdmmc3_dat2 ab25 */
OMAP4_IOPAD(0x102, PIN_INPUT_PULLUP | MUX_MODE1)
/* 0x4a100104 abe_mcbsp1_fsx.sdmmc3_dat3 ac27 */
OMAP4_IOPAD(0x104, PIN_INPUT_PULLUP | MUX_MODE1)
/* 0x4a100118 uart2_cts.sdmmc3_clk ab26 */
OMAP4_IOPAD(0x118, PIN_INPUT | MUX_MODE1)
/* 0x4a10011a uart2_rts.sdmmc3_cmd ab27 */
OMAP4_IOPAD(0x11a, PIN_INPUT_PULLUP | MUX_MODE1)
/* 0x4a10011c uart2_rx.sdmmc3_dat0 aa25 */
OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE1)
/* 0x4a10011e uart2_tx.sdmmc3_dat1 aa26 */
OMAP4_IOPAD(0x11e, PIN_INPUT_PULLUP | MUX_MODE1)
>;
};
/* gpmc_ncs0.gpio_50 */
poweroff_gpio: pinmux_poweroff_pins {
pinctrl-single,pins = <
......@@ -690,14 +723,18 @@ &timer9 {
};
/*
* As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for
* uart1 wakeirq.
* The uart1 port is wired to mdm6600 with rts and cts. The modem uses gpio_149
* for wake-up events for both the USB PHY and the UART. We can use gpio_149
* pad as the shared wakeirq for the UART rather than the RX or CTS pad as we
* have gpio_149 trigger before the UART transfer starts.
*/
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
interrupts-extended = <&wakeupgen GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core 0xfc>;
&omap4_pmx_core 0x110>;
uart-has-rtscts;
current-speed = <115200>;
};
&uart3 {
......
arch/arm/boot/dts/r7s9210.dtsi
View file @ 5c33696f
......@@ -304,7 +304,6 @@ ostm0: timer@e803b000 {
reg = <0xe803b000 0x30>;
interrupts = <GIC_SPI 56 IRQ_TYPE_EDGE_RISING>;
clocks = <&cpg CPG_MOD 36>;
clock-names = "ostm0";
power-domains = <&cpg>;
status = "disabled";
};
......@@ -314,7 +313,6 @@ ostm1: timer@e803c000 {
reg = <0xe803c000 0x30>;
interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
clocks = <&cpg CPG_MOD 35>;
clock-names = "ostm1";
power-domains = <&cpg>;
status = "disabled";
};
......@@ -324,7 +322,6 @@ ostm2: timer@e803d000 {
reg = <0xe803d000 0x30>;
interrupts = <GIC_SPI 58 IRQ_TYPE_EDGE_RISING>;
clocks = <&cpg CPG_MOD 34>;
clock-names = "ostm2";
power-domains = <&cpg>;
status = "disabled";
};
......
arch/arm/boot/dts/r8a73a4.dtsi
View file @ 5c33696f
......@@ -131,7 +131,14 @@ i2c5: i2c@e60b0000 {
cmt1: timer@e6130000 {
compatible = "renesas,r8a73a4-cmt1", "renesas,rcar-gen2-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A73A4_CLK_CMT1>;
clock-names = "fck";
power-domains = <&pd_c5>;
......
arch/arm/boot/dts/r8a7740.dtsi
View file @ 5c33696f
......@@ -479,7 +479,7 @@ fsibck_clk: fsibck {
cpg_clocks: cpg_clocks@e6150000 {
compatible = "renesas,r8a7740-cpg-clocks";
reg = <0xe6150000 0x10000>;
clocks = <&extal1_clk>, <&extalr_clk>;
clocks = <&extal1_clk>, <&extal2_clk>, <&extalr_clk>;
#clock-cells = <1>;
clock-output-names = "system", "pllc0", "pllc1",
"pllc2", "r",
......
arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
View file @ 5c33696f
......@@ -84,8 +84,6 @@ hdmi@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm/boot/dts/r8a7790-lager.dts
View file @ 5c33696f
......@@ -364,8 +364,6 @@ hdmi@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm/boot/dts/r8a7790-stout.dts
View file @ 5c33696f
......@@ -297,8 +297,6 @@ hdmi@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm/boot/dts/r8a7791-koelsch.dts
View file @ 5c33696f
......@@ -387,8 +387,6 @@ hdmi@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm/boot/dts/r8a7791-porter.dts
View file @ 5c33696f
......@@ -181,8 +181,6 @@ hdmi@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm/boot/dts/r8a7792-blanche.dts
View file @ 5c33696f
......@@ -289,8 +289,6 @@ hdmi@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm/boot/dts/r8a7792-wheat.dts
View file @ 5c33696f
......@@ -249,14 +249,12 @@ &i2c4 {
*/
hdmi@3d {
compatible = "adi,adv7513";
reg = <0x3d>, <0x2d>, <0x4d>, <0x5d>;
reg-names = "main", "cec", "edid", "packet";
reg = <0x3d>, <0x4d>, <0x2d>, <0x5d>;
reg-names = "main", "edid", "cec", "packet";
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......@@ -280,14 +278,12 @@ adv7513_0_out: endpoint {
hdmi@39 {
compatible = "adi,adv7513";
reg = <0x39>, <0x29>, <0x49>, <0x59>;
reg-names = "main", "cec", "edid", "packet";
reg = <0x39>, <0x49>, <0x29>, <0x59>;
reg-names = "main", "edid", "cec", "packet";
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm/boot/dts/r8a7793-gose.dts
View file @ 5c33696f
......@@ -366,8 +366,6 @@ hdmi@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm/boot/dts/r8a7794-silk.dts
View file @ 5c33696f
......@@ -255,8 +255,6 @@ hdmi@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm/boot/dts/rk3036.dtsi
View file @ 5c33696f
......@@ -128,7 +128,7 @@ gpu: gpu@10090000 {
assigned-clocks = <&cru SCLK_GPU>;
assigned-clock-rates = <100000000>;
clocks = <&cru SCLK_GPU>, <&cru SCLK_GPU>;
clock-names = "core", "bus";
clock-names = "bus", "core";
resets = <&cru SRST_GPU>;
status = "disabled";
};
......
arch/arm/boot/dts/rk3228-evb.dts
View file @ 5c33696f
......@@ -46,7 +46,7 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
phy: phy@0 {
phy: ethernet-phy@0 {
compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22";
reg = <0>;
clocks = <&cru SCLK_MAC_PHY>;
......
arch/arm/boot/dts/rk3229-xms6.dts
View file @ 5c33696f
......@@ -150,7 +150,7 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
phy: phy@0 {
phy: ethernet-phy@0 {
compatible = "ethernet-phy-id1234.d400",
"ethernet-phy-ieee802.3-c22";
reg = <0>;
......
arch/arm/boot/dts/rk322x.dtsi
View file @ 5c33696f
......@@ -555,7 +555,7 @@ gpu: gpu@20000000 {
"pp1",
"ppmmu1";
clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
clock-names = "core", "bus";
clock-names = "bus", "core";
resets = <&cru SRST_GPU_A>;
status = "disabled";
};
......@@ -1020,7 +1020,7 @@ i2c3_xfer: i2c3-xfer {
};
};
spi-0 {
spi0 {
spi0_clk: spi0-clk {
rockchip,pins = <0 RK_PB1 2 &pcfg_pull_up>;
};
......@@ -1038,7 +1038,7 @@ spi0_cs1: spi0-cs1 {
};
};
spi-1 {
spi1 {
spi1_clk: spi1-clk {
rockchip,pins = <0 RK_PC7 2 &pcfg_pull_up>;
};
......
arch/arm/boot/dts/rk3xxx.dtsi
View file @ 5c33696f
......@@ -84,7 +84,7 @@ gpu: gpu@10090000 {
compatible = "arm,mali-400";
reg = <0x10090000 0x10000>;
clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
clock-names = "core", "bus";
clock-names = "bus", "core";
assigned-clocks = <&cru ACLK_GPU>;
assigned-clock-rates = <100000000>;
resets = <&cru SRST_GPU>;
......
arch/arm/mach-oxnas/platsmp.c
View file @ 5c33696f
......@@ -27,7 +27,8 @@ static void __iomem *gic_cpu_ctrl;
#define GIC_CPU_CTRL 0x00
#define GIC_CPU_CTRL_ENABLE 1
int __init ox820_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int __init ox820_boot_secondary(unsigned int cpu,
struct task_struct *idle)
{
/*
* Write the address of secondary startup into the
......
arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts
View file @ 5c33696f
......@@ -98,7 +98,7 @@ &codec {
};
&codec_analog {
hpvcc-supply = <&reg_eldo1>;
cpvdd-supply = <&reg_eldo1>;
status = "okay";
};
......
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
View file @ 5c33696f
......@@ -154,24 +154,6 @@ link_codec: simple-audio-card,codec {
};
};
sound_spdif {
compatible = "simple-audio-card";
simple-audio-card,name = "On-board SPDIF";
simple-audio-card,cpu {
sound-dai = <&spdif>;
};
simple-audio-card,codec {
sound-dai = <&spdif_out>;
};
};
spdif_out: spdif-out {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
};
timer {
compatible = "arm,armv8-timer";
allwinner,erratum-unknown1;
......
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
View file @ 5c33696f
......@@ -2319,7 +2319,7 @@ dwc2: usb@ff400000 {
reg = <0x0 0xff400000 0x0 0x40000>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
clock-names = "ddr";
clock-names = "otg";
phys = <&usb2_phy1>;
phy-names = "usb2-phy";
dr_mode = "peripheral";
......
arch/arm64/boot/dts/amlogic/meson-g12.dtsi
View file @ 5c33696f
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
......
arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
View file @ 5c33696f
......@@ -154,6 +154,10 @@ &cpu103 {
clock-latency = <50000>;
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
......
arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
View file @ 5c33696f
......@@ -545,7 +545,7 @@ &uart_AO {
&usb {
status = "okay";
dr_mode = "host";
vbus-regulator = <&usb_pwr_en>;
vbus-supply = <&usb_pwr_en>;
};
&usb2_phy0 {
......
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
View file @ 5c33696f
......@@ -447,7 +447,7 @@ lpuart5: serial@22b0000 {
edma0: dma-controller@22c0000 {
#dma-cells = <2>;
compatible = "fsl,ls1028a-edma";
compatible = "fsl,ls1028a-edma", "fsl,vf610-edma";
reg = <0x0 0x22c0000 0x0 0x10000>,
<0x0 0x22d0000 0x0 0x10000>,
<0x0 0x22e0000 0x0 0x10000>;
......
arch/arm64/boot/dts/freescale/imx8mm.dtsi
View file @ 5c33696f
......@@ -264,7 +264,7 @@ soc@0 {
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x301f0000 0x10000>;
reg = <0x30000000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x30000000 0x30000000 0x400000>;
......@@ -543,7 +543,7 @@ src: reset-controller@30390000 {
aips2: bus@30400000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x305f0000 0x10000>;
reg = <0x30400000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x30400000 0x30400000 0x400000>;
......@@ -603,7 +603,7 @@ system_counter: timer@306a0000 {
aips3: bus@30800000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x309f0000 0x10000>;
reg = <0x30800000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x30800000 0x30800000 0x400000>,
......@@ -863,7 +863,7 @@ fec1: ethernet@30be0000 {
aips4: bus@32c00000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x32df0000 0x10000>;
reg = <0x32c00000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x32c00000 0x32c00000 0x400000>;
......
arch/arm64/boot/dts/freescale/imx8mn.dtsi
View file @ 5c33696f
......@@ -241,7 +241,7 @@ soc@0 {
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x301f0000 0x10000>;
reg = <0x30000000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
......@@ -448,7 +448,7 @@ src: reset-controller@30390000 {
aips2: bus@30400000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x305f0000 0x10000>;
reg = <0x30400000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
......@@ -508,7 +508,7 @@ system_counter: timer@306a0000 {
aips3: bus@30800000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x309f0000 0x10000>;
reg = <0x30800000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
......@@ -718,7 +718,7 @@ sdma1: dma-controller@30bd0000 {
reg = <0x30bd0000 0x10000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_SDMA1_ROOT>,
<&clk IMX8MN_CLK_SDMA1_ROOT>;
<&clk IMX8MN_CLK_AHB>;
clock-names = "ipg", "ahb";
#dma-cells = <3>;
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
......@@ -754,7 +754,7 @@ fec1: ethernet@30be0000 {
aips4: bus@32c00000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x32df0000 0x10000>;
reg = <0x32c00000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
......
arch/arm64/boot/dts/freescale/imx8mp.dtsi
View file @ 5c33696f
......@@ -145,7 +145,7 @@ soc@0 {
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x301f0000 0x10000>;
reg = <0x30000000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
......@@ -318,7 +318,7 @@ src: reset-controller@30390000 {
aips2: bus@30400000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x305f0000 0x400000>;
reg = <0x30400000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
......@@ -378,7 +378,7 @@ system_counter: timer@306a0000 {
aips3: bus@30800000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x309f0000 0x400000>;
reg = <0x30800000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
......
arch/arm64/boot/dts/freescale/imx8mq.dtsi
View file @ 5c33696f
......@@ -291,7 +291,7 @@ soc@0 {
bus@30000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x301f0000 0x10000>;
reg = <0x30000000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x30000000 0x30000000 0x400000>;
......@@ -696,7 +696,7 @@ pgc_pcie2: power-domain@a {
bus@30400000 { /* AIPS2 */
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x305f0000 0x10000>;
reg = <0x30400000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x30400000 0x30400000 0x400000>;
......@@ -756,7 +756,7 @@ system_counter: timer@306a0000 {
bus@30800000 { /* AIPS3 */
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x309f0000 0x10000>;
reg = <0x30800000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x30800000 0x30800000 0x400000>,
......@@ -1029,7 +1029,7 @@ fec1: ethernet@30be0000 {
bus@32c00000 { /* AIPS4 */
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x32df0000 0x10000>;
reg = <0x32c00000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x32c00000 0x32c00000 0x400000>;
......
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
View file @ 5c33696f
......@@ -658,8 +658,8 @@ s10 {
s11 {
qcom,saw-leader;
regulator-always-on;
regulator-min-microvolt = <1230000>;
regulator-max-microvolt = <1230000>;
regulator-min-microvolt = <980000>;
regulator-max-microvolt = <980000>;
};
};
......@@ -908,10 +908,27 @@ &sdhc2 {
status = "okay";
};
&q6asmdai {
dai@0 {
reg = <0>;
};
dai@1 {
reg = <1>;
};
dai@2 {
reg = <2>;
};
};
&sound {
compatible = "qcom,apq8096-sndcard";
model = "DB820c";
audio-routing = "RX_BIAS", "MCLK";
audio-routing = "RX_BIAS", "MCLK",
"MM_DL1", "MultiMedia1 Playback",
"MM_DL2", "MultiMedia2 Playback",
"MultiMedia3 Capture", "MM_UL3";
mm1-dai-link {
link-name = "MultiMedia1";
......
arch/arm64/boot/dts/qcom/msm8996.dtsi
View file @ 5c33696f
......@@ -2066,6 +2066,8 @@ q6asm: q6asm {
reg = <APR_SVC_ASM>;
q6asmdai: dais {
compatible = "qcom,q6asm-dais";
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <1>;
iommus = <&lpass_q6_smmu 1>;
};
......
arch/arm64/boot/dts/qcom/sdm845-db845c.dts
View file @ 5c33696f
......@@ -442,17 +442,14 @@ qi2s@22 {
&q6asmdai {
dai@0 {
reg = <0>;
direction = <2>;
};
dai@1 {
reg = <1>;
direction = <2>;
};
dai@2 {
reg = <2>;
direction = <1>;
};
dai@3 {
......
arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
View file @ 5c33696f
......@@ -359,12 +359,10 @@ &qupv3_id_1 {
&q6asmdai {
dai@0 {
reg = <0>;
direction = <2>;
};
dai@1 {
reg = <1>;
direction = <1>;
};
};
......
arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
View file @ 5c33696f
......@@ -137,8 +137,6 @@ hdmi@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
View file @ 5c33696f
......@@ -150,8 +150,6 @@ hdmi@39{
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm64/boot/dts/renesas/r8a77980-condor.dts
View file @ 5c33696f
......@@ -174,8 +174,6 @@ hdmi@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
View file @ 5c33696f
......@@ -141,8 +141,6 @@ hdmi@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm64/boot/dts/renesas/r8a77980.dtsi
View file @ 5c33696f
......@@ -1318,6 +1318,7 @@ ipmmu_vi0: mmu@febd0000 {
ipmmu_vip0: mmu@e7b00000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe7b00000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
......@@ -1325,6 +1326,7 @@ ipmmu_vip0: mmu@e7b00000 {
ipmmu_vip1: mmu@e7960000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe7960000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 11>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
......
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
View file @ 5c33696f
......@@ -360,8 +360,6 @@ hdmi-encoder@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm64/boot/dts/renesas/r8a77995-draak.dts
View file @ 5c33696f
......@@ -272,8 +272,8 @@ adv7180_out: endpoint {
hdmi-encoder@39 {
compatible = "adi,adv7511w";
reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
reg-names = "main", "edid", "packet", "cec";
reg = <0x39>, <0x3f>, <0x3c>, <0x38>;
reg-names = "main", "edid", "cec", "packet";
interrupt-parent = <&gpio1>;
interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
......@@ -284,8 +284,6 @@ hdmi-encoder@39 {
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
......
arch/arm64/boot/dts/rockchip/px30.dtsi
View file @ 5c33696f
......@@ -143,7 +143,7 @@ opp-1296000000 {
};
arm-pmu {
compatible = "arm,cortex-a53-pmu";
compatible = "arm,cortex-a35-pmu";
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
......
arch/arm64/boot/dts/rockchip/rk3308.dtsi
View file @ 5c33696f
......@@ -127,7 +127,7 @@ opp-1008000000 {
};
arm-pmu {
compatible = "arm,cortex-a53-pmu";
compatible = "arm,cortex-a35-pmu";
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
......
arch/arm64/boot/dts/rockchip/rk3328-evb.dts
View file @ 5c33696f
......@@ -82,17 +82,16 @@ &emmc {
&gmac2phy {
phy-supply = <&vcc_phy>;
clock_in_out = "output";
assigned-clocks = <&cru SCLK_MAC2PHY_SRC>;
assigned-clock-rate = <50000000>;
assigned-clocks = <&cru SCLK_MAC2PHY>;
assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
status = "okay";
};
&i2c1 {
status = "okay";
rk805: rk805@18 {
rk805: pmic@18 {
compatible = "rockchip,rk805";
reg = <0x18>;
interrupt-parent = <&gpio2>;
......
arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
View file @ 5c33696f
......@@ -170,7 +170,7 @@ &hdmiphy {
&i2c1 {
status = "okay";
rk805: rk805@18 {
rk805: pmic@18 {
compatible = "rockchip,rk805";
reg = <0x18>;
interrupt-parent = <&gpio2>;
......
arch/arm64/boot/dts/rockchip/rk3328.dtsi
View file @ 5c33696f
......@@ -299,8 +299,6 @@ &pdmm0_sdi2_sleep
grf: syscon@ff100000 {
compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
reg = <0x0 0xff100000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
io_domains: io-domains {
compatible = "rockchip,rk3328-io-voltage-domain";
......@@ -1794,10 +1792,6 @@ rmiim1_pins: rmiim1-pins {
};
gmac2phy {
fephyled_speed100: fephyled-speed100 {
rockchip,pins = <0 RK_PD7 1 &pcfg_pull_none>;
};
fephyled_speed10: fephyled-speed10 {
rockchip,pins = <0 RK_PD6 1 &pcfg_pull_none>;
};
......@@ -1806,18 +1800,6 @@ fephyled_duplex: fephyled-duplex {
rockchip,pins = <0 RK_PD6 2 &pcfg_pull_none>;
};
fephyled_rxm0: fephyled-rxm0 {
rockchip,pins = <0 RK_PD5 1 &pcfg_pull_none>;
};
fephyled_txm0: fephyled-txm0 {
rockchip,pins = <0 RK_PD5 2 &pcfg_pull_none>;
};
fephyled_linkm0: fephyled-linkm0 {
rockchip,pins = <0 RK_PD4 1 &pcfg_pull_none>;
};
fephyled_rxm1: fephyled-rxm1 {
rockchip,pins = <2 RK_PD1 2 &pcfg_pull_none>;
};
......
arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
View file @ 5c33696f
......@@ -147,7 +147,7 @@ es8316-sound {
"Speaker", "Speaker Amplifier OUTL",
"Speaker", "Speaker Amplifier OUTR";
simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>;
simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
simple-audio-card,aux-devs = <&speaker_amp>;
simple-audio-card,pin-switches = "Speaker";
......@@ -690,7 +690,8 @@ &i2c4 {
fusb0: fusb30x@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
fcs,int_n = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
interrupt-parent = <&gpio1>;
interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&fusb0_int_gpio>;
vbus-supply = <&vbus_typec>;
......@@ -788,13 +789,13 @@ lidbtn_gpio: lidbtn-gpio {
dc-charger {
dc_det_gpio: dc-det-gpio {
rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
es8316 {
hp_det_gpio: hp-det-gpio {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
......
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View file @ 5c33696f
......@@ -403,7 +403,7 @@ usbdrd3_0: usb@fe800000 {
reset-names = "usb3-otg";
status = "disabled";
usbdrd_dwc3_0: dwc3 {
usbdrd_dwc3_0: usb@fe800000 {
compatible = "snps,dwc3";
reg = <0x0 0xfe800000 0x0 0x100000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
......@@ -439,7 +439,7 @@ usbdrd3_1: usb@fe900000 {
reset-names = "usb3-otg";
status = "disabled";
usbdrd_dwc3_1: dwc3 {
usbdrd_dwc3_1: usb@fe900000 {
compatible = "snps,dwc3";
reg = <0x0 0xfe900000 0x0 0x100000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
......@@ -1124,8 +1124,6 @@ pd_vopl@RK3399_PD_VOPL {
pmugrf: syscon@ff320000 {
compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xff320000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
pmu_io_domains: io-domains {
compatible = "rockchip,rk3399-pmu-io-voltage-domain";
......@@ -1883,10 +1881,10 @@ edp_in_vopl: endpoint@1 {
gpu: gpu@ff9a0000 {
compatible = "rockchip,rk3399-mali", "arm,mali-t860";
reg = <0x0 0xff9a0000 0x0 0x10000>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "gpu", "job", "mmu";
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "job", "mmu", "gpu";
clocks = <&cru ACLK_GPU>;
#cooling-cells = <2>;
power-domains = <&power RK3399_PD_GPU>;
......
arch/arm64/configs/defconfig
View file @ 5c33696f
......@@ -208,7 +208,7 @@ CONFIG_PCIE_QCOM=y
CONFIG_PCIE_ARMADA_8K=y
CONFIG_PCIE_KIRIN=y
CONFIG_PCIE_HISI_STB=y
CONFIG_PCIE_TEGRA194=m
CONFIG_PCIE_TEGRA194_HOST=m
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_FW_LOADER_USER_HELPER=y
......@@ -567,6 +567,7 @@ CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
CONFIG_MEDIA_SDR_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_MEDIA_PLATFORM_SUPPORT=y
# CONFIG_DVB_NET is not set
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=m
......@@ -610,8 +611,9 @@ CONFIG_DRM_MSM=m
CONFIG_DRM_TEGRA=m
CONFIG_DRM_PANEL_LVDS=m
CONFIG_DRM_PANEL_SIMPLE=m
CONFIG_DRM_DUMB_VGA_DAC=m
CONFIG_DRM_SIMPLE_BRIDGE=m
CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
CONFIG_DRM_DISPLAY_CONNECTOR=m
CONFIG_DRM_SII902X=m
CONFIG_DRM_THINE_THC63LVD1024=m
CONFIG_DRM_TI_SN65DSI86=m
......@@ -848,7 +850,8 @@ CONFIG_QCOM_APR=m
CONFIG_ARCH_R8A774A1=y
CONFIG_ARCH_R8A774B1=y
CONFIG_ARCH_R8A774C0=y
CONFIG_ARCH_R8A7795=y
CONFIG_ARCH_R8A77950=y
CONFIG_ARCH_R8A77951=y
CONFIG_ARCH_R8A77960=y
CONFIG_ARCH_R8A77961=y
CONFIG_ARCH_R8A77965=y
......
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