Commit 5c587f9b authored by Akira Yokosawa's avatar Akira Yokosawa Committed by Paul E. McKenney

tools/memory-model: Remove redundant initialization in litmus tests

This is a revert of commit 1947bfcf ("tools/memory-model: Add types
to litmus tests") with conflict resolutions.

klitmus7 [1] is aware of default types of "int" and "int*".
It accepts litmus tests for herd7 without extra type info unless
non-"int" variables are referenced by an "exists", "locations",
or "filter" directive.

[1]: Tested with klitmus7 versions 7.49 or later.
Suggested-by: default avatarPaul E. McKenney <paulmck@kernel.org>
Signed-off-by: default avatarAkira Yokosawa <akiyks@gmail.com>
Signed-off-by: default avatarPaul E. McKenney <paulmck@kernel.org>
parent 8881e7a7
...@@ -7,9 +7,7 @@ C CoRR+poonceonce+Once ...@@ -7,9 +7,7 @@ C CoRR+poonceonce+Once
* reads from the same variable are ordered. * reads from the same variable are ordered.
*) *)
{ {}
int x;
}
P0(int *x) P0(int *x)
{ {
......
...@@ -7,9 +7,7 @@ C CoRW+poonceonce+Once ...@@ -7,9 +7,7 @@ C CoRW+poonceonce+Once
* a given variable and a later write to that same variable are ordered. * a given variable and a later write to that same variable are ordered.
*) *)
{ {}
int x;
}
P0(int *x) P0(int *x)
{ {
......
...@@ -7,9 +7,7 @@ C CoWR+poonceonce+Once ...@@ -7,9 +7,7 @@ C CoWR+poonceonce+Once
* given variable and a later read from that same variable are ordered. * given variable and a later read from that same variable are ordered.
*) *)
{ {}
int x;
}
P0(int *x) P0(int *x)
{ {
......
...@@ -7,9 +7,7 @@ C CoWW+poonceonce ...@@ -7,9 +7,7 @@ C CoWW+poonceonce
* writes to the same variable are ordered. * writes to the same variable are ordered.
*) *)
{ {}
int x;
}
P0(int *x) P0(int *x)
{ {
......
...@@ -10,10 +10,7 @@ C IRIW+fencembonceonces+OnceOnce ...@@ -10,10 +10,7 @@ C IRIW+fencembonceonces+OnceOnce
* process? This litmus test exercises LKMM's "propagation" rule. * process? This litmus test exercises LKMM's "propagation" rule.
*) *)
{ {}
int x;
int y;
}
P0(int *x) P0(int *x)
{ {
......
...@@ -10,10 +10,7 @@ C IRIW+poonceonces+OnceOnce ...@@ -10,10 +10,7 @@ C IRIW+poonceonces+OnceOnce
* different process? * different process?
*) *)
{ {}
int x;
int y;
}
P0(int *x) P0(int *x)
{ {
......
...@@ -7,12 +7,7 @@ C ISA2+pooncelock+pooncelock+pombonce ...@@ -7,12 +7,7 @@ C ISA2+pooncelock+pooncelock+pombonce
* (in P0() and P1()) is visible to external process P2(). * (in P0() and P1()) is visible to external process P2().
*) *)
{ {}
spinlock_t mylock;
int x;
int y;
int z;
}
P0(int *x, int *y, spinlock_t *mylock) P0(int *x, int *y, spinlock_t *mylock)
{ {
......
...@@ -9,11 +9,7 @@ C ISA2+poonceonces ...@@ -9,11 +9,7 @@ C ISA2+poonceonces
* of the smp_load_acquire() invocations are replaced by READ_ONCE()? * of the smp_load_acquire() invocations are replaced by READ_ONCE()?
*) *)
{ {}
int x;
int y;
int z;
}
P0(int *x, int *y) P0(int *x, int *y)
{ {
......
...@@ -11,11 +11,7 @@ C ISA2+pooncerelease+poacquirerelease+poacquireonce ...@@ -11,11 +11,7 @@ C ISA2+pooncerelease+poacquirerelease+poacquireonce
* (AKA non-rf) link, so release-acquire is all that is needed. * (AKA non-rf) link, so release-acquire is all that is needed.
*) *)
{ {}
int x;
int y;
int z;
}
P0(int *x, int *y) P0(int *x, int *y)
{ {
......
...@@ -11,10 +11,7 @@ C LB+fencembonceonce+ctrlonceonce ...@@ -11,10 +11,7 @@ C LB+fencembonceonce+ctrlonceonce
* another control dependency and order would still be maintained.) * another control dependency and order would still be maintained.)
*) *)
{ {}
int x;
int y;
}
P0(int *x, int *y) P0(int *x, int *y)
{ {
......
...@@ -8,10 +8,7 @@ C LB+poacquireonce+pooncerelease ...@@ -8,10 +8,7 @@ C LB+poacquireonce+pooncerelease
* to the other? * to the other?
*) *)
{ {}
int x;
int y;
}
P0(int *x, int *y) P0(int *x, int *y)
{ {
......
...@@ -7,10 +7,7 @@ C LB+poonceonces ...@@ -7,10 +7,7 @@ C LB+poonceonces
* be prevented even with no explicit ordering? * be prevented even with no explicit ordering?
*) *)
{ {}
int x;
int y;
}
P0(int *x, int *y) P0(int *x, int *y)
{ {
......
...@@ -8,10 +8,7 @@ C MP+fencewmbonceonce+fencermbonceonce ...@@ -8,10 +8,7 @@ C MP+fencewmbonceonce+fencermbonceonce
* is usually better to use smp_store_release() and smp_load_acquire(). * is usually better to use smp_store_release() and smp_load_acquire().
*) *)
{ {}
int buf;
int flag;
}
P0(int *buf, int *flag) // Producer P0(int *buf, int *flag) // Producer
{ {
......
...@@ -10,9 +10,7 @@ C MP+onceassign+derefonce ...@@ -10,9 +10,7 @@ C MP+onceassign+derefonce
*) *)
{ {
int *p=y; p=y;
int x;
int y=0;
} }
P0(int *x, int **p) // Producer P0(int *x, int **p) // Producer
......
...@@ -10,10 +10,7 @@ C MP+polockmbonce+poacquiresilsil ...@@ -10,10 +10,7 @@ C MP+polockmbonce+poacquiresilsil
* executed before the lock was acquired (loosely speaking). * executed before the lock was acquired (loosely speaking).
*) *)
{ {}
spinlock_t lo;
int x;
}
P0(spinlock_t *lo, int *x) // Producer P0(spinlock_t *lo, int *x) // Producer
{ {
......
...@@ -10,10 +10,7 @@ C MP+polockonce+poacquiresilsil ...@@ -10,10 +10,7 @@ C MP+polockonce+poacquiresilsil
* speaking). * speaking).
*) *)
{ {}
spinlock_t lo;
int x;
}
P0(spinlock_t *lo, int *x) // Producer P0(spinlock_t *lo, int *x) // Producer
{ {
......
...@@ -11,11 +11,7 @@ C MP+polocks ...@@ -11,11 +11,7 @@ C MP+polocks
* to see all prior accesses by those other CPUs. * to see all prior accesses by those other CPUs.
*) *)
{ {}
spinlock_t mylock;
int buf;
int flag;
}
P0(int *buf, int *flag, spinlock_t *mylock) // Producer P0(int *buf, int *flag, spinlock_t *mylock) // Producer
{ {
......
...@@ -7,10 +7,7 @@ C MP+poonceonces ...@@ -7,10 +7,7 @@ C MP+poonceonces
* no ordering at all? * no ordering at all?
*) *)
{ {}
int buf;
int flag;
}
P0(int *buf, int *flag) // Producer P0(int *buf, int *flag) // Producer
{ {
......
...@@ -8,10 +8,7 @@ C MP+pooncerelease+poacquireonce ...@@ -8,10 +8,7 @@ C MP+pooncerelease+poacquireonce
* pattern. * pattern.
*) *)
{ {}
int buf;
int flag;
}
P0(int *buf, int *flag) // Producer P0(int *buf, int *flag) // Producer
{ {
......
...@@ -11,11 +11,7 @@ C MP+porevlocks ...@@ -11,11 +11,7 @@ C MP+porevlocks
* see all prior accesses by those other CPUs. * see all prior accesses by those other CPUs.
*) *)
{ {}
spinlock_t mylock;
int buf;
int flag;
}
P0(int *buf, int *flag, spinlock_t *mylock) // Consumer P0(int *buf, int *flag, spinlock_t *mylock) // Consumer
{ {
......
...@@ -9,10 +9,7 @@ C R+fencembonceonces ...@@ -9,10 +9,7 @@ C R+fencembonceonces
* cause the resulting test to be allowed. * cause the resulting test to be allowed.
*) *)
{ {}
int x;
int y;
}
P0(int *x, int *y) P0(int *x, int *y)
{ {
......
...@@ -8,10 +8,7 @@ C R+poonceonces ...@@ -8,10 +8,7 @@ C R+poonceonces
* store propagation delays. * store propagation delays.
*) *)
{ {}
int x;
int y;
}
P0(int *x, int *y) P0(int *x, int *y)
{ {
......
...@@ -7,10 +7,7 @@ C S+fencewmbonceonce+poacquireonce ...@@ -7,10 +7,7 @@ C S+fencewmbonceonce+poacquireonce
* store against a subsequent store? * store against a subsequent store?
*) *)
{ {}
int x;
int y;
}
P0(int *x, int *y) P0(int *x, int *y)
{ {
......
...@@ -9,10 +9,7 @@ C S+poonceonces ...@@ -9,10 +9,7 @@ C S+poonceonces
* READ_ONCE(), is ordering preserved? * READ_ONCE(), is ordering preserved?
*) *)
{ {}
int x;
int y;
}
P0(int *x, int *y) P0(int *x, int *y)
{ {
......
...@@ -9,10 +9,7 @@ C SB+fencembonceonces ...@@ -9,10 +9,7 @@ C SB+fencembonceonces
* suffice, but not much else.) * suffice, but not much else.)
*) *)
{ {}
int x;
int y;
}
P0(int *x, int *y) P0(int *x, int *y)
{ {
......
...@@ -8,10 +8,7 @@ C SB+poonceonces ...@@ -8,10 +8,7 @@ C SB+poonceonces
* variable that the preceding process reads. * variable that the preceding process reads.
*) *)
{ {}
int x;
int y;
}
P0(int *x, int *y) P0(int *x, int *y)
{ {
......
...@@ -6,10 +6,7 @@ C SB+rfionceonce-poonceonces ...@@ -6,10 +6,7 @@ C SB+rfionceonce-poonceonces
* This litmus test demonstrates that LKMM is not fully multicopy atomic. * This litmus test demonstrates that LKMM is not fully multicopy atomic.
*) *)
{ {}
int x;
int y;
}
P0(int *x, int *y) P0(int *x, int *y)
{ {
......
...@@ -8,10 +8,7 @@ C WRC+poonceonces+Once ...@@ -8,10 +8,7 @@ C WRC+poonceonces+Once
* test has no ordering at all. * test has no ordering at all.
*) *)
{ {}
int x;
int y;
}
P0(int *x) P0(int *x)
{ {
......
...@@ -10,10 +10,7 @@ C WRC+pooncerelease+fencermbonceonce+Once ...@@ -10,10 +10,7 @@ C WRC+pooncerelease+fencermbonceonce+Once
* is A-cumulative in LKMM. * is A-cumulative in LKMM.
*) *)
{ {}
int x;
int y;
}
P0(int *x) P0(int *x)
{ {
......
...@@ -9,12 +9,7 @@ C Z6.0+pooncelock+poonceLock+pombonce ...@@ -9,12 +9,7 @@ C Z6.0+pooncelock+poonceLock+pombonce
* by CPUs not holding that lock. * by CPUs not holding that lock.
*) *)
{ {}
spinlock_t mylock;
int x;
int y;
int z;
}
P0(int *x, int *y, spinlock_t *mylock) P0(int *x, int *y, spinlock_t *mylock)
{ {
......
...@@ -8,12 +8,7 @@ C Z6.0+pooncelock+pooncelock+pombonce ...@@ -8,12 +8,7 @@ C Z6.0+pooncelock+pooncelock+pombonce
* seen as ordered by a third process not holding that lock. * seen as ordered by a third process not holding that lock.
*) *)
{ {}
spinlock_t mylock;
int x;
int y;
int z;
}
P0(int *x, int *y, spinlock_t *mylock) P0(int *x, int *y, spinlock_t *mylock)
{ {
......
...@@ -14,11 +14,7 @@ C Z6.0+pooncerelease+poacquirerelease+fencembonceonce ...@@ -14,11 +14,7 @@ C Z6.0+pooncerelease+poacquirerelease+fencembonceonce
* involving locking.) * involving locking.)
*) *)
{ {}
int x;
int y;
int z;
}
P0(int *x, int *y) P0(int *x, int *y)
{ {
......
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