ARM: dts: socfpga: Add QSPI node for the Arria10

Add the QSPI device node for Arria10 SOC.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

arch/arm/boot/dts/socfpga_arria10.dtsi

@@ -675,6 +675,20 @@ usb0-ecc@ff8c8800 {
 			};
 		};
 
+		qspi: spi@ff809000 {
+			compatible = "cdns,qspi-nor";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xff809000 0x100>,
+			      <0xffa00000 0x100000>;
+			interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
+			cdns,fifo-depth = <128>;
+			cdns,fifo-width = <4>;
+			cdns,trigger-address = <0x00000000>;
+			clocks = <&qspi_clk>;
+			status = "disabled";
+		};
+
 		rst: rstmgr@ffd05000 {
 			#reset-cells = <1>;
 			compatible = "altr,rst-mgr";