Commit 5e24617f authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'qcom-arm64-fixes-for-6.6' of...

Merge tag 'qcom-arm64-fixes-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes

Qualcomm ARM64 DeviceTree fixes for v6.6

This fixes an error with an incorrect gpio-ranges preventing the PMIC
GPIO instances from being registered on SA877P, and fixes a regression
from a refactoring of the top-level clocks node that caused divclocks to
no longer probe on a few of the MSM8996 devices.

* tag 'qcom-arm64-fixes-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: dts: qcom: msm8996-xiaomi: fix missing clock populate
  arm64: dts: qcom: apq8096-db820c: fix missing clock populate
  arm64: dts: qcom: sa8775p: correct PMIC GPIO label in gpio-ranges

Link: https://lore.kernel.org/r/20231015180112.853805-1-andersson@kernel.orgSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 36fb6a3c 725f5936
......@@ -62,25 +62,23 @@ chosen {
stdout-path = "serial0:115200n8";
};
clocks {
divclk4: divclk4 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "divclk4";
div1_mclk: divclk1 {
compatible = "gpio-gate-clock";
pinctrl-0 = <&audio_mclk>;
pinctrl-names = "default";
clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
#clock-cells = <0>;
enable-gpios = <&pm8994_gpios 15 0>;
};
pinctrl-names = "default";
pinctrl-0 = <&divclk4_pin_a>;
};
divclk4: divclk4 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "divclk4";
div1_mclk: divclk1 {
compatible = "gpio-gate-clock";
pinctrl-0 = <&audio_mclk>;
pinctrl-names = "default";
clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
#clock-cells = <0>;
enable-gpios = <&pm8994_gpios 15 0>;
};
pinctrl-names = "default";
pinctrl-0 = <&divclk4_pin_a>;
};
gpio-keys {
......
......@@ -11,26 +11,24 @@
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
/ {
clocks {
divclk1_cdc: divclk1 {
compatible = "gpio-gate-clock";
clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
#clock-cells = <0>;
enable-gpios = <&pm8994_gpios 15 GPIO_ACTIVE_HIGH>;
divclk1_cdc: divclk1 {
compatible = "gpio-gate-clock";
clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
#clock-cells = <0>;
enable-gpios = <&pm8994_gpios 15 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&divclk1_default>;
};
pinctrl-names = "default";
pinctrl-0 = <&divclk1_default>;
};
divclk4: divclk4 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "divclk4";
divclk4: divclk4 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "divclk4";
pinctrl-names = "default";
pinctrl-0 = <&divclk4_pin_a>;
};
pinctrl-names = "default";
pinctrl-0 = <&divclk4_pin_a>;
};
gpio-keys {
......
......@@ -20,16 +20,14 @@ / {
qcom,pmic-id = <0x20009 0x2000a 0x00 0x00>;
qcom,board-id = <31 0>;
clocks {
divclk2_haptics: divclk2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "divclk2";
pinctrl-names = "default";
pinctrl-0 = <&divclk2_pin_a>;
};
divclk2_haptics: divclk2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "divclk2";
pinctrl-names = "default";
pinctrl-0 = <&divclk2_pin_a>;
};
};
......
......@@ -173,7 +173,7 @@ pmm8654au_1_gpios: gpio@8800 {
compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pmm8654au_2_gpios 0 0 12>;
gpio-ranges = <&pmm8654au_1_gpios 0 0 12>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
......
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