Commit 5ee1b02a authored by Nícolas F. R. A. Prado's avatar Nícolas F. R. A. Prado Committed by Hans Verkuil

media: dt-bindings: mediatek,vcodec: Remove VDEC_SYS register space

The binding expects the first register space to be VDEC_SYS. However
this register space is already assigned to a different node on both
MT8173 and MT8183: a clock-controller node called 'vdecsys' which is
also a syscon.

In order to resolve the overlapping address ranges, remove the VDEC_SYS
register space from the video decoder, and add a new property to hold
the phandle to the syscon, so that iospace can still be handled.

Also add reg-names to be able to tell that this new register schema is
used, so the driver can keep backward compatibility.
Signed-off-by: default avatarNícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
parent 4115cd8c
...@@ -21,7 +21,22 @@ properties: ...@@ -21,7 +21,22 @@ properties:
- mediatek,mt8183-vcodec-dec - mediatek,mt8183-vcodec-dec
reg: reg:
maxItems: 12 minItems: 11
maxItems: 11
reg-names:
items:
- const: misc
- const: ld
- const: top
- const: cm
- const: ad
- const: av
- const: pp
- const: hwd
- const: hwq
- const: hwb
- const: hwg
interrupts: interrupts:
maxItems: 1 maxItems: 1
...@@ -60,6 +75,10 @@ properties: ...@@ -60,6 +75,10 @@ properties:
description: description:
Describes point to scp. Describes point to scp.
mediatek,vdecsys:
$ref: /schemas/types.yaml#/definitions/phandle
description: Phandle to the vdecsys syscon node.
required: required:
- compatible - compatible
- reg - reg
...@@ -67,6 +86,7 @@ required: ...@@ -67,6 +86,7 @@ required:
- clocks - clocks
- clock-names - clock-names
- iommus - iommus
- mediatek,vdecsys
allOf: allOf:
- if: - if:
...@@ -126,10 +146,9 @@ examples: ...@@ -126,10 +146,9 @@ examples:
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/mt8173-power.h> #include <dt-bindings/power/mt8173-power.h>
vcodec_dec: vcodec@16000000 { vcodec_dec: vcodec@16020000 {
compatible = "mediatek,mt8173-vcodec-dec"; compatible = "mediatek,mt8173-vcodec-dec";
reg = <0x16000000 0x100>, /*VDEC_SYS*/ reg = <0x16020000 0x1000>, /*VDEC_MISC*/
<0x16020000 0x1000>, /*VDEC_MISC*/
<0x16021000 0x800>, /*VDEC_LD*/ <0x16021000 0x800>, /*VDEC_LD*/
<0x16021800 0x800>, /*VDEC_TOP*/ <0x16021800 0x800>, /*VDEC_TOP*/
<0x16022000 0x1000>, /*VDEC_CM*/ <0x16022000 0x1000>, /*VDEC_CM*/
...@@ -150,6 +169,7 @@ examples: ...@@ -150,6 +169,7 @@ examples:
<&iommu M4U_PORT_HW_VDEC_VLD_EXT>, <&iommu M4U_PORT_HW_VDEC_VLD_EXT>,
<&iommu M4U_PORT_HW_VDEC_VLD2_EXT>; <&iommu M4U_PORT_HW_VDEC_VLD2_EXT>;
mediatek,vpu = <&vpu>; mediatek,vpu = <&vpu>;
mediatek,vdecsys = <&vdecsys>;
power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>; power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>;
clocks = <&apmixedsys CLK_APMIXED_VCODECPLL>, clocks = <&apmixedsys CLK_APMIXED_VCODECPLL>,
<&topckgen CLK_TOP_UNIVPLL_D2>, <&topckgen CLK_TOP_UNIVPLL_D2>,
......
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