Commit 5ef00c06 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson

arm64: dts: qcom: sm8550: enable DISPCC by default

Enable the Display Clock Controller by default in SoC DTSI so unused
clocks can be turned off.  It does not require any external resources,
so as core SoC component should be always available to boards.
Suggested-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516154539.238655-1-krzysztof.kozlowski@linaro.org
parent a158f00c
...@@ -419,10 +419,6 @@ vreg_l3g_1p2: ldo3 { ...@@ -419,10 +419,6 @@ vreg_l3g_1p2: ldo3 {
}; };
}; };
&dispcc {
status = "okay";
};
&mdss { &mdss {
status = "okay"; status = "okay";
}; };
......
...@@ -2697,7 +2697,6 @@ dispcc: clock-controller@af00000 { ...@@ -2697,7 +2697,6 @@ dispcc: clock-controller@af00000 {
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
#power-domain-cells = <1>; #power-domain-cells = <1>;
status = "disabled";
}; };
usb_1_hsphy: phy@88e3000 { usb_1_hsphy: phy@88e3000 {
......
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