Commit 5f52e9a7 authored by Alex Deucher's avatar Alex Deucher

drm/amdgpu: store HW IP versions in the driver structure

So we can check the IP versions directly rather than using
asic type.
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 81d1bf01
...@@ -760,6 +760,9 @@ enum amd_hw_ip_block_type { ...@@ -760,6 +760,9 @@ enum amd_hw_ip_block_type {
#define HWIP_MAX_INSTANCE 10 #define HWIP_MAX_INSTANCE 10
#define HW_ID_MAX 300
#define IP_VERSION(mj, mn, rv) (((mj) << 16) | ((mn) << 8) | (rv))
struct amd_powerplay { struct amd_powerplay {
void *pp_handle; void *pp_handle;
const struct amd_pm_funcs *pp_funcs; const struct amd_pm_funcs *pp_funcs;
...@@ -1090,6 +1093,7 @@ struct amdgpu_device { ...@@ -1090,6 +1093,7 @@ struct amdgpu_device {
struct pci_saved_state *pci_state; struct pci_saved_state *pci_state;
struct amdgpu_reset_control *reset_cntl; struct amdgpu_reset_control *reset_cntl;
uint32_t ip_versions[HW_ID_MAX];
}; };
static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev) static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)
......
...@@ -30,7 +30,6 @@ ...@@ -30,7 +30,6 @@
#define mmMM_INDEX 0x0 #define mmMM_INDEX 0x0
#define mmMM_INDEX_HI 0x6 #define mmMM_INDEX_HI 0x6
#define mmMM_DATA 0x1 #define mmMM_DATA 0x1
#define HW_ID_MAX 300
static const char *hw_id_names[HW_ID_MAX] = { static const char *hw_id_names[HW_ID_MAX] = {
[MP1_HWID] = "MP1", [MP1_HWID] = "MP1",
......
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