Commit 5f6bd69d authored by Cyrille Pitchen's avatar Cyrille Pitchen Committed by Alexandre Belloni

ARM: dts: at91: sama5d2: add classd nodes

This patch adds nodes for the classd device and its generated clock.
Signed-off-by: default avatarCyrille Pitchen <cyrille.pitchen@atmel.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: default avatarQuentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
parent 8f3a8a67
......@@ -505,6 +505,24 @@ plladiv: plladivck {
clocks = <&plla>;
};
audio_pll_frac: audiopll_fracck {
compatible = "atmel,sama5d2-clk-audio-pll-frac";
#clock-cells = <0>;
clocks = <&main>;
};
audio_pll_pad: audiopll_padck {
compatible = "atmel,sama5d2-clk-audio-pll-pad";
#clock-cells = <0>;
clocks = <&audio_pll_frac>;
};
audio_pll_pmc: audiopll_pmcck {
compatible = "atmel,sama5d2-clk-audio-pll-pmc";
#clock-cells = <0>;
clocks = <&audio_pll_frac>;
};
utmi: utmick {
compatible = "atmel,at91sam9x5-clk-utmi";
#clock-cells = <0>;
......@@ -906,7 +924,7 @@ gck {
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>, <&audio_pll_pmc>;
sdmmc0_gclk: sdmmc0_gclk {
#clock-cells = <0>;
......@@ -967,6 +985,12 @@ can1_gclk: can1_gclk {
reg = <57>;
atmel,clk-output-range = <0 80000000>;
};
classd_gclk: classd_gclk {
#clock-cells = <0>;
reg = <59>;
atmel,clk-output-range = <0 100000000>;
};
};
};
......@@ -1444,6 +1468,19 @@ AT91_XDMAC_DT_PERID(28))>,
status = "okay";
};
classd: classd@fc048000 {
compatible = "atmel,sama5d2-classd";
reg = <0xfc048000 0x100>;
interrupts = <59 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(47))>;
dma-names = "tx";
clocks = <&classd_clk>, <&classd_gclk>;
clock-names = "pclk", "gclk";
status = "disabled";
};
can1: can@fc050000 {
compatible = "bosch,m_can";
reg = <0xfc050000 0x4000>, <0x210000 0x4000>;
......
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