Commit 613b2a82 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'mfd-next-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "Core Framework:
   - Change maintainer email address
   - Use acpi_dev_for_each_child() helper to walk the ACPI list

  New Device Support:
   - BCM2711 RPiVid ASB in Broadcom BCM2835
   - MT8195 dual-core RISC-V MCU in Chrome OS Embedded Controller
   - Regulator, RTC and Keys in MediaTek MT6357 PMIC
   - GPIO in X-Powers AXP20x PMIC
   - MT6331 and MT6332 in MediaTek MT6357 PMIC
   - Intel Meteor Lake-P PCI in Intel LPSS PCI

  New Functionality:
   - Add support for non-ACPI platforms; lpc_ich

  Fix-ups:
   - Use platform data instead of hard-coded values; bcm2835-pm
   - Make use of BIT/GENMASK macros; intel_soc_pmic_bxtwc
   - Use dev_err_probe() helper; intel_soc_pmic_chtwc,
     intel_soc_pmic_bxtwc
   - Use provided generic APIs / helpers; lpc_ich
   - Clean-up .remove() return values; asic3, t7l66xb, tc6387xb,
     tc6393xb
   - Use correct formatting specifiers; syscon
   - Replace sprintf() with sysfs_emit(); intel_soc_pmic_bxtwc
   - Automatically detect and fill USB endpoint pointers; dln2
   - Use more appropriate dev/platform/spi resources APIs;
     intel_soc_pmic_bxtwc
   - Make use of pm_sleep_ptr(); intel_soc_pmic_chtwc,
     intel_soc_pmic_bxtwc
   - Improve error handling; intel_soc_pmic_bxtwc
   - Use core driver API to create groups; intel_soc_pmic_bxtwc
   - Kconfig fix-ups; MFD_SUN6I_PRCM
   - Admin: whitespace/email addresses/etc; max77714, db8500-prcmu,
     ipaq-micro, intel_soc_pmic_bxtwc
   - Remove duplicate/unused code/functionality; lpc_ich, twl-core,
     qcom-pm8008, intel_soc_pmic_bxtwc
   - DT fix-ups / conversions; da9063, ti,j721e-system-controller,
     st,stm32-timers, mt6397, qcom,tcsr, mps,mp2629, qcom-pm8xxx,
     fsl,imx8qxp-csr

  Bug Fixes:
   - Fix of_node reference leak; max77620"

* tag 'mfd-next-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (49 commits)
  dt-bindings: mfd: stm32-timers: Move fixed string node names under 'properties'
  dt-bindings: mfd: st,stm32-timers: Correct 'resets' property name
  dt-bindings: mfd: syscon: Update Lee Jones' email address
  MAINTAINERS: Use Lee Jones' kernel.org address for Syscon submissions
  MAINTAINERS: Use Lee Jones' kernel.org address for MFD submissions
  mfd: sun6i-prcm: Update Kconfig description
  mfd: intel_soc_pmic_bxtwc: Fix spelling in the comment
  mfd: intel_soc_pmic_bxtwc: Drop unneeded casting
  mfd: intel_soc_pmic_bxtwc: Use sysfs_emit() instead of sprintf()
  mfd: intel_soc_pmic_bxtwc: Use bits.h macros for all masks
  mfd: intel_soc_pmic_bxtwc: Drop redundant ACPI_PTR()
  mfd: intel_soc_pmic_bxtwc: Switch from CONFIG_PM_SLEEP guards to pm_sleep_ptr() etc
  mfd: intel_soc_pmic_bxtwc: Extend use of temporary variable for struct device
  mfd: intel_soc_pmic_bxtwc: Use dev_err_probe()
  mfd: intel_soc_pmic_bxtwc: Convert to use platform_get/set_drvdata()
  mfd: intel_soc_pmic_bxtwc: Create sysfs attributes using core driver's facility
  mfd: intel_soc_pmic_bxtwc: Don't shadow error codes in show()/store()
  mfd: intel-lpss: Add Intel Meteor Lake-P PCI IDs
  mfd: mt6397: Add basic support for MT6331+MT6332 PMIC
  mfd: axp20x: Add AXP221/AXP223/AXP809 GPIO cells
  ...
parents 668c3c23 ae4ccaed
* Dialog DA9063/DA9063L Power Management Integrated Circuit (PMIC)
DA9063 consists of a large and varied group of sub-devices (I2C Only):
Device Supply Names Description
------ ------------ -----------
da9063-regulator : : LDOs & BUCKs
da9063-onkey : : On Key
da9063-rtc : : Real-Time Clock (DA9063 only)
da9063-watchdog : : Watchdog
======
Required properties:
- compatible : Should be "dlg,da9063" or "dlg,da9063l"
- reg : Specifies the I2C slave address (this defaults to 0x58 but it can be
modified to match the chip's OTP settings).
- interrupts : IRQ line information.
- interrupt-controller
Sub-nodes:
- regulators : This node defines the settings for the LDOs and BUCKs.
The DA9063(L) regulators are bound using their names listed below:
bcore1 : BUCK CORE1
bcore2 : BUCK CORE2
bpro : BUCK PRO
bmem : BUCK MEM
bio : BUCK IO
bperi : BUCK PERI
ldo1 : LDO_1 (DA9063 only)
ldo2 : LDO_2 (DA9063 only)
ldo3 : LDO_3
ldo4 : LDO_4 (DA9063 only)
ldo5 : LDO_5 (DA9063 only)
ldo6 : LDO_6 (DA9063 only)
ldo7 : LDO_7
ldo8 : LDO_8
ldo9 : LDO_9
ldo10 : LDO_10 (DA9063 only)
ldo11 : LDO_11
The component follows the standard regulator framework and the bindings
details of individual regulator device can be found in:
Documentation/devicetree/bindings/regulator/regulator.txt
- rtc : This node defines settings for the Real-Time Clock associated with
the DA9063 only. The RTC is not present in DA9063L. There are currently
no entries in this binding, however compatible = "dlg,da9063-rtc" should
be added if a node is created.
- onkey : This node defines the OnKey settings for controlling the key
functionality of the device. The node should contain the compatible property
with the value "dlg,da9063-onkey".
Optional onkey properties:
- dlg,disable-key-power : Disable power-down using a long key-press. If this
entry exists the OnKey driver will remove support for the KEY_POWER key
press. If this entry does not exist then by default the key-press
triggered power down is enabled and the OnKey will support both KEY_POWER
and KEY_SLEEP.
- watchdog : This node defines settings for the Watchdog timer associated
with the DA9063 and DA9063L. The node should contain the compatible property
with the value "dlg,da9063-watchdog".
Optional watchdog properties:
- dlg,use-sw-pm: Add this property to disable the watchdog during suspend.
Only use this option if you can't use the watchdog automatic suspend
function during a suspend (see register CONTROL_B).
Example:
pmic0: da9063@58 {
compatible = "dlg,da9063"
reg = <0x58>;
interrupt-parent = <&gpio6>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
rtc {
compatible = "dlg,da9063-rtc";
};
wdt {
compatible = "dlg,da9063-watchdog";
};
onkey {
compatible = "dlg,da9063-onkey";
dlg,disable-key-power;
};
regulators {
DA9063_BCORE1: bcore1 {
regulator-name = "BCORE1";
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1570000>;
regulator-min-microamp = <500000>;
regulator-max-microamp = <2000000>;
regulator-boot-on;
};
DA9063_LDO11: ldo11 {
regulator-name = "LDO_11";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
regulator-boot-on;
};
};
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/dlg,da9063.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Dialog DA9063/DA9063L Power Management Integrated Circuit (PMIC)
maintainers:
- Steve Twiss <stwiss.opensource@diasemi.com>
description: |
For device-tree bindings of other sub-modules refer to the binding documents
under the respective sub-system directories.
properties:
compatible:
enum:
- dlg,da9063
- dlg,da9063l
reg:
maxItems: 1
interrupts:
maxItems: 1
interrupt-controller: true
"#interrupt-cells":
const: 2
dlg,use-sw-pm:
type: boolean
description:
Disable the watchdog during suspend.
Only use this option if you can't use the watchdog automatic suspend
function during a suspend (see register CONTROL_B).
watchdog:
type: object
$ref: /schemas/watchdog/watchdog.yaml#
unevaluatedProperties: false
properties:
compatible:
const: dlg,da9063-watchdog
rtc:
type: object
$ref: /schemas/rtc/rtc.yaml#
unevaluatedProperties: false
properties:
compatible:
const: dlg,da9063-rtc
onkey:
type: object
$ref: /schemas/input/input.yaml#
unevaluatedProperties: false
properties:
compatible:
const: dlg,da9063-onkey
dlg,disable-key-power:
type: boolean
description: |
Disable power-down using a long key-press.
If this entry does not exist then by default the key-press triggered
power down is enabled and the OnKey will support both KEY_POWER and
KEY_SLEEP.
regulators:
type: object
patternProperties:
"^(ldo[1-11]|bcore[1-2]|bpro|bmem|bio|bperi)$":
$ref: /schemas/regulator/regulator.yaml
unevaluatedProperties: false
required:
- compatible
- reg
- interrupts
- interrupt-controller
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
pmic@58 {
compatible = "dlg,da9063";
reg = <0x58>;
#interrupt-cells = <2>;
interrupt-parent = <&gpio6>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
rtc {
compatible = "dlg,da9063-rtc";
};
watchdog {
compatible = "dlg,da9063-watchdog";
};
onkey {
compatible = "dlg,da9063-onkey";
dlg,disable-key-power;
};
regulators {
regulator-bcore1 {
regulator-name = "BCORE1";
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1570000>;
regulator-min-microamp = <500000>;
regulator-max-microamp = <2000000>;
regulator-boot-on;
};
regulator-ldo11 {
regulator-name = "LDO_11";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
regulator-boot-on;
};
};
};
};
...
......@@ -18,7 +18,9 @@ description: |
properties:
compatible:
const: mps,mp2629
enum:
- mps,mp2629
- mps,mp2733
reg:
maxItems: 1
......
......@@ -20,6 +20,7 @@ This document describes the binding for MFD device and its sub module.
Required properties:
compatible:
"mediatek,mt6323" for PMIC MT6323
"mediatek,mt6331" for PMIC MT6331 and MT6332
"mediatek,mt6358" for PMIC MT6358 and MT6366
"mediatek,mt6359" for PMIC MT6359
"mediatek,mt6397" for PMIC MT6397
......@@ -29,6 +30,7 @@ Optional subnodes:
- rtc
Required properties: Should be one of follows
- compatible: "mediatek,mt6323-rtc"
- compatible: "mediatek,mt6331-rtc"
- compatible: "mediatek,mt6358-rtc"
- compatible: "mediatek,mt6397-rtc"
For details, see ../rtc/rtc-mt6397.txt
......@@ -52,8 +54,10 @@ Optional subnodes:
see ../leds/leds-mt6323.txt
- keys
Required properties:
- compatible: "mediatek,mt6397-keys" or "mediatek,mt6323-keys"
Required properties: Should be one of the following
- compatible: "mediatek,mt6323-keys"
- compatible: "mediatek,mt6331-keys"
- compatible: "mediatek,mt6397-keys"
see ../input/mtk-pmic-keys.txt
- power-controller
......
QCOM Top Control and Status Register
Qualcomm devices have a set of registers that provide various control and status
functions for their peripherals. This node is intended to allow access to these
registers via syscon.
Required properties:
- compatible: Should contain:
"qcom,tcsr-ipq6018", "syscon", "simple-mfd" for IPQ6018
"qcom,tcsr-ipq8064", "syscon" for IPQ8064
"qcom,tcsr-apq8064", "syscon" for APQ8064
"qcom,tcsr-msm8660", "syscon" for MSM8660
"qcom,tcsr-msm8953", "syscon" for MSM8953
"qcom,tcsr-msm8960", "syscon" for MSM8960
"qcom,tcsr-msm8974", "syscon" for MSM8974
"qcom,tcsr-apq8084", "syscon" for APQ8084
"qcom,tcsr-msm8916", "syscon" for MSM8916
- reg: Address range for TCSR registers
Example:
tcsr: syscon@1a400000 {
compatible = "qcom,tcsr-msm8960", "syscon";
reg = <0x1a400000 0x100>;
};
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/qcom,tcsr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Top Control and Status Register
maintainers:
- Bjorn Andersson <bjorn.andersson@linaro.org>
description:
Qualcomm devices have a set of registers that provide various control and
status functions for their peripherals.
properties:
compatible:
oneOf:
- items:
- enum:
- qcom,tcsr-apq8064
- qcom,tcsr-apq8084
- qcom,tcsr-ipq8064
- qcom,tcsr-mdm9615
- qcom,tcsr-msm8660
- qcom,tcsr-msm8916
- qcom,tcsr-msm8953
- qcom,tcsr-msm8960
- qcom,tcsr-msm8974
- const: syscon
- items:
- const: qcom,tcsr-ipq6018
- const: syscon
- const: simple-mfd
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
syscon@1a400000 {
compatible = "qcom,tcsr-msm8960", "syscon";
reg = <0x1a400000 0x100>;
};
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm PM8xxx PMIC multi-function devices
maintainers:
- Satya Priya <skakit@codeaurora.org>
- Satya Priya <quic_c_skakit@quicinc.com>
description: |
The PM8xxx family of Power Management ICs are used to provide regulated
......
......@@ -58,43 +58,43 @@ properties:
- "#pwm-cells"
- compatible
patternProperties:
"^trigger@[0-9]+$":
counter:
type: object
properties:
compatible:
const: st,stm32-lptimer-trigger
reg:
description: Identify trigger hardware block.
items:
minimum: 0
maximum: 2
const: st,stm32-lptimer-counter
required:
- compatible
- reg
counter:
timer:
type: object
properties:
compatible:
const: st,stm32-lptimer-counter
const: st,stm32-lptimer-timer
required:
- compatible
timer:
patternProperties:
"^trigger@[0-9]+$":
type: object
properties:
compatible:
const: st,stm32-lptimer-timer
const: st,stm32-lptimer-trigger
reg:
description: Identify trigger hardware block.
items:
minimum: 0
maximum: 2
required:
- compatible
- reg
required:
- "#address-cells"
......
......@@ -33,7 +33,7 @@ properties:
items:
- const: int
reset:
resets:
maxItems: 1
dmas:
......@@ -46,6 +46,21 @@ properties:
minItems: 1
maxItems: 7
interrupts:
oneOf:
- maxItems: 1
- maxItems: 4
interrupt-names:
oneOf:
- items:
- const: global
- items:
- const: brk
- const: up
- const: trg-com
- const: cc
"#address-cells":
const: 1
......@@ -87,6 +102,16 @@ properties:
- "#pwm-cells"
- compatible
counter:
type: object
properties:
compatible:
const: st,stm32-timer-counter
required:
- compatible
patternProperties:
"^timer@[0-9]+$":
type: object
......@@ -107,16 +132,6 @@ patternProperties:
- compatible
- reg
counter:
type: object
properties:
compatible:
const: st,stm32-timer-counter
required:
- compatible
required:
- compatible
- reg
......
......@@ -17,7 +17,7 @@ description: |
and access the registers directly.
maintainers:
- Lee Jones <lee.jones@linaro.org>
- Lee Jones <lee@kernel.org>
select:
properties:
......
......@@ -48,6 +48,12 @@ patternProperties:
description:
This is the SERDES lane control mux.
"^clock-controller@[0-9a-f]+$":
type: object
$ref: /schemas/clock/ti,am654-ehrpwm-tbclk.yaml#
description:
Clock provider for TI EHRPWM nodes.
required:
- compatible
- reg
......@@ -79,5 +85,11 @@ examples:
<0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>;
/* SERDES4 lane0/1/2/3 select */
};
clock-controller@4140 {
compatible = "ti,am654-ehrpwm-tbclk", "syscon";
reg = <0x4140 0x18>;
#clock-cells = <1>;
};
};
...
......@@ -95,8 +95,6 @@ properties:
- dh,dhcom-board
# DA9053: flexible system level PMIC with multicore support
- dlg,da9053
# DA9063: system PMIC for quad-core application processors
- dlg,da9063
# DMARD05: 3-axis I2C Accelerometer
- domintech,dmard05
# DMARD06: 3-axis I2C Accelerometer
......
......@@ -5999,6 +5999,7 @@ W: http://www.dialog-semiconductor.com/products
F: Documentation/devicetree/bindings/input/da90??-onkey.txt
F: Documentation/devicetree/bindings/input/dlg,da72??.txt
F: Documentation/devicetree/bindings/mfd/da90*.txt
F: Documentation/devicetree/bindings/mfd/da90*.yaml
F: Documentation/devicetree/bindings/regulator/dlg,da9*.yaml
F: Documentation/devicetree/bindings/regulator/da92*.txt
F: Documentation/devicetree/bindings/regulator/slg51000.txt
......@@ -10388,7 +10389,7 @@ F: drivers/gpio/gpio-*cove.c
INTEL PMIC MULTIFUNCTION DEVICE DRIVERS
M: Andy Shevchenko <andy@kernel.org>
S: Maintained
S: Supported
F: drivers/mfd/intel_soc_pmic*
F: include/linux/mfd/intel_soc_pmic*
......@@ -12401,7 +12402,6 @@ F: Documentation/devicetree/bindings/*/maxim,max77686.yaml
F: Documentation/devicetree/bindings/*/maxim,max77693.yaml
F: Documentation/devicetree/bindings/*/maxim,max77843.yaml
F: Documentation/devicetree/bindings/clock/maxim,max77686.txt
F: Documentation/devicetree/bindings/mfd/max77693.txt
F: drivers/*/*max77843.c
F: drivers/*/max14577*.c
F: drivers/*/max77686*.c
......@@ -13872,7 +13872,7 @@ F: Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.yaml
F: drivers/media/i2c/mt9v111.c
MULTIFUNCTION DEVICES (MFD)
M: Lee Jones <lee.jones@linaro.org>
M: Lee Jones <lee@kernel.org>
S: Supported
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git
F: Documentation/devicetree/bindings/mfd/
......@@ -19689,7 +19689,7 @@ S: Maintained
F: drivers/mmc/host/sdhci-pci-dwc-mshc.c
SYSTEM CONFIGURATION (SYSCON)
M: Lee Jones <lee.jones@linaro.org>
M: Lee Jones <lee@kernel.org>
M: Arnd Bergmann <arnd@arndb.de>
S: Supported
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git
......
......@@ -81,11 +81,10 @@ int eseries_tmio_enable(struct platform_device *dev)
return 0;
}
int eseries_tmio_disable(struct platform_device *dev)
void eseries_tmio_disable(struct platform_device *dev)
{
gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0);
return 0;
}
int eseries_tmio_suspend(struct platform_device *dev)
......@@ -134,7 +133,6 @@ static void __init __maybe_unused eseries_register_clks(void)
static struct tc6387xb_platform_data e330_tc6387xb_info = {
.enable = &eseries_tmio_enable,
.disable = &eseries_tmio_disable,
.suspend = &eseries_tmio_suspend,
.resume = &eseries_tmio_resume,
};
......
......@@ -678,13 +678,11 @@ static int tosa_tc6393xb_enable(struct platform_device *dev)
return rc;
}
static int tosa_tc6393xb_disable(struct platform_device *dev)
static void tosa_tc6393xb_disable(struct platform_device *dev)
{
gpio_free(TOSA_GPIO_TC6393XB_L3V_ON);
gpio_free(TOSA_GPIO_TC6393XB_SUSPEND);
gpio_free(TOSA_GPIO_TC6393XB_REST_IN);
return 0;
}
static int tosa_tc6393xb_resume(struct platform_device *dev)
......
......@@ -1358,12 +1358,13 @@ config MFD_STA2X11
select REGMAP_MMIO
config MFD_SUN6I_PRCM
bool "Allwinner A31 PRCM controller"
bool "Allwinner A31/A23/A33 PRCM controller"
depends on ARCH_SUNXI || COMPILE_TEST
select MFD_CORE
help
Support for the PRCM (Power/Reset/Clock Management) unit available
in A31 SoC.
in the A31, A23, and A33 SoCs. Other Allwinner SoCs contain similar
hardware, but they do not use this driver.
config MFD_SYSCON
bool "System Controller Register R/W Based on Regmap"
......
......@@ -596,12 +596,11 @@ static __init int asic3_gpio_probe(struct platform_device *pdev,
return gpiochip_add_data(&asic->gpio, asic);
}
static int asic3_gpio_remove(struct platform_device *pdev)
static void asic3_gpio_remove(struct platform_device *pdev)
{
struct asic3 *asic = platform_get_drvdata(pdev);
gpiochip_remove(&asic->gpio);
return 0;
}
static void asic3_clk_enable(struct asic3 *asic, struct asic3_clk *clk)
......@@ -1030,7 +1029,6 @@ static int __init asic3_probe(struct platform_device *pdev)
static int asic3_remove(struct platform_device *pdev)
{
int ret;
struct asic3 *asic = platform_get_drvdata(pdev);
asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT),
......@@ -1038,9 +1036,8 @@ static int asic3_remove(struct platform_device *pdev)
asic3_mfd_remove(pdev);
ret = asic3_gpio_remove(pdev);
if (ret < 0)
return ret;
asic3_gpio_remove(pdev);
asic3_irq_remove(pdev);
asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), 0);
......
......@@ -619,6 +619,9 @@ static const struct mfd_cell axp20x_cells[] = {
static const struct mfd_cell axp221_cells[] = {
{
.name = "axp20x-gpio",
.of_compatible = "x-powers,axp221-gpio",
}, {
.name = "axp221-pek",
.num_resources = ARRAY_SIZE(axp22x_pek_resources),
.resources = axp22x_pek_resources,
......@@ -645,6 +648,9 @@ static const struct mfd_cell axp221_cells[] = {
static const struct mfd_cell axp223_cells[] = {
{
.name = "axp20x-gpio",
.of_compatible = "x-powers,axp221-gpio",
}, {
.name = "axp221-pek",
.num_resources = ARRAY_SIZE(axp22x_pek_resources),
.resources = axp22x_pek_resources,
......@@ -785,6 +791,9 @@ static const struct mfd_cell axp806_cells[] = {
static const struct mfd_cell axp809_cells[] = {
{
.name = "axp20x-gpio",
.of_compatible = "x-powers,axp221-gpio",
}, {
.name = "axp221-pek",
.num_resources = ARRAY_SIZE(axp809_pek_resources),
.resources = axp809_pek_resources,
......
......@@ -64,6 +64,11 @@ static const struct cros_feature_to_name cros_mcu_devices[] = {
.name = CROS_EC_DEV_SCP_NAME,
.desc = "System Control Processor",
},
{
.id = EC_FEATURE_SCP_C1,
.name = CROS_EC_DEV_SCP_C1_NAME,
.desc = "System Control Processor 2nd Core",
},
{
.id = EC_FEATURE_TOUCHPAD,
.name = CROS_EC_DEV_TP_NAME,
......
......@@ -798,7 +798,7 @@ void db8500_prcmu_get_abb_event_buffer(void __iomem **buf)
* @opp: The new ARM operating point to which transition is to be made
* Returns: 0 on success, non-zero on failure
*
* This function sets the the operating point of the ARM.
* This function sets the operating point of the ARM.
*/
int db8500_prcmu_set_arm_opp(u8 opp)
{
......
......@@ -91,11 +91,6 @@ struct dln2_mod_rx_slots {
spinlock_t lock;
};
enum dln2_endpoint {
DLN2_EP_OUT = 0,
DLN2_EP_IN = 1,
};
struct dln2_dev {
struct usb_device *usb_dev;
struct usb_interface *interface;
......@@ -777,16 +772,12 @@ static int dln2_probe(struct usb_interface *interface,
int ret;
int i, j;
if (hostif->desc.bInterfaceNumber != 0 ||
hostif->desc.bNumEndpoints < 2)
if (hostif->desc.bInterfaceNumber != 0)
return -ENODEV;
epout = &hostif->endpoint[DLN2_EP_OUT].desc;
if (!usb_endpoint_is_bulk_out(epout))
return -ENODEV;
epin = &hostif->endpoint[DLN2_EP_IN].desc;
if (!usb_endpoint_is_bulk_in(epin))
return -ENODEV;
ret = usb_find_common_endpoints(hostif, &epin, &epout, NULL, NULL);
if (ret)
return ret;
dln2 = kzalloc(sizeof(*dln2), GFP_KERNEL);
if (!dln2)
......
......@@ -385,6 +385,19 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
{ PCI_VDEVICE(INTEL, 0x7afc), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7afd), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7afe), (kernel_ulong_t)&bxt_uart_info },
/* MTL-P */
{ PCI_VDEVICE(INTEL, 0x7e25), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x7e26), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x7e27), (kernel_ulong_t)&bxt_info },
{ PCI_VDEVICE(INTEL, 0x7e30), (kernel_ulong_t)&bxt_info },
{ PCI_VDEVICE(INTEL, 0x7e46), (kernel_ulong_t)&bxt_info },
{ PCI_VDEVICE(INTEL, 0x7e50), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7e51), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7e52), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x7e78), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7e79), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7e7a), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7e7b), (kernel_ulong_t)&bxt_i2c_info },
/* LKF */
{ PCI_VDEVICE(INTEL, 0x98a8), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x98a9), (kernel_ulong_t)&bxt_uart_info },
......
This diff is collapsed.
......@@ -179,18 +179,13 @@ static int cht_wc_probe(struct i2c_client *client)
int ret;
status = acpi_evaluate_integer(ACPI_HANDLE(dev), "_HRV", NULL, &hrv);
if (ACPI_FAILURE(status)) {
dev_err(dev, "Failed to get PMIC hardware revision\n");
return -ENODEV;
}
if (hrv != CHT_WC_HRV) {
dev_err(dev, "Invalid PMIC hardware revision: %llu\n", hrv);
return -ENODEV;
}
if (client->irq < 0) {
dev_err(dev, "Invalid IRQ\n");
return -EINVAL;
}
if (ACPI_FAILURE(status))
return dev_err_probe(dev, -ENODEV, "Failed to get PMIC hardware revision\n");
if (hrv != CHT_WC_HRV)
return dev_err_probe(dev, -ENODEV, "Invalid PMIC hardware revision: %llu\n", hrv);
if (client->irq < 0)
return dev_err_probe(dev, -EINVAL, "Invalid IRQ\n");
pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);
if (!pmic)
......@@ -227,7 +222,7 @@ static void cht_wc_shutdown(struct i2c_client *client)
disable_irq(pmic->irq);
}
static int __maybe_unused cht_wc_suspend(struct device *dev)
static int cht_wc_suspend(struct device *dev)
{
struct intel_soc_pmic *pmic = dev_get_drvdata(dev);
......@@ -236,7 +231,7 @@ static int __maybe_unused cht_wc_suspend(struct device *dev)
return 0;
}
static int __maybe_unused cht_wc_resume(struct device *dev)
static int cht_wc_resume(struct device *dev)
{
struct intel_soc_pmic *pmic = dev_get_drvdata(dev);
......@@ -244,7 +239,7 @@ static int __maybe_unused cht_wc_resume(struct device *dev)
return 0;
}
static SIMPLE_DEV_PM_OPS(cht_wc_pm_ops, cht_wc_suspend, cht_wc_resume);
static DEFINE_SIMPLE_DEV_PM_OPS(cht_wc_pm_ops, cht_wc_suspend, cht_wc_resume);
static const struct i2c_device_id cht_wc_i2c_id[] = {
{ }
......@@ -258,7 +253,7 @@ static const struct acpi_device_id cht_wc_acpi_ids[] = {
static struct i2c_driver cht_wc_driver = {
.driver = {
.name = "CHT Whiskey Cove PMIC",
.pm = &cht_wc_pm_ops,
.pm = pm_sleep_ptr(&cht_wc_pm_ops),
.acpi_match_table = cht_wc_acpi_ids,
},
.probe_new = cht_wc_probe,
......
......@@ -419,9 +419,11 @@ static int max77620_initialise_fps(struct max77620_chip *chip)
ret = max77620_config_fps(chip, fps_child);
if (ret < 0) {
of_node_put(fps_child);
of_node_put(fps_np);
return ret;
}
}
of_node_put(fps_np);
config = chip->enable_global_lpm ? MAX77620_ONOFFCNFG2_SLP_LPM_MSK : 0;
ret = regmap_update_bits(chip->rmap, MAX77620_REG_ONOFFCNFG2,
......
......@@ -3,7 +3,7 @@
* Maxim MAX77714 Core Driver
*
* Copyright (C) 2022 Luca Ceresoli
* Author: Luca Ceresoli <luca@lucaceresoli.net>
* Author: Luca Ceresoli <luca.ceresoli@bootlin.com>
*/
#include <linux/i2c.h>
......@@ -148,5 +148,5 @@ static struct i2c_driver max77714_driver = {
module_i2c_driver(max77714_driver);
MODULE_DESCRIPTION("Maxim MAX77714 MFD core driver");
MODULE_AUTHOR("Luca Ceresoli <luca@lucaceresoli.net>");
MODULE_AUTHOR("Luca Ceresoli <luca.ceresoli@bootlin.com>");
MODULE_LICENSE("GPL");
......@@ -3,6 +3,8 @@
// Copyright (c) 2020 MediaTek Inc.
#include <linux/interrupt.h>
#include <linux/mfd/mt6357/core.h>
#include <linux/mfd/mt6357/registers.h>
#include <linux/mfd/mt6358/core.h>
#include <linux/mfd/mt6358/registers.h>
#include <linux/mfd/mt6359/core.h>
......@@ -17,6 +19,17 @@
#define MTK_PMIC_REG_WIDTH 16
static const struct irq_top_t mt6357_ints[] = {
MT6357_TOP_GEN(BUCK),
MT6357_TOP_GEN(LDO),
MT6357_TOP_GEN(PSC),
MT6357_TOP_GEN(SCK),
MT6357_TOP_GEN(BM),
MT6357_TOP_GEN(HK),
MT6357_TOP_GEN(AUD),
MT6357_TOP_GEN(MISC),
};
static const struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(BUCK),
MT6358_TOP_GEN(LDO),
......@@ -39,6 +52,13 @@ static const struct irq_top_t mt6359_ints[] = {
MT6359_TOP_GEN(MISC),
};
static struct pmic_irq_data mt6357_irqd = {
.num_top = ARRAY_SIZE(mt6357_ints),
.num_pmic_irqs = MT6357_IRQ_NR,
.top_int_status_reg = MT6357_TOP_INT_STATUS0,
.pmic_ints = mt6357_ints,
};
static struct pmic_irq_data mt6358_irqd = {
.num_top = ARRAY_SIZE(mt6358_ints),
.num_pmic_irqs = MT6358_IRQ_NR,
......@@ -211,6 +231,10 @@ int mt6358_irq_init(struct mt6397_chip *chip)
struct pmic_irq_data *irqd;
switch (chip->chip_id) {
case MT6357_CHIP_ID:
chip->irq_data = &mt6357_irqd;
break;
case MT6358_CHIP_ID:
case MT6366_CHIP_ID:
chip->irq_data = &mt6358_irqd;
......
......@@ -12,10 +12,14 @@
#include <linux/regmap.h>
#include <linux/mfd/core.h>
#include <linux/mfd/mt6323/core.h>
#include <linux/mfd/mt6331/core.h>
#include <linux/mfd/mt6357/core.h>
#include <linux/mfd/mt6358/core.h>
#include <linux/mfd/mt6359/core.h>
#include <linux/mfd/mt6397/core.h>
#include <linux/mfd/mt6323/registers.h>
#include <linux/mfd/mt6331/registers.h>
#include <linux/mfd/mt6357/registers.h>
#include <linux/mfd/mt6358/registers.h>
#include <linux/mfd/mt6359/registers.h>
#include <linux/mfd/mt6397/registers.h>
......@@ -23,6 +27,12 @@
#define MT6323_RTC_BASE 0x8000
#define MT6323_RTC_SIZE 0x40
#define MT6357_RTC_BASE 0x0588
#define MT6357_RTC_SIZE 0x3c
#define MT6331_RTC_BASE 0x4000
#define MT6331_RTC_SIZE 0x40
#define MT6358_RTC_BASE 0x0588
#define MT6358_RTC_SIZE 0x3c
......@@ -37,6 +47,16 @@ static const struct resource mt6323_rtc_resources[] = {
DEFINE_RES_IRQ(MT6323_IRQ_STATUS_RTC),
};
static const struct resource mt6357_rtc_resources[] = {
DEFINE_RES_MEM(MT6357_RTC_BASE, MT6357_RTC_SIZE),
DEFINE_RES_IRQ(MT6357_IRQ_RTC),
};
static const struct resource mt6331_rtc_resources[] = {
DEFINE_RES_MEM(MT6331_RTC_BASE, MT6331_RTC_SIZE),
DEFINE_RES_IRQ(MT6331_IRQ_STATUS_RTC),
};
static const struct resource mt6358_rtc_resources[] = {
DEFINE_RES_MEM(MT6358_RTC_BASE, MT6358_RTC_SIZE),
DEFINE_RES_IRQ(MT6358_IRQ_RTC),
......@@ -66,6 +86,18 @@ static const struct resource mt6323_keys_resources[] = {
DEFINE_RES_IRQ_NAMED(MT6323_IRQ_STATUS_FCHRKEY, "homekey"),
};
static const struct resource mt6357_keys_resources[] = {
DEFINE_RES_IRQ_NAMED(MT6357_IRQ_PWRKEY, "powerkey"),
DEFINE_RES_IRQ_NAMED(MT6357_IRQ_HOMEKEY, "homekey"),
DEFINE_RES_IRQ_NAMED(MT6357_IRQ_PWRKEY_R, "powerkey_r"),
DEFINE_RES_IRQ_NAMED(MT6357_IRQ_HOMEKEY_R, "homekey_r"),
};
static const struct resource mt6331_keys_resources[] = {
DEFINE_RES_IRQ_NAMED(MT6331_IRQ_STATUS_PWRKEY, "powerkey"),
DEFINE_RES_IRQ_NAMED(MT6331_IRQ_STATUS_HOMEKEY, "homekey"),
};
static const struct resource mt6397_keys_resources[] = {
DEFINE_RES_IRQ_NAMED(MT6397_IRQ_PWRKEY, "powerkey"),
DEFINE_RES_IRQ_NAMED(MT6397_IRQ_HOMEKEY, "homekey"),
......@@ -100,6 +132,43 @@ static const struct mfd_cell mt6323_devs[] = {
},
};
static const struct mfd_cell mt6357_devs[] = {
{
.name = "mt6357-regulator",
}, {
.name = "mt6357-rtc",
.num_resources = ARRAY_SIZE(mt6357_rtc_resources),
.resources = mt6357_rtc_resources,
.of_compatible = "mediatek,mt6357-rtc",
}, {
.name = "mtk-pmic-keys",
.num_resources = ARRAY_SIZE(mt6357_keys_resources),
.resources = mt6357_keys_resources,
.of_compatible = "mediatek,mt6357-keys"
},
};
/* MT6331 is always used in combination with MT6332 */
static const struct mfd_cell mt6331_mt6332_devs[] = {
{
.name = "mt6331-rtc",
.num_resources = ARRAY_SIZE(mt6331_rtc_resources),
.resources = mt6331_rtc_resources,
.of_compatible = "mediatek,mt6331-rtc",
}, {
.name = "mt6331-regulator",
.of_compatible = "mediatek,mt6331-regulator"
}, {
.name = "mt6332-regulator",
.of_compatible = "mediatek,mt6332-regulator"
}, {
.name = "mtk-pmic-keys",
.num_resources = ARRAY_SIZE(mt6331_keys_resources),
.resources = mt6331_keys_resources,
.of_compatible = "mediatek,mt6331-keys"
},
};
static const struct mfd_cell mt6358_devs[] = {
{
.name = "mt6358-regulator",
......@@ -179,6 +248,22 @@ static const struct chip_data mt6323_core = {
.irq_init = mt6397_irq_init,
};
static const struct chip_data mt6357_core = {
.cid_addr = MT6357_SWCID,
.cid_shift = 8,
.cells = mt6357_devs,
.cell_size = ARRAY_SIZE(mt6357_devs),
.irq_init = mt6358_irq_init,
};
static const struct chip_data mt6331_mt6332_core = {
.cid_addr = MT6331_HWCID,
.cid_shift = 0,
.cells = mt6331_mt6332_devs,
.cell_size = ARRAY_SIZE(mt6331_mt6332_devs),
.irq_init = mt6397_irq_init,
};
static const struct chip_data mt6358_core = {
.cid_addr = MT6358_SWCID,
.cid_shift = 8,
......@@ -261,6 +346,12 @@ static const struct of_device_id mt6397_of_match[] = {
{
.compatible = "mediatek,mt6323",
.data = &mt6323_core,
}, {
.compatible = "mediatek,mt6331",
.data = &mt6331_mt6332_core,
}, {
.compatible = "mediatek,mt6357",
.data = &mt6357_core,
}, {
.compatible = "mediatek,mt6358",
.data = &mt6358_core,
......
......@@ -12,6 +12,8 @@
#include <linux/suspend.h>
#include <linux/mfd/mt6323/core.h>
#include <linux/mfd/mt6323/registers.h>
#include <linux/mfd/mt6331/core.h>
#include <linux/mfd/mt6331/registers.h>
#include <linux/mfd/mt6397/core.h>
#include <linux/mfd/mt6397/registers.h>
......@@ -172,7 +174,12 @@ int mt6397_irq_init(struct mt6397_chip *chip)
chip->int_status[0] = MT6323_INT_STATUS0;
chip->int_status[1] = MT6323_INT_STATUS1;
break;
case MT6331_CHIP_ID:
chip->int_con[0] = MT6331_INT_CON0;
chip->int_con[1] = MT6331_INT_CON1;
chip->int_status[0] = MT6331_INT_STATUS_CON0;
chip->int_status[1] = MT6331_INT_STATUS_CON1;
break;
case MT6391_CHIP_ID:
case MT6397_CHIP_ID:
chip->int_con[0] = MT6397_INT_CON0;
......
......@@ -54,13 +54,6 @@ enum {
#define PM8008_PERIPH_OFFSET(paddr) (paddr - PM8008_PERIPH_0_BASE)
struct pm8008_data {
struct device *dev;
struct regmap *regmap;
int irq;
struct regmap_irq_chip_data *irq_data;
};
static unsigned int p0_offs[] = {PM8008_PERIPH_OFFSET(PM8008_PERIPH_0_BASE)};
static unsigned int p1_offs[] = {PM8008_PERIPH_OFFSET(PM8008_PERIPH_1_BASE)};
static unsigned int p2_offs[] = {PM8008_PERIPH_OFFSET(PM8008_PERIPH_2_BASE)};
......@@ -150,7 +143,7 @@ static struct regmap_config qcom_mfd_regmap_cfg = {
.max_register = 0xFFFF,
};
static int pm8008_init(struct pm8008_data *chip)
static int pm8008_init(struct regmap *regmap)
{
int rc;
......@@ -160,34 +153,31 @@ static int pm8008_init(struct pm8008_data *chip)
* This is required to enable the writing of TYPE registers in
* regmap_irq_sync_unlock().
*/
rc = regmap_write(chip->regmap,
(PM8008_TEMP_ALARM_ADDR | INT_SET_TYPE_OFFSET),
BIT(0));
rc = regmap_write(regmap, (PM8008_TEMP_ALARM_ADDR | INT_SET_TYPE_OFFSET), BIT(0));
if (rc)
return rc;
/* Do the same for GPIO1 and GPIO2 peripherals */
rc = regmap_write(chip->regmap,
(PM8008_GPIO1_ADDR | INT_SET_TYPE_OFFSET), BIT(0));
rc = regmap_write(regmap, (PM8008_GPIO1_ADDR | INT_SET_TYPE_OFFSET), BIT(0));
if (rc)
return rc;
rc = regmap_write(chip->regmap,
(PM8008_GPIO2_ADDR | INT_SET_TYPE_OFFSET), BIT(0));
rc = regmap_write(regmap, (PM8008_GPIO2_ADDR | INT_SET_TYPE_OFFSET), BIT(0));
return rc;
}
static int pm8008_probe_irq_peripherals(struct pm8008_data *chip,
static int pm8008_probe_irq_peripherals(struct device *dev,
struct regmap *regmap,
int client_irq)
{
int rc, i;
struct regmap_irq_type *type;
struct regmap_irq_chip_data *irq_data;
rc = pm8008_init(chip);
rc = pm8008_init(regmap);
if (rc) {
dev_err(chip->dev, "Init failed: %d\n", rc);
dev_err(dev, "Init failed: %d\n", rc);
return rc;
}
......@@ -207,10 +197,10 @@ static int pm8008_probe_irq_peripherals(struct pm8008_data *chip,
IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW);
}
rc = devm_regmap_add_irq_chip(chip->dev, chip->regmap, client_irq,
rc = devm_regmap_add_irq_chip(dev, regmap, client_irq,
IRQF_SHARED, 0, &pm8008_irq_chip, &irq_data);
if (rc) {
dev_err(chip->dev, "Failed to add IRQ chip: %d\n", rc);
dev_err(dev, "Failed to add IRQ chip: %d\n", rc);
return rc;
}
......@@ -220,26 +210,23 @@ static int pm8008_probe_irq_peripherals(struct pm8008_data *chip,
static int pm8008_probe(struct i2c_client *client)
{
int rc;
struct pm8008_data *chip;
chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
if (!chip)
return -ENOMEM;
struct device *dev;
struct regmap *regmap;
chip->dev = &client->dev;
chip->regmap = devm_regmap_init_i2c(client, &qcom_mfd_regmap_cfg);
if (!chip->regmap)
dev = &client->dev;
regmap = devm_regmap_init_i2c(client, &qcom_mfd_regmap_cfg);
if (!regmap)
return -ENODEV;
i2c_set_clientdata(client, chip);
i2c_set_clientdata(client, regmap);
if (of_property_read_bool(chip->dev->of_node, "interrupt-controller")) {
rc = pm8008_probe_irq_peripherals(chip, client->irq);
if (of_property_read_bool(dev->of_node, "interrupt-controller")) {
rc = pm8008_probe_irq_peripherals(dev, regmap, client->irq);
if (rc)
dev_err(chip->dev, "Failed to probe irq periphs: %d\n", rc);
dev_err(dev, "Failed to probe irq periphs: %d\n", rc);
}
return devm_of_platform_populate(chip->dev);
return devm_of_platform_populate(dev);
}
static const struct of_device_id pm8008_match[] = {
......
......@@ -101,8 +101,7 @@ static struct syscon *of_syscon_register(struct device_node *np, bool check_clk)
}
}
syscon_config.name = kasprintf(GFP_KERNEL, "%pOFn@%llx", np,
(u64)res.start);
syscon_config.name = kasprintf(GFP_KERNEL, "%pOFn@%pa", np, &res.start);
syscon_config.reg_stride = reg_io_width;
syscon_config.val_bits = reg_io_width * 8;
syscon_config.max_register = resource_size(&res) - reg_io_width;
......
......@@ -397,11 +397,8 @@ static int t7l66xb_probe(struct platform_device *dev)
static int t7l66xb_remove(struct platform_device *dev)
{
struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
int ret;
ret = pdata->disable(dev);
clk_disable_unprepare(t7l66xb->clk48m);
clk_put(t7l66xb->clk48m);
clk_disable_unprepare(t7l66xb->clk32k);
......@@ -412,8 +409,7 @@ static int t7l66xb_remove(struct platform_device *dev)
mfd_remove_devices(&dev->dev);
kfree(t7l66xb);
return ret;
return 0;
}
static struct platform_driver t7l66xb_platform_driver = {
......
......@@ -798,20 +798,19 @@ static int tc6393xb_remove(struct platform_device *dev)
{
struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev);
struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
int ret;
mfd_remove_devices(&dev->dev);
tc6393xb_detach_irq(dev);
ret = tcpd->disable(dev);
tcpd->disable(dev);
clk_disable_unprepare(tc6393xb->clk);
iounmap(tc6393xb->scr);
release_resource(&tc6393xb->rscr);
clk_put(tc6393xb->clk);
kfree(tc6393xb);
return ret;
return 0;
}
#ifdef CONFIG_PM
......
This diff is collapsed.
......@@ -75,8 +75,8 @@ struct ipaq_micro_rxdev {
* @id: 4-bit ID of the message
* @tx_len: length of TX data
* @tx_data: TX data to send
* @rx_len: length of receieved RX data
* @rx_data: RX data to recieve
* @rx_len: length of received RX data
* @rx_data: RX data to receive
* @ack: a completion that will be completed when RX is complete
* @node: list node if message gets queued
*/
......
......@@ -3,7 +3,7 @@
* Maxim MAX77714 Register and data structures definition.
*
* Copyright (C) 2022 Luca Ceresoli
* Author: Luca Ceresoli <luca@lucaceresoli.net>
* Author: Luca Ceresoli <luca.ceresoli@bootlin.com>
*/
#ifndef __LINUX_MFD_MAX77714_H_
......
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
*/
#ifndef __MFD_MT6331_CORE_H__
#define __MFD_MT6331_CORE_H__
enum mt6331_irq_status_numbers {
MT6331_IRQ_STATUS_PWRKEY = 0,
MT6331_IRQ_STATUS_HOMEKEY,
MT6331_IRQ_STATUS_CHRDET,
MT6331_IRQ_STATUS_THR_H,
MT6331_IRQ_STATUS_THR_L,
MT6331_IRQ_STATUS_BAT_H,
MT6331_IRQ_STATUS_BAT_L,
MT6331_IRQ_STATUS_RTC,
MT6331_IRQ_STATUS_AUDIO,
MT6331_IRQ_STATUS_MAD,
MT6331_IRQ_STATUS_ACCDET,
MT6331_IRQ_STATUS_ACCDET_EINT,
MT6331_IRQ_STATUS_ACCDET_NEGV = 12,
MT6331_IRQ_STATUS_VDVFS11_OC = 16,
MT6331_IRQ_STATUS_VDVFS12_OC,
MT6331_IRQ_STATUS_VDVFS13_OC,
MT6331_IRQ_STATUS_VDVFS14_OC,
MT6331_IRQ_STATUS_GPU_OC,
MT6331_IRQ_STATUS_VCORE1_OC,
MT6331_IRQ_STATUS_VCORE2_OC,
MT6331_IRQ_STATUS_VIO18_OC,
MT6331_IRQ_STATUS_LDO_OC,
MT6331_IRQ_STATUS_NR,
};
#define MT6331_IRQ_CON0_BASE MT6331_IRQ_STATUS_PWRKEY
#define MT6331_IRQ_CON0_BITS (MT6331_IRQ_STATUS_ACCDET_NEGV + 1)
#define MT6331_IRQ_CON1_BASE MT6331_IRQ_STATUS_VDVFS11_OC
#define MT6331_IRQ_CON1_BITS (MT6331_IRQ_STATUS_LDO_OC - MT6331_IRQ_STATUS_VDFS11_OC + 1)
#endif /* __MFD_MT6331_CORE_H__ */
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
*/
#ifndef __MFD_MT6332_CORE_H__
#define __MFD_MT6332_CORE_H__
enum mt6332_irq_status_numbers {
MT6332_IRQ_STATUS_CHR_COMPLETE = 0,
MT6332_IRQ_STATUS_THERMAL_SD,
MT6332_IRQ_STATUS_THERMAL_REG_IN,
MT6332_IRQ_STATUS_THERMAL_REG_OUT,
MT6332_IRQ_STATUS_OTG_OC,
MT6332_IRQ_STATUS_CHR_OC,
MT6332_IRQ_STATUS_OTG_THERMAL,
MT6332_IRQ_STATUS_CHRIN_SHORT,
MT6332_IRQ_STATUS_DRVCDT_SHORT,
MT6332_IRQ_STATUS_PLUG_IN_FLASH,
MT6332_IRQ_STATUS_CHRWDT_FLAG,
MT6332_IRQ_STATUS_FLASH_EN_TIMEOUT,
MT6332_IRQ_STATUS_FLASH_VLED1_SHORT,
MT6332_IRQ_STATUS_FLASH_VLED1_OPEN = 13,
MT6332_IRQ_STATUS_OV = 16,
MT6332_IRQ_STATUS_BVALID_DET,
MT6332_IRQ_STATUS_VBATON_UNDET,
MT6332_IRQ_STATUS_CHR_PLUG_IN,
MT6332_IRQ_STATUS_CHR_PLUG_OUT,
MT6332_IRQ_STATUS_BC11_TIMEOUT,
MT6332_IRQ_STATUS_FLASH_VLED2_SHORT,
MT6332_IRQ_STATUS_FLASH_VLED2_OPEN = 23,
MT6332_IRQ_STATUS_THR_H = 32,
MT6332_IRQ_STATUS_THR_L,
MT6332_IRQ_STATUS_BAT_H,
MT6332_IRQ_STATUS_BAT_L,
MT6332_IRQ_STATUS_M3_H,
MT6332_IRQ_STATUS_M3_L,
MT6332_IRQ_STATUS_FG_BAT_H,
MT6332_IRQ_STATUS_FG_BAT_L,
MT6332_IRQ_STATUS_FG_CUR_H,
MT6332_IRQ_STATUS_FG_CUR_L,
MT6332_IRQ_STATUS_SPKL_D,
MT6332_IRQ_STATUS_SPKL_AB,
MT6332_IRQ_STATUS_BIF,
MT6332_IRQ_STATUS_VWLED_OC = 45,
MT6332_IRQ_STATUS_VDRAM_OC = 48,
MT6332_IRQ_STATUS_VDVFS2_OC,
MT6332_IRQ_STATUS_VRF1_OC,
MT6332_IRQ_STATUS_VRF2_OC,
MT6332_IRQ_STATUS_VPA_OC,
MT6332_IRQ_STATUS_VSBST_OC,
MT6332_IRQ_STATUS_LDO_OC,
MT6332_IRQ_STATUS_NR,
};
#define MT6332_IRQ_CON0_BASE MT6332_IRQ_STATUS_CHR_COMPLETE
#define MT6332_IRQ_CON0_BITS (MT6332_IRQ_STATUS_FLASH_VLED1_OPEN + 1)
#define MT6332_IRQ_CON1_BASE MT6332_IRQ_STATUS_OV
#define MT6332_IRQ_CON1_BITS (MT6332_IRQ_STATUS_FLASH_VLED2_OPEN - MT6332_IRQ_STATUS_OV + 1)
#define MT6332_IRQ_CON2_BASE MT6332_IRQ_STATUS_THR_H
#define MT6332_IRQ_CON2_BITS (MT6332_IRQ_STATUS_VWLED_OC - MT6332_IRQ_STATUS_THR_H + 1)
#define MT6332_IRQ_CON3_BASE MT6332_IRQ_STATUS_VDRAM_OC
#define MT6332_IRQ_CON3_BITS (MT6332_IRQ_STATUS_LDO_OC - MT6332_IRQ_STATUS_VDRAM_OC + 1)
#endif /* __MFD_MT6332_CORE_H__ */
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022 BayLibre, SAS
* Author: Fabien Parent <fparent@baylibre.com>
*/
#ifndef __MFD_MT6357_CORE_H__
#define __MFD_MT6357_CORE_H__
enum mt6357_irq_top_status_shift {
MT6357_BUCK_TOP = 0,
MT6357_LDO_TOP,
MT6357_PSC_TOP,
MT6357_SCK_TOP,
MT6357_BM_TOP,
MT6357_HK_TOP,
MT6357_XPP_TOP,
MT6357_AUD_TOP,
MT6357_MISC_TOP,
};
enum mt6357_irq_numbers {
MT6357_IRQ_VPROC_OC = 0,
MT6357_IRQ_VCORE_OC,
MT6357_IRQ_VMODEM_OC,
MT6357_IRQ_VS1_OC,
MT6357_IRQ_VPA_OC,
MT6357_IRQ_VCORE_PREOC,
MT6357_IRQ_VFE28_OC = 16,
MT6357_IRQ_VXO22_OC,
MT6357_IRQ_VRF18_OC,
MT6357_IRQ_VRF12_OC,
MT6357_IRQ_VEFUSE_OC,
MT6357_IRQ_VCN33_OC,
MT6357_IRQ_VCN28_OC,
MT6357_IRQ_VCN18_OC,
MT6357_IRQ_VCAMA_OC,
MT6357_IRQ_VCAMD_OC,
MT6357_IRQ_VCAMIO_OC,
MT6357_IRQ_VLDO28_OC,
MT6357_IRQ_VUSB33_OC,
MT6357_IRQ_VAUX18_OC,
MT6357_IRQ_VAUD28_OC,
MT6357_IRQ_VIO28_OC,
MT6357_IRQ_VIO18_OC,
MT6357_IRQ_VSRAM_PROC_OC,
MT6357_IRQ_VSRAM_OTHERS_OC,
MT6357_IRQ_VIBR_OC,
MT6357_IRQ_VDRAM_OC,
MT6357_IRQ_VMC_OC,
MT6357_IRQ_VMCH_OC,
MT6357_IRQ_VEMC_OC,
MT6357_IRQ_VSIM1_OC,
MT6357_IRQ_VSIM2_OC,
MT6357_IRQ_PWRKEY = 48,
MT6357_IRQ_HOMEKEY,
MT6357_IRQ_PWRKEY_R,
MT6357_IRQ_HOMEKEY_R,
MT6357_IRQ_NI_LBAT_INT,
MT6357_IRQ_CHRDET,
MT6357_IRQ_CHRDET_EDGE,
MT6357_IRQ_VCDT_HV_DET,
MT6357_IRQ_WATCHDOG,
MT6357_IRQ_VBATON_UNDET,
MT6357_IRQ_BVALID_DET,
MT6357_IRQ_OV,
MT6357_IRQ_RTC = 64,
MT6357_IRQ_FG_BAT0_H = 80,
MT6357_IRQ_FG_BAT0_L,
MT6357_IRQ_FG_CUR_H,
MT6357_IRQ_FG_CUR_L,
MT6357_IRQ_FG_ZCV,
MT6357_IRQ_BATON_LV = 96,
MT6357_IRQ_BATON_HT,
MT6357_IRQ_BAT_H = 112,
MT6357_IRQ_BAT_L,
MT6357_IRQ_AUXADC_IMP,
MT6357_IRQ_NAG_C_DLTV,
MT6357_IRQ_AUDIO = 128,
MT6357_IRQ_ACCDET = 133,
MT6357_IRQ_ACCDET_EINT0,
MT6357_IRQ_ACCDET_EINT1,
MT6357_IRQ_SPI_CMD_ALERT = 144,
MT6357_IRQ_NR,
};
#define MT6357_IRQ_BUCK_BASE MT6357_IRQ_VPROC_OC
#define MT6357_IRQ_LDO_BASE MT6357_IRQ_VFE28_OC
#define MT6357_IRQ_PSC_BASE MT6357_IRQ_PWRKEY
#define MT6357_IRQ_SCK_BASE MT6357_IRQ_RTC
#define MT6357_IRQ_BM_BASE MT6357_IRQ_FG_BAT0_H
#define MT6357_IRQ_HK_BASE MT6357_IRQ_BAT_H
#define MT6357_IRQ_AUD_BASE MT6357_IRQ_AUDIO
#define MT6357_IRQ_MISC_BASE MT6357_IRQ_SPI_CMD_ALERT
#define MT6357_IRQ_BUCK_BITS (MT6357_IRQ_VCORE_PREOC - MT6357_IRQ_BUCK_BASE + 1)
#define MT6357_IRQ_LDO_BITS (MT6357_IRQ_VSIM2_OC - MT6357_IRQ_LDO_BASE + 1)
#define MT6357_IRQ_PSC_BITS (MT6357_IRQ_VCDT_HV_DET - MT6357_IRQ_PSC_BASE + 1)
#define MT6357_IRQ_SCK_BITS (MT6357_IRQ_RTC - MT6357_IRQ_SCK_BASE + 1)
#define MT6357_IRQ_BM_BITS (MT6357_IRQ_BATON_HT - MT6357_IRQ_BM_BASE + 1)
#define MT6357_IRQ_HK_BITS (MT6357_IRQ_NAG_C_DLTV - MT6357_IRQ_HK_BASE + 1)
#define MT6357_IRQ_AUD_BITS (MT6357_IRQ_ACCDET_EINT1 - MT6357_IRQ_AUD_BASE + 1)
#define MT6357_IRQ_MISC_BITS \
(MT6357_IRQ_SPI_CMD_ALERT - MT6357_IRQ_MISC_BASE + 1)
#define MT6357_TOP_GEN(sp) \
{ \
.hwirq_base = MT6357_IRQ_##sp##_BASE, \
.num_int_regs = \
((MT6357_IRQ_##sp##_BITS - 1) / \
MTK_PMIC_REG_WIDTH) + 1, \
.en_reg = MT6357_##sp##_TOP_INT_CON0, \
.en_reg_shift = 0x6, \
.sta_reg = MT6357_##sp##_TOP_INT_STATUS0, \
.sta_reg_shift = 0x2, \
.top_offset = MT6357_##sp##_TOP, \
}
#endif /* __MFD_MT6357_CORE_H__ */
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......@@ -12,6 +12,9 @@
enum chip_id {
MT6323_CHIP_ID = 0x23,
MT6331_CHIP_ID = 0x20,
MT6332_CHIP_ID = 0x20,
MT6357_CHIP_ID = 0x57,
MT6358_CHIP_ID = 0x58,
MT6359_CHIP_ID = 0x59,
MT6366_CHIP_ID = 0x66,
......
......@@ -12,7 +12,6 @@
struct t7l66xb_platform_data {
int (*enable)(struct platform_device *dev);
int (*disable)(struct platform_device *dev);
int (*suspend)(struct platform_device *dev);
int (*resume)(struct platform_device *dev);
......
......@@ -12,7 +12,6 @@
struct tc6387xb_platform_data {
int (*enable)(struct platform_device *dev);
int (*disable)(struct platform_device *dev);
int (*suspend)(struct platform_device *dev);
int (*resume)(struct platform_device *dev);
};
......
......@@ -22,7 +22,7 @@ struct tc6393xb_platform_data {
u16 scr_gper; /* GP Enable */
int (*enable)(struct platform_device *dev);
int (*disable)(struct platform_device *dev);
void (*disable)(struct platform_device *dev);
int (*suspend)(struct platform_device *dev);
int (*resume)(struct platform_device *dev);
......
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......@@ -1300,6 +1300,8 @@ enum ec_feature_code {
* mux.
*/
EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43,
/* The MCU is a System Companion Processor (SCP) 2nd Core. */
EC_FEATURE_SCP_C1 = 45,
};
#define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
......
This diff is collapsed.
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