Commit 616043d5 authored by Pramod Kumar's avatar Pramod Kumar Committed by Linus Walleij

pinctrl: Rename gpio driver from cygnus to iproc

Rename gpio driver file name from pinctrl-cygnus-gpio.c to
pinctrl-iproc-gpio.c to make it more generic so that all
iproc based future SoCs using the same gpio block could
use this driver.
Signed-off-by: default avatarPramod Kumar <pramodku@broadcom.com>
Reviewed-by: default avatarRay Jui <rjui@broadcom.com>
Reviewed-by: default avatarScott Branden <sbranden@broadcom.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 604b2579
......@@ -20,27 +20,41 @@ config PINCTRL_BCM2835
select PINMUX
select PINCONF
config PINCTRL_CYGNUS_GPIO
bool "Broadcom Cygnus GPIO (with PINCONF) driver"
depends on OF_GPIO && ARCH_BCM_CYGNUS
config PINCTRL_IPROC_GPIO
bool "Broadcom iProc GPIO (with PINCONF) driver"
depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
select GPIOLIB_IRQCHIP
select PINCONF
select GENERIC_PINCONF
default ARCH_BCM_CYGNUS
default ARCH_BCM_IPROC
help
Say yes here to enable the Broadcom Cygnus GPIO driver.
Say yes here to enable the Broadcom iProc GPIO driver.
The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use
same GPIO Controller IP hence this driver could be used for all.
The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU
GPIO controller (ASIU), the chipCommonG GPIO controller (CCM), and
the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
supported by this driver.
All 3 Cygnus GPIO controllers support basic PINCONF functions such
The Broadcom NSP has two GPIO controllers including the ChipcommonA
GPIO, the ChipcommonB GPIO. Later controller is supported by this
driver.
The Broadcom NS2 has two GPIO controller including the CRMU GPIO,
the ChipcommonG GPIO. Both controllers are supported by this driver.
The Broadcom Stingray GPIO controllers are supported by this driver.
All above SoCs GPIO controllers support basic PINCONF functions such
as bias pull up, pull down, and drive strength configurations, when
these pins are muxed to GPIO.
Pins from the ASIU GPIO can be individually muxed to GPIO function,
through interaction with the Cygnus IOMUX controller.
It provides the framework where pins from the individual GPIO can be
individually muxed to GPIO function, through interaction with the
SoCs IOMUX controller. This features could be used only on SoCs which
support individual pin muxing.
config PINCTRL_CYGNUS_MUX
bool "Broadcom Cygnus IOMUX driver"
......
......@@ -2,5 +2,5 @@
obj-$(CONFIG_PINCTRL_BCM281XX) += pinctrl-bcm281xx.o
obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o
obj-$(CONFIG_PINCTRL_CYGNUS_GPIO) += pinctrl-cygnus-gpio.o
obj-$(CONFIG_PINCTRL_IPROC_GPIO) += pinctrl-iproc-gpio.o
obj-$(CONFIG_PINCTRL_CYGNUS_MUX) += pinctrl-cygnus-mux.o
......@@ -531,8 +531,7 @@ static int iproc_pin_config_get(struct pinctrl_dev *pctldev, unsigned pin,
ret = iproc_gpio_get_strength(chip, gpio, &arg);
if (ret)
return ret;
else
*config = pinconf_to_config_packed(param, arg);
*config = pinconf_to_config_packed(param, arg);
return 0;
......
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