Commit 6296562f authored by Basavaraj Natikar's avatar Basavaraj Natikar Committed by Jiri Kosina

HID: amd_sfh: Extend MP2 register access to SFH

Various MP2 register sets are supported by newer processors. Therefore,
extend MP2 register access to SFH.
Signed-off-by: default avatarBasavaraj Natikar <Basavaraj.Natikar@amd.com>
Signed-off-by: default avatarJiri Kosina <jkosina@suse.com>
parent 2105e8e0
...@@ -19,6 +19,9 @@ ...@@ -19,6 +19,9 @@
#define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4)) #define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4))
#define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4)) #define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4))
#define AMD_C2P_MSG_V1(regno) (0x10900 + ((regno) * 4))
#define AMD_P2C_MSG_V1(regno) (0x10500 + ((regno) * 4))
#define SENSOR_ENABLED 4 #define SENSOR_ENABLED 4
#define SENSOR_DISABLED 5 #define SENSOR_DISABLED 5
...@@ -55,6 +58,7 @@ struct amd_mp2_dev { ...@@ -55,6 +58,7 @@ struct amd_mp2_dev {
struct sfh_dev_status dev_en; struct sfh_dev_status dev_en;
struct work_struct work; struct work_struct work;
u8 init_done; u8 init_done;
u8 rver;
}; };
struct amd_mp2_ops { struct amd_mp2_ops {
...@@ -81,4 +85,14 @@ void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata); ...@@ -81,4 +85,14 @@ void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata);
int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata); int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata);
void amd_sfh_clear_intr(struct amd_mp2_dev *privdata); void amd_sfh_clear_intr(struct amd_mp2_dev *privdata);
int amd_sfh_irq_init(struct amd_mp2_dev *privdata); int amd_sfh_irq_init(struct amd_mp2_dev *privdata);
static inline u64 amd_get_c2p_val(struct amd_mp2_dev *mp2, u32 idx)
{
return mp2->rver == 1 ? AMD_C2P_MSG_V1(idx) : AMD_C2P_MSG(idx);
}
static inline u64 amd_get_p2c_val(struct amd_mp2_dev *mp2, u32 idx)
{
return mp2->rver == 1 ? AMD_P2C_MSG_V1(idx) : AMD_P2C_MSG(idx);
}
#endif #endif
...@@ -99,9 +99,9 @@ static void amd_stop_all_sensor_v2(struct amd_mp2_dev *privdata) ...@@ -99,9 +99,9 @@ static void amd_stop_all_sensor_v2(struct amd_mp2_dev *privdata)
void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata) void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata)
{ {
if (readl(privdata->mmio + AMD_P2C_MSG(4))) { if (readl(privdata->mmio + amd_get_p2c_val(privdata, 4))) {
writel(0, privdata->mmio + AMD_P2C_MSG(4)); writel(0, privdata->mmio + amd_get_p2c_val(privdata, 4));
writel(0xf, privdata->mmio + AMD_P2C_MSG(5)); writel(0xf, privdata->mmio + amd_get_p2c_val(privdata, 5));
} }
} }
...@@ -410,6 +410,9 @@ static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i ...@@ -410,6 +410,9 @@ static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i
privdata->sfh1_1_ops = (const struct amd_sfh1_1_ops *)id->driver_data; privdata->sfh1_1_ops = (const struct amd_sfh1_1_ops *)id->driver_data;
if (privdata->sfh1_1_ops) { if (privdata->sfh1_1_ops) {
if (boot_cpu_data.x86 >= 0x1A)
privdata->rver = 1;
rc = devm_work_autocancel(&pdev->dev, &privdata->work, sfh1_1_init_work); rc = devm_work_autocancel(&pdev->dev, &privdata->work, sfh1_1_init_work);
if (rc) if (rc)
return rc; return rc;
......
...@@ -251,7 +251,7 @@ static u8 get_input_rep(u8 current_index, int sensor_idx, int report_id, ...@@ -251,7 +251,7 @@ static u8 get_input_rep(u8 current_index, int sensor_idx, int report_id,
break; break;
case HPD_IDX: case HPD_IDX:
get_common_inputs(&hpd_input.common_property, report_id); get_common_inputs(&hpd_input.common_property, report_id);
hpdstatus.val = readl(mp2->mmio + AMD_C2P_MSG(4)); hpdstatus.val = readl(mp2->mmio + amd_get_c2p_val(mp2, 4));
hpd_input.human_presence = hpdstatus.shpd.presence; hpd_input.human_presence = hpdstatus.shpd.presence;
report_size = sizeof(hpd_input); report_size = sizeof(hpd_input);
memcpy(input_report, &hpd_input, sizeof(hpd_input)); memcpy(input_report, &hpd_input, sizeof(hpd_input));
......
...@@ -172,7 +172,7 @@ static int amd_sfh1_1_hid_client_init(struct amd_mp2_dev *privdata) ...@@ -172,7 +172,7 @@ static int amd_sfh1_1_hid_client_init(struct amd_mp2_dev *privdata)
if (rc) if (rc)
goto cleanup; goto cleanup;
writel(0, privdata->mmio + AMD_P2C_MSG(0)); writel(0, privdata->mmio + amd_get_p2c_val(privdata, 0));
mp2_ops->start(privdata, info); mp2_ops->start(privdata, info);
status = amd_sfh_wait_for_response status = amd_sfh_wait_for_response
(privdata, cl_data->sensor_idx[i], ENABLE_SENSOR); (privdata, cl_data->sensor_idx[i], ENABLE_SENSOR);
...@@ -298,7 +298,7 @@ static void amd_sfh_set_ops(struct amd_mp2_dev *mp2) ...@@ -298,7 +298,7 @@ static void amd_sfh_set_ops(struct amd_mp2_dev *mp2)
int amd_sfh1_1_init(struct amd_mp2_dev *mp2) int amd_sfh1_1_init(struct amd_mp2_dev *mp2)
{ {
u32 phy_base = readl(mp2->mmio + AMD_C2P_MSG(22)); u32 phy_base = readl(mp2->mmio + amd_get_c2p_val(mp2, 22));
struct device *dev = &mp2->pdev->dev; struct device *dev = &mp2->pdev->dev;
struct sfh_base_info binfo; struct sfh_base_info binfo;
int rc; int rc;
......
...@@ -20,7 +20,7 @@ static int amd_sfh_wait_response(struct amd_mp2_dev *mp2, u8 sid, u32 cmd_id) ...@@ -20,7 +20,7 @@ static int amd_sfh_wait_response(struct amd_mp2_dev *mp2, u8 sid, u32 cmd_id)
struct sfh_cmd_response cmd_resp; struct sfh_cmd_response cmd_resp;
/* Get response with status within a max of 10000 ms timeout */ /* Get response with status within a max of 10000 ms timeout */
if (!readl_poll_timeout(mp2->mmio + AMD_P2C_MSG(0), cmd_resp.resp, if (!readl_poll_timeout(mp2->mmio + amd_get_p2c_val(mp2, 0), cmd_resp.resp,
(cmd_resp.response.response == 0 && (cmd_resp.response.response == 0 &&
cmd_resp.response.cmd_id == cmd_id && (sid == 0xff || cmd_resp.response.cmd_id == cmd_id && (sid == 0xff ||
cmd_resp.response.sensor_id == sid)), 500, 10000000)) cmd_resp.response.sensor_id == sid)), 500, 10000000))
...@@ -39,7 +39,7 @@ static void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor ...@@ -39,7 +39,7 @@ static void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor
cmd_base.cmd.sub_cmd_value = 1; cmd_base.cmd.sub_cmd_value = 1;
cmd_base.cmd.sensor_id = info.sensor_idx; cmd_base.cmd.sensor_id = info.sensor_idx;
writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG(0)); writel(cmd_base.ul, privdata->mmio + amd_get_c2p_val(privdata, 0));
} }
static void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx) static void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx)
...@@ -52,8 +52,8 @@ static void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx) ...@@ -52,8 +52,8 @@ static void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx)
cmd_base.cmd.sub_cmd_value = 1; cmd_base.cmd.sub_cmd_value = 1;
cmd_base.cmd.sensor_id = sensor_idx; cmd_base.cmd.sensor_id = sensor_idx;
writeq(0x0, privdata->mmio + AMD_C2P_MSG(1)); writeq(0x0, privdata->mmio + amd_get_c2p_val(privdata, 1));
writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG(0)); writel(cmd_base.ul, privdata->mmio + amd_get_c2p_val(privdata, 0));
} }
static void amd_stop_all_sensor(struct amd_mp2_dev *privdata) static void amd_stop_all_sensor(struct amd_mp2_dev *privdata)
...@@ -66,7 +66,7 @@ static void amd_stop_all_sensor(struct amd_mp2_dev *privdata) ...@@ -66,7 +66,7 @@ static void amd_stop_all_sensor(struct amd_mp2_dev *privdata)
/* 0xf indicates all sensors */ /* 0xf indicates all sensors */
cmd_base.cmd.sensor_id = 0xf; cmd_base.cmd.sensor_id = 0xf;
writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG(0)); writel(cmd_base.ul, privdata->mmio + amd_get_c2p_val(privdata, 0));
} }
static struct amd_mp2_ops amd_sfh_ops = { static struct amd_mp2_ops amd_sfh_ops = {
......
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