Commit 62b24c7f authored by Rafał Miłecki's avatar Rafał Miłecki Committed by AngeloGioacchino Del Regno

arm64: dts: mediatek: mt7981: add pinctrl

MT7981 contains on-SoC PIN controller that is also a GPIO provider.
Signed-off-by: default avatarRafał Miłecki <rafal@milecki.pl>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240317223206.22033-4-zajec5@gmail.comSigned-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
parent c016058b
......@@ -86,6 +86,28 @@ pwm@10048000 {
#pwm-cells = <2>;
};
pio: pinctrl@11d00000 {
compatible = "mediatek,mt7981-pinctrl";
reg = <0 0x11d00000 0 0x1000>,
<0 0x11c00000 0 0x1000>,
<0 0x11c10000 0 0x1000>,
<0 0x11d20000 0 0x1000>,
<0 0x11e00000 0 0x1000>,
<0 0x11e20000 0 0x1000>,
<0 0x11f00000 0 0x1000>,
<0 0x11f10000 0 0x1000>,
<0 0x1000b000 0 0x1000>;
reg-names = "gpio", "iocfg_rt", "iocfg_rm", "iocfg_rb", "iocfg_lb",
"iocfg_bl", "iocfg_tm", "iocfg_tl", "eint";
interrupt-controller;
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
gpio-ranges = <&pio 0 0 56>;
gpio-controller;
#gpio-cells = <2>;
#interrupt-cells = <2>;
};
clock-controller@15000000 {
compatible = "mediatek,mt7981-ethsys", "syscon";
reg = <0 0x15000000 0 0x1000>;
......
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