Commit 63015d73 authored by Roger Quadros's avatar Roger Quadros Committed by Tony Lindgren

ARM: dts: am335x: Provide NAND ready pin

On these boards NAND ready pin status is avilable over
GPMC_WAIT0 pin.

For NAND we don't use GPMC wait pin monitoring but
get the NAND Ready/Busy# status using GPIOlib.
GPMC driver provides the WAIT0 pin status over GPIOlib.

Read speed increases from 7869 KiB/ to 8875 KiB/s
and write speed was unchanged at 5100 KiB/s.

Measured using mtd_speedtest.ko on am335x-evm.

Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Rostislav Lisovy <lisovy@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: default avatarRoger Quadros <rogerq@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 99a41011
...@@ -241,6 +241,7 @@ nand@0,0 { ...@@ -241,6 +241,7 @@ nand@0,0 {
interrupt-parent = <&gpmc>; interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */ <1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
nand-bus-width = <8>; nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8"; ti,nand-ecc-opt = "bch8";
ti,nand-xfer-type = "polled"; ti,nand-xfer-type = "polled";
......
...@@ -214,6 +214,7 @@ nand@0,0 { ...@@ -214,6 +214,7 @@ nand@0,0 {
interrupt-parent = <&gpmc>; interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */ <1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
ti,nand-ecc-opt = "bch8"; ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>; ti,elm-id = <&elm>;
nand-bus-width = <8>; nand-bus-width = <8>;
......
...@@ -411,6 +411,7 @@ nand@0,0 { ...@@ -411,6 +411,7 @@ nand@0,0 {
interrupt-parent = <&gpmc>; interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */ <1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
ti,nand-ecc-opt = "bch8"; ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>; ti,elm-id = <&elm>;
nand-bus-width = <8>; nand-bus-width = <8>;
......
...@@ -524,6 +524,7 @@ nand@0,0 { ...@@ -524,6 +524,7 @@ nand@0,0 {
interrupt-parent = <&gpmc>; interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */ <1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
ti,nand-ecc-opt = "bch8"; ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>; ti,elm-id = <&elm>;
nand-bus-width = <8>; nand-bus-width = <8>;
......
...@@ -135,6 +135,7 @@ nand@0,0 { ...@@ -135,6 +135,7 @@ nand@0,0 {
interrupt-parent = <&gpmc>; interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */ <1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
nand-bus-width = <8>; nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8"; ti,nand-ecc-opt = "bch8";
gpmc,device-width = <1>; gpmc,device-width = <1>;
......
...@@ -171,6 +171,7 @@ nandflash: nand@0,0 { ...@@ -171,6 +171,7 @@ nandflash: nand@0,0 {
interrupt-parent = <&gpmc>; interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */ <1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
nand-bus-width = <8>; nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8"; ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true"; gpmc,device-nand = "true";
......
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