Commit 63070d7c authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Geert Uytterhoeven

arm64: dts: renesas: Add Renesas Falcon boards support

Initial support for the Renesas Falcon CPU and BreakOut boards
support.
Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1599739372-30669-5-git-send-email-yoshihiro.shimoda.uh@renesas.comSigned-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 834c310f
......@@ -54,3 +54,5 @@ dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-v3hsk.dtb
dtb-$(CONFIG_ARCH_R8A77990) += r8a77990-ebisu.dtb
dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
dtb-$(CONFIG_ARCH_R8A779A0) += r8a779a0-falcon.dtb
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Falcon CPU board
*
* Copyright (C) 2020 Renesas Electronics Corp.
*/
#include "r8a779a0.dtsi"
/ {
model = "Renesas Falcon CPU board";
compatible = "renesas,falcon-cpu", "renesas,r8a779a0";
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
memory@500000000 {
device_type = "memory";
reg = <0x5 0x00000000 0x0 0x80000000>;
};
memory@600000000 {
device_type = "memory";
reg = <0x6 0x00000000 0x0 0x80000000>;
};
memory@700000000 {
device_type = "memory";
reg = <0x7 0x00000000 0x0 0x80000000>;
};
};
&extal_clk {
clock-frequency = <16666666>;
};
&extalr_clk {
clock-frequency = <32768>;
};
&scif0 {
status = "okay";
};
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Falcon CPU and BreakOut boards
*
* Copyright (C) 2020 Renesas Electronics Corp.
*/
/dts-v1/;
#include "r8a779a0-falcon-cpu.dtsi"
/ {
model = "Renesas Falcon CPU and Breakout boards based on r8a779a0";
compatible = "renesas,falcon-breakout", "renesas,falcon-cpu", "renesas,r8a779a0";
aliases {
serial0 = &scif0;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
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