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Commit 6457205c authored by Candice Li's avatar Candice Li Committed by Alex Deucher
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drm/amd/amdgpu: consolidate PSP TA context 

Signed-off-by: default avatarCandice Li <candice.li@amd.com>
Reviewed-by: default avatarJohn Clements <john.clements@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3e183e2f
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Inline Side-by-side
Showing with 158 additions and 187 deletions
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
View file @ 6457205c
......@@ -341,27 +341,27 @@ static int amdgpu_firmware_info(struct drm_amdgpu_info_firmware *fw_info,
switch (query_fw->index) {
case TA_FW_TYPE_PSP_XGMI:
fw_info->ver = adev->psp.ta_fw_version;
fw_info->feature = adev->psp.ta_xgmi_ucode_version;
fw_info->feature = adev->psp.xgmi.feature_version;
break;
case TA_FW_TYPE_PSP_RAS:
fw_info->ver = adev->psp.ta_fw_version;
fw_info->feature = adev->psp.ta_ras_ucode_version;
fw_info->feature = adev->psp.ras.feature_version;
break;
case TA_FW_TYPE_PSP_HDCP:
fw_info->ver = adev->psp.ta_fw_version;
fw_info->feature = adev->psp.ta_hdcp_ucode_version;
fw_info->feature = adev->psp.hdcp.feature_version;
break;
case TA_FW_TYPE_PSP_DTM:
fw_info->ver = adev->psp.ta_fw_version;
fw_info->feature = adev->psp.ta_dtm_ucode_version;
fw_info->feature = adev->psp.dtm.feature_version;
break;
case TA_FW_TYPE_PSP_RAP:
fw_info->ver = adev->psp.ta_fw_version;
fw_info->feature = adev->psp.ta_rap_ucode_version;
fw_info->feature = adev->psp.rap.feature_version;
break;
case TA_FW_TYPE_PSP_SECUREDISPLAY:
fw_info->ver = adev->psp.ta_fw_version;
fw_info->feature = adev->psp.ta_securedisplay_ucode_version;
fw_info->feature = adev->psp.securedisplay.feature_version;
break;
default:
return -EINVAL;
......@@ -378,8 +378,8 @@ static int amdgpu_firmware_info(struct drm_amdgpu_info_firmware *fw_info,
fw_info->feature = adev->psp.sos.feature_version;
break;
case AMDGPU_INFO_FW_ASD:
fw_info->ver = adev->psp.asd_fw_version;
fw_info->feature = adev->psp.asd_feature_version;
fw_info->ver = adev->psp.asd.fw_version;
fw_info->feature = adev->psp.asd.feature_version;
break;
case AMDGPU_INFO_FW_DMCU:
fw_info->ver = adev->dm.dmcu_fw_version;
......
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
View file @ 6457205c
This diff is collapsed.
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
View file @ 6457205c
......@@ -327,11 +327,8 @@ struct psp_context
uint64_t tmr_mc_addr;
/* asd firmware */
const struct firmware *asd_fw;
uint32_t asd_fw_version;
uint32_t asd_feature_version;
uint32_t asd_ucode_size;
uint8_t *asd_start_addr;
const struct firmware *asd_fw;
struct psp_bin_desc asd;
/* toc firmware */
const struct firmware *toc_fw;
......@@ -356,32 +353,16 @@ struct psp_context
/* xgmi ta firmware and buffer */
const struct firmware *ta_fw;
uint32_t ta_fw_version;
uint32_t ta_xgmi_ucode_version;
uint32_t ta_xgmi_ucode_size;
uint8_t *ta_xgmi_start_addr;
uint32_t ta_ras_ucode_version;
uint32_t ta_ras_ucode_size;
uint8_t *ta_ras_start_addr;
uint32_t ta_hdcp_ucode_version;
uint32_t ta_hdcp_ucode_size;
uint8_t *ta_hdcp_start_addr;
uint32_t ta_dtm_ucode_version;
uint32_t ta_dtm_ucode_size;
uint8_t *ta_dtm_start_addr;
uint32_t ta_rap_ucode_version;
uint32_t ta_rap_ucode_size;
uint8_t *ta_rap_start_addr;
uint32_t ta_securedisplay_ucode_version;
uint32_t ta_securedisplay_ucode_size;
uint8_t *ta_securedisplay_start_addr;
struct psp_bin_desc xgmi;
struct psp_bin_desc ras;
struct psp_bin_desc hdcp;
struct psp_bin_desc dtm;
struct psp_bin_desc rap;
struct psp_bin_desc securedisplay;
struct psp_asd_context asd_context;
struct psp_xgmi_context xgmi_context;
struct psp_ras_context ras;
struct psp_ras_context ras_context;
struct psp_hdcp_context hdcp_context;
struct psp_dtm_context dtm_context;
struct psp_rap_context rap_context;
......
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
View file @ 6457205c
......@@ -1866,7 +1866,7 @@ int amdgpu_ras_save_bad_pages(struct amdgpu_device *adev)
static int amdgpu_ras_load_bad_pages(struct amdgpu_device *adev)
{
struct amdgpu_ras_eeprom_control *control =
&adev->psp.ras.ras->eeprom_control;
&adev->psp.ras_context.ras->eeprom_control;
struct eeprom_table_record *bps;
int ret;
......
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
View file @ 6457205c
......@@ -470,8 +470,8 @@ struct ras_debug_if {
* 8: feature disable
*/
#define amdgpu_ras_get_context(adev) ((adev)->psp.ras.ras)
#define amdgpu_ras_set_context(adev, ras_con) ((adev)->psp.ras.ras = (ras_con))
#define amdgpu_ras_get_context(adev) ((adev)->psp.ras_context.ras)
#define amdgpu_ras_set_context(adev, ras_con) ((adev)->psp.ras_context.ras = (ras_con))
/* check if ras is supported on block, say, sdma, gfx */
static inline int amdgpu_ras_is_supported(struct amdgpu_device *adev,
......
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
View file @ 6457205c
......@@ -525,9 +525,9 @@ FW_VERSION_ATTR(rlc_srls_fw_version, 0444, gfx.rlc_srls_fw_version);
FW_VERSION_ATTR(mec_fw_version, 0444, gfx.mec_fw_version);
FW_VERSION_ATTR(mec2_fw_version, 0444, gfx.mec2_fw_version);
FW_VERSION_ATTR(sos_fw_version, 0444, psp.sos.fw_version);
FW_VERSION_ATTR(asd_fw_version, 0444, psp.asd_fw_version);
FW_VERSION_ATTR(ta_ras_fw_version, 0444, psp.ta_ras_ucode_version);
FW_VERSION_ATTR(ta_xgmi_fw_version, 0444, psp.ta_xgmi_ucode_version);
FW_VERSION_ATTR(asd_fw_version, 0444, psp.asd.fw_version);
FW_VERSION_ATTR(ta_ras_fw_version, 0444, psp.ras.feature_version);
FW_VERSION_ATTR(ta_xgmi_fw_version, 0444, psp.xgmi.feature_version);
FW_VERSION_ATTR(smc_fw_version, 0444, pm.fw_version);
FW_VERSION_ATTR(sdma_fw_version, 0444, sdma.instance[0].fw_version);
FW_VERSION_ATTR(sdma2_fw_version, 0444, sdma.instance[1].fw_version);
......
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
View file @ 6457205c
......@@ -136,21 +136,11 @@ struct psp_firmware_header_v2_0 {
/* version_major=1, version_minor=0 */
struct ta_firmware_header_v1_0 {
struct common_firmware_header header;
uint32_t ta_xgmi_ucode_version;
uint32_t ta_xgmi_offset_bytes;
uint32_t ta_xgmi_size_bytes;
uint32_t ta_ras_ucode_version;
uint32_t ta_ras_offset_bytes;
uint32_t ta_ras_size_bytes;
uint32_t ta_hdcp_ucode_version;
uint32_t ta_hdcp_offset_bytes;
uint32_t ta_hdcp_size_bytes;
uint32_t ta_dtm_ucode_version;
uint32_t ta_dtm_offset_bytes;
uint32_t ta_dtm_size_bytes;
uint32_t ta_securedisplay_ucode_version;
uint32_t ta_securedisplay_offset_bytes;
uint32_t ta_securedisplay_size_bytes;
struct psp_fw_legacy_bin_desc xgmi;
struct psp_fw_legacy_bin_desc ras;
struct psp_fw_legacy_bin_desc hdcp;
struct psp_fw_legacy_bin_desc dtm;
struct psp_fw_legacy_bin_desc securedisplay;
};
enum ta_fw_type {
......
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
View file @ 6457205c
......@@ -532,9 +532,9 @@ static void amdgpu_virt_populate_vf2pf_ucode_info(struct amdgpu_device *adev)
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_MEC, adev->gfx.mec_fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_MEC2, adev->gfx.mec2_fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_SOS, adev->psp.sos.fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_ASD, adev->psp.asd_fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_TA_RAS, adev->psp.ta_ras_ucode_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_TA_XGMI, adev->psp.ta_xgmi_ucode_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_ASD, adev->psp.asd.fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_TA_RAS, adev->psp.ras.feature_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_TA_XGMI, adev->psp.xgmi.feature_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_SMC, adev->pm.fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_SDMA, adev->sdma.instance[0].fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_SDMA2, adev->sdma.instance[1].fw_version);
......
drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
View file @ 6457205c
......@@ -84,29 +84,29 @@ static int psp_v10_0_init_microcode(struct psp_context *psp)
ta_hdr = (const struct ta_firmware_header_v1_0 *)
adev->psp.ta_fw->data;
adev->psp.ta_hdcp_ucode_version =
le32_to_cpu(ta_hdr->ta_hdcp_ucode_version);
adev->psp.ta_hdcp_ucode_size =
le32_to_cpu(ta_hdr->ta_hdcp_size_bytes);
adev->psp.ta_hdcp_start_addr =
adev->psp.hdcp.feature_version =
le32_to_cpu(ta_hdr->hdcp.fw_version);
adev->psp.hdcp.size_bytes =
le32_to_cpu(ta_hdr->hdcp.size_bytes);
adev->psp.hdcp.start_addr =
(uint8_t *)ta_hdr +
le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
adev->psp.ta_dtm_ucode_version =
le32_to_cpu(ta_hdr->ta_dtm_ucode_version);
adev->psp.ta_dtm_ucode_size =
le32_to_cpu(ta_hdr->ta_dtm_size_bytes);
adev->psp.ta_dtm_start_addr =
(uint8_t *)adev->psp.ta_hdcp_start_addr +
le32_to_cpu(ta_hdr->ta_dtm_offset_bytes);
adev->psp.ta_securedisplay_ucode_version =
le32_to_cpu(ta_hdr->ta_securedisplay_ucode_version);
adev->psp.ta_securedisplay_ucode_size =
le32_to_cpu(ta_hdr->ta_securedisplay_size_bytes);
adev->psp.ta_securedisplay_start_addr =
(uint8_t *)adev->psp.ta_hdcp_start_addr +
le32_to_cpu(ta_hdr->ta_securedisplay_offset_bytes);
adev->psp.dtm.feature_version =
le32_to_cpu(ta_hdr->dtm.fw_version);
adev->psp.dtm.size_bytes =
le32_to_cpu(ta_hdr->dtm.size_bytes);
adev->psp.dtm.start_addr =
(uint8_t *)adev->psp.hdcp.start_addr +
le32_to_cpu(ta_hdr->dtm.offset_bytes);
adev->psp.securedisplay.feature_version =
le32_to_cpu(ta_hdr->securedisplay.fw_version);
adev->psp.securedisplay.size_bytes =
le32_to_cpu(ta_hdr->securedisplay.size_bytes);
adev->psp.securedisplay.start_addr =
(uint8_t *)adev->psp.hdcp.start_addr +
le32_to_cpu(ta_hdr->securedisplay.offset_bytes);
adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
}
......
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
View file @ 6457205c
......@@ -151,15 +151,15 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
goto out2;
ta_hdr = (const struct ta_firmware_header_v1_0 *)adev->psp.ta_fw->data;
adev->psp.ta_xgmi_ucode_version = le32_to_cpu(ta_hdr->ta_xgmi_ucode_version);
adev->psp.ta_xgmi_ucode_size = le32_to_cpu(ta_hdr->ta_xgmi_size_bytes);
adev->psp.ta_xgmi_start_addr = (uint8_t *)ta_hdr +
adev->psp.xgmi.feature_version = le32_to_cpu(ta_hdr->xgmi.fw_version);
adev->psp.xgmi.size_bytes = le32_to_cpu(ta_hdr->xgmi.size_bytes);
adev->psp.xgmi.start_addr = (uint8_t *)ta_hdr +
le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
adev->psp.ta_ras_ucode_version = le32_to_cpu(ta_hdr->ta_ras_ucode_version);
adev->psp.ta_ras_ucode_size = le32_to_cpu(ta_hdr->ta_ras_size_bytes);
adev->psp.ta_ras_start_addr = (uint8_t *)adev->psp.ta_xgmi_start_addr +
le32_to_cpu(ta_hdr->ta_ras_offset_bytes);
adev->psp.ras.feature_version = le32_to_cpu(ta_hdr->ras.fw_version);
adev->psp.ras.size_bytes = le32_to_cpu(ta_hdr->ras.size_bytes);
adev->psp.ras.start_addr = (uint8_t *)adev->psp.xgmi.start_addr +
le32_to_cpu(ta_hdr->ras.offset_bytes);
}
break;
case CHIP_NAVI10:
......@@ -186,17 +186,17 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
goto out2;
ta_hdr = (const struct ta_firmware_header_v1_0 *)adev->psp.ta_fw->data;
adev->psp.ta_hdcp_ucode_version = le32_to_cpu(ta_hdr->ta_hdcp_ucode_version);
adev->psp.ta_hdcp_ucode_size = le32_to_cpu(ta_hdr->ta_hdcp_size_bytes);
adev->psp.ta_hdcp_start_addr = (uint8_t *)ta_hdr +
adev->psp.hdcp.feature_version = le32_to_cpu(ta_hdr->hdcp.fw_version);
adev->psp.hdcp.size_bytes = le32_to_cpu(ta_hdr->hdcp.size_bytes);
adev->psp.hdcp.start_addr = (uint8_t *)ta_hdr +
le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
adev->psp.ta_dtm_ucode_version = le32_to_cpu(ta_hdr->ta_dtm_ucode_version);
adev->psp.ta_dtm_ucode_size = le32_to_cpu(ta_hdr->ta_dtm_size_bytes);
adev->psp.ta_dtm_start_addr = (uint8_t *)adev->psp.ta_hdcp_start_addr +
le32_to_cpu(ta_hdr->ta_dtm_offset_bytes);
adev->psp.dtm.feature_version = le32_to_cpu(ta_hdr->dtm.fw_version);
adev->psp.dtm.size_bytes = le32_to_cpu(ta_hdr->dtm.size_bytes);
adev->psp.dtm.start_addr = (uint8_t *)adev->psp.hdcp.start_addr +
le32_to_cpu(ta_hdr->dtm.offset_bytes);
}
break;
case CHIP_SIENNA_CICHLID:
......
drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
View file @ 6457205c
......@@ -84,23 +84,23 @@ static int psp_v12_0_init_microcode(struct psp_context *psp)
ta_hdr = (const struct ta_firmware_header_v1_0 *)
adev->psp.ta_fw->data;
adev->psp.ta_hdcp_ucode_version =
le32_to_cpu(ta_hdr->ta_hdcp_ucode_version);
adev->psp.ta_hdcp_ucode_size =
le32_to_cpu(ta_hdr->ta_hdcp_size_bytes);
adev->psp.ta_hdcp_start_addr =
adev->psp.hdcp.feature_version =
le32_to_cpu(ta_hdr->hdcp.fw_version);
adev->psp.hdcp.size_bytes =
le32_to_cpu(ta_hdr->hdcp.size_bytes);
adev->psp.hdcp.start_addr =
(uint8_t *)ta_hdr +
le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
adev->psp.ta_dtm_ucode_version =
le32_to_cpu(ta_hdr->ta_dtm_ucode_version);
adev->psp.ta_dtm_ucode_size =
le32_to_cpu(ta_hdr->ta_dtm_size_bytes);
adev->psp.ta_dtm_start_addr =
(uint8_t *)adev->psp.ta_hdcp_start_addr +
le32_to_cpu(ta_hdr->ta_dtm_offset_bytes);
adev->psp.dtm.feature_version =
le32_to_cpu(ta_hdr->dtm.fw_version);
adev->psp.dtm.size_bytes =
le32_to_cpu(ta_hdr->dtm.size_bytes);
adev->psp.dtm.start_addr =
(uint8_t *)adev->psp.hdcp.start_addr +
le32_to_cpu(ta_hdr->dtm.offset_bytes);
}
return 0;
......
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