Commit 653f502d authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman

arm64: dts: r8a7795: Add SCIF fallback compatibility strings

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 652a4306
...@@ -474,7 +474,9 @@ avb: ethernet@e6800000 { ...@@ -474,7 +474,9 @@ avb: ethernet@e6800000 {
}; };
hscif0: serial@e6540000 { hscif0: serial@e6540000 {
compatible = "renesas,hscif-r8a7795", "renesas,hscif"; compatible = "renesas,hscif-r8a7795",
"renesas,rcar-gen3-hscif",
"renesas,hscif";
reg = <0 0xe6540000 0 96>; reg = <0 0xe6540000 0 96>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 520>; clocks = <&cpg CPG_MOD 520>;
...@@ -486,7 +488,9 @@ hscif0: serial@e6540000 { ...@@ -486,7 +488,9 @@ hscif0: serial@e6540000 {
}; };
hscif1: serial@e6550000 { hscif1: serial@e6550000 {
compatible = "renesas,hscif-r8a7795", "renesas,hscif"; compatible = "renesas,hscif-r8a7795",
"renesas,rcar-gen3-hscif",
"renesas,hscif";
reg = <0 0xe6550000 0 96>; reg = <0 0xe6550000 0 96>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 519>; clocks = <&cpg CPG_MOD 519>;
...@@ -498,7 +502,9 @@ hscif1: serial@e6550000 { ...@@ -498,7 +502,9 @@ hscif1: serial@e6550000 {
}; };
hscif2: serial@e6560000 { hscif2: serial@e6560000 {
compatible = "renesas,hscif-r8a7795", "renesas,hscif"; compatible = "renesas,hscif-r8a7795",
"renesas,rcar-gen3-hscif",
"renesas,hscif";
reg = <0 0xe6560000 0 96>; reg = <0 0xe6560000 0 96>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 518>; clocks = <&cpg CPG_MOD 518>;
...@@ -510,7 +516,9 @@ hscif2: serial@e6560000 { ...@@ -510,7 +516,9 @@ hscif2: serial@e6560000 {
}; };
hscif3: serial@e66a0000 { hscif3: serial@e66a0000 {
compatible = "renesas,hscif-r8a7795", "renesas,hscif"; compatible = "renesas,hscif-r8a7795",
"renesas,rcar-gen3-hscif",
"renesas,hscif";
reg = <0 0xe66a0000 0 96>; reg = <0 0xe66a0000 0 96>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 517>; clocks = <&cpg CPG_MOD 517>;
...@@ -522,7 +530,9 @@ hscif3: serial@e66a0000 { ...@@ -522,7 +530,9 @@ hscif3: serial@e66a0000 {
}; };
hscif4: serial@e66b0000 { hscif4: serial@e66b0000 {
compatible = "renesas,hscif-r8a7795", "renesas,hscif"; compatible = "renesas,hscif-r8a7795",
"renesas,rcar-gen3-hscif",
"renesas,hscif";
reg = <0 0xe66b0000 0 96>; reg = <0 0xe66b0000 0 96>;
interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 516>; clocks = <&cpg CPG_MOD 516>;
...@@ -534,7 +544,8 @@ hscif4: serial@e66b0000 { ...@@ -534,7 +544,8 @@ hscif4: serial@e66b0000 {
}; };
scif0: serial@e6e60000 { scif0: serial@e6e60000 {
compatible = "renesas,scif-r8a7795", "renesas,scif"; compatible = "renesas,scif-r8a7795",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e60000 0 64>; reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 207>; clocks = <&cpg CPG_MOD 207>;
...@@ -546,7 +557,8 @@ scif0: serial@e6e60000 { ...@@ -546,7 +557,8 @@ scif0: serial@e6e60000 {
}; };
scif1: serial@e6e68000 { scif1: serial@e6e68000 {
compatible = "renesas,scif-r8a7795", "renesas,scif"; compatible = "renesas,scif-r8a7795",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e68000 0 64>; reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 206>; clocks = <&cpg CPG_MOD 206>;
...@@ -558,7 +570,8 @@ scif1: serial@e6e68000 { ...@@ -558,7 +570,8 @@ scif1: serial@e6e68000 {
}; };
scif2: serial@e6e88000 { scif2: serial@e6e88000 {
compatible = "renesas,scif-r8a7795", "renesas,scif"; compatible = "renesas,scif-r8a7795",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e88000 0 64>; reg = <0 0xe6e88000 0 64>;
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 310>; clocks = <&cpg CPG_MOD 310>;
...@@ -570,7 +583,8 @@ scif2: serial@e6e88000 { ...@@ -570,7 +583,8 @@ scif2: serial@e6e88000 {
}; };
scif3: serial@e6c50000 { scif3: serial@e6c50000 {
compatible = "renesas,scif-r8a7795", "renesas,scif"; compatible = "renesas,scif-r8a7795",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6c50000 0 64>; reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 204>; clocks = <&cpg CPG_MOD 204>;
...@@ -582,7 +596,8 @@ scif3: serial@e6c50000 { ...@@ -582,7 +596,8 @@ scif3: serial@e6c50000 {
}; };
scif4: serial@e6c40000 { scif4: serial@e6c40000 {
compatible = "renesas,scif-r8a7795", "renesas,scif"; compatible = "renesas,scif-r8a7795",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6c40000 0 64>; reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 203>; clocks = <&cpg CPG_MOD 203>;
...@@ -594,7 +609,8 @@ scif4: serial@e6c40000 { ...@@ -594,7 +609,8 @@ scif4: serial@e6c40000 {
}; };
scif5: serial@e6f30000 { scif5: serial@e6f30000 {
compatible = "renesas,scif-r8a7795", "renesas,scif"; compatible = "renesas,scif-r8a7795",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6f30000 0 64>; reg = <0 0xe6f30000 0 64>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 202>; clocks = <&cpg CPG_MOD 202>;
......
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