Commit 657e9326 authored by Richard Acayan's avatar Richard Acayan Committed by Bjorn Andersson

dt-bindings: clock: gcc-sdm845: add sdm670 global clocks

The Snapdragon 670 clocks will be added into the sdm845 gcc driver. Most
of the new clocks, GDSCs, and resets already have reserved IDs but there
are some resources that don't. Add the new clock from Snapdragon 670 and
document the differences between the SoC parent clocks.
Signed-off-by: default avatarRichard Acayan <mailingradian@gmail.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220914013922.198778-2-mailingradian@gmail.com
parent 867bc326
......@@ -19,23 +19,17 @@ description: |
properties:
compatible:
const: qcom,gcc-sdm845
enum:
- qcom,gcc-sdm670
- qcom,gcc-sdm845
clocks:
items:
- description: Board XO source
- description: Board active XO source
- description: Sleep clock source
- description: PCIE 0 Pipe clock source
- description: PCIE 1 Pipe clock source
minItems: 3
maxItems: 5
clock-names:
items:
- const: bi_tcxo
- const: bi_tcxo_ao
- const: sleep_clk
- const: pcie_0_pipe_clk
- const: pcie_1_pipe_clk
minItems: 3
maxItems: 5
power-domains:
maxItems: 1
......@@ -45,6 +39,45 @@ required:
allOf:
- $ref: qcom,gcc.yaml#
- if:
properties:
compatible:
contains:
const: qcom,gcc-sdm670
then:
properties:
clocks:
items:
- description: Board XO source
- description: Board active XO source
- description: Sleep clock source
clock-names:
items:
- const: bi_tcxo
- const: bi_tcxo_ao
- const: sleep_clk
- if:
properties:
compatible:
contains:
const: qcom,gcc-sdm845
then:
properties:
clocks:
items:
- description: Board XO source
- description: Board active XO source
- description: Sleep clock source
- description: PCIE 0 Pipe clock source
- description: PCIE 1 Pipe clock source
clock-names:
items:
- const: bi_tcxo
- const: bi_tcxo_ao
- const: sleep_clk
- const: pcie_0_pipe_clk
- const: pcie_1_pipe_clk
unevaluatedProperties: false
......
......@@ -199,6 +199,7 @@
#define GCC_QSPI_CNOC_PERIPH_AHB_CLK 189
#define GCC_LPASS_Q6_AXI_CLK 190
#define GCC_LPASS_SWAY_CLK 191
#define GPLL6 192
/* GCC Resets */
#define GCC_MMSS_BCR 0
......
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