Commit 660e3d95 authored by Biju Das's avatar Biju Das Committed by David S. Miller

ravb: Initialize GbEthernet DMAC

Initialize GbEthernet DMAC found on RZ/G2L SoC.
Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent feab85c7
......@@ -81,6 +81,7 @@ enum ravb_reg {
RQC3 = 0x00A0,
RQC4 = 0x00A4,
RPC = 0x00B0,
RTC = 0x00B4, /* R-Car Gen3 and RZ/G2L only */
UFCW = 0x00BC,
UFCS = 0x00C0,
UFCV0 = 0x00C4,
......@@ -193,7 +194,7 @@ enum ravb_reg {
GECMR = 0x05b0,
MAHR = 0x05c0,
MALR = 0x05c8,
TROCR = 0x0700, /* R-Car Gen3 only */
TROCR = 0x0700, /* R-Car Gen3 and RZ/G2L only */
CEFCR = 0x0740,
FRECR = 0x0748,
TSFRCR = 0x0750,
......
......@@ -489,7 +489,35 @@ static void ravb_emac_init(struct net_device *ndev)
static int ravb_dmac_init_gbeth(struct net_device *ndev)
{
/* Place holder */
int error;
error = ravb_ring_init(ndev, RAVB_BE);
if (error)
return error;
/* Descriptor format */
ravb_ring_format(ndev, RAVB_BE);
/* Set AVB RX */
ravb_write(ndev, 0x60000000, RCR);
/* Set Max Frame Length (RTC) */
ravb_write(ndev, 0x7ffc0000 | GBETH_RX_BUFF_MAX, RTC);
/* Set FIFO size */
ravb_write(ndev, 0x00222200, TGC);
ravb_write(ndev, 0, TCCR);
/* Frame receive */
ravb_write(ndev, RIC0_FRE0, RIC0);
/* Disable FIFO full warning */
ravb_write(ndev, 0x0, RIC1);
/* Receive FIFO full error, descriptor empty */
ravb_write(ndev, RIC2_QFE0 | RIC2_RFFE, RIC2);
ravb_write(ndev, TIC_FTE0, TIC);
return 0;
}
......
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