Commit 66fc5fed authored by Michael Walle's avatar Michael Walle Committed by Claudiu Beznea

ARM: dts: lan966x: add flexcom I2C nodes

Add all I2C nodes of the flexcom IP blocks. The driver supports
FIFO, DMA or both combined. But the latter isn't working correctly.
Thus, skip the fifo-size property for now. DMA is doing single byte
reads in this case.

Keep the nodes disabled by default.
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Reviewed-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-7-michael@walle.ccSigned-off-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
parent 8c38c72c
...@@ -120,6 +120,19 @@ spi0: spi@400 { ...@@ -120,6 +120,19 @@ spi0: spi@400 {
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
i2c0: i2c@600 {
compatible = "microchip,sam9x60-i2c";
reg = <0x600 0x200>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
<&dma0 AT91_XDMAC_DT_PERID(2)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
}; };
flx1: flexcom@e0044000 { flx1: flexcom@e0044000 {
...@@ -158,6 +171,19 @@ spi1: spi@400 { ...@@ -158,6 +171,19 @@ spi1: spi@400 {
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
i2c1: i2c@600 {
compatible = "microchip,sam9x60-i2c";
reg = <0x600 0x200>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
<&dma0 AT91_XDMAC_DT_PERID(4)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
}; };
trng: rng@e0048000 { trng: rng@e0048000 {
...@@ -213,6 +239,19 @@ spi2: spi@400 { ...@@ -213,6 +239,19 @@ spi2: spi@400 {
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
i2c2: i2c@600 {
compatible = "microchip,sam9x60-i2c";
reg = <0x600 0x200>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
<&dma0 AT91_XDMAC_DT_PERID(6)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
}; };
flx3: flexcom@e0064000 { flx3: flexcom@e0064000 {
...@@ -251,6 +290,19 @@ spi3: spi@400 { ...@@ -251,6 +290,19 @@ spi3: spi@400 {
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
i2c3: i2c@600 {
compatible = "microchip,sam9x60-i2c";
reg = <0x600 0x200>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
<&dma0 AT91_XDMAC_DT_PERID(8)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
}; };
dma0: dma-controller@e0068000 { dma0: dma-controller@e0068000 {
...@@ -308,6 +360,19 @@ spi4: spi@400 { ...@@ -308,6 +360,19 @@ spi4: spi@400 {
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
i2c4: i2c@600 {
compatible = "microchip,sam9x60-i2c";
reg = <0x600 0x200>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
<&dma0 AT91_XDMAC_DT_PERID(10)>;
dma-names = "tx", "rx";
clocks = <&nic_clk>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
}; };
timer0: timer@e008c000 { timer0: timer@e008c000 {
......
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