Commit 67a12ae5 authored by Michael Walle's avatar Michael Walle Committed by Mark Brown

spi: spi-nxp-fspi: don't depend on a specific node name erratum workaround

In commit 7e71b854 ("arm64: dts: ls1028a: fix node name for the
sysclk") the sysclk node name was renamed and broke the erratum
workaround because it tries to fetch a device tree node by its name,
which is very fragile in general. We don't even need the sysclk node
because the only possible sysclk frequency input is 100MHz. In fact, the
erratum says it applies if SYS_PLL_RAT is 3, not that the platform clock
is 300 MHz. Make the workaround more reliable and just drop the unneeded
sysclk lookup.

For reference, the error during the bootup is the following:
[    4.898400] nxp-fspi 20c0000.spi: Errata cannot be executed. Read via IP bus may not work

Fixes: 82ce7d0e ("spi: spi-nxp-fspi: Implement errata workaround for LS1028A")
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20211001212726.159437-1-michael@walle.ccSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 3672bb82
...@@ -33,6 +33,7 @@ ...@@ -33,6 +33,7 @@
#include <linux/acpi.h> #include <linux/acpi.h>
#include <linux/bitops.h> #include <linux/bitops.h>
#include <linux/bitfield.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/completion.h> #include <linux/completion.h>
#include <linux/delay.h> #include <linux/delay.h>
...@@ -315,6 +316,7 @@ ...@@ -315,6 +316,7 @@
#define NXP_FSPI_MIN_IOMAP SZ_4M #define NXP_FSPI_MIN_IOMAP SZ_4M
#define DCFG_RCWSR1 0x100 #define DCFG_RCWSR1 0x100
#define SYS_PLL_RAT GENMASK(6, 2)
/* Access flash memory using IP bus only */ /* Access flash memory using IP bus only */
#define FSPI_QUIRK_USE_IP_ONLY BIT(0) #define FSPI_QUIRK_USE_IP_ONLY BIT(0)
...@@ -926,9 +928,8 @@ static void erratum_err050568(struct nxp_fspi *f) ...@@ -926,9 +928,8 @@ static void erratum_err050568(struct nxp_fspi *f)
{ .family = "QorIQ LS1028A" }, { .family = "QorIQ LS1028A" },
{ /* sentinel */ } { /* sentinel */ }
}; };
struct device_node *np;
struct regmap *map; struct regmap *map;
u32 val = 0, sysclk = 0; u32 val, sys_pll_ratio;
int ret; int ret;
/* Check for LS1028A family */ /* Check for LS1028A family */
...@@ -937,7 +938,6 @@ static void erratum_err050568(struct nxp_fspi *f) ...@@ -937,7 +938,6 @@ static void erratum_err050568(struct nxp_fspi *f)
return; return;
} }
/* Compute system clock frequency multiplier ratio */
map = syscon_regmap_lookup_by_compatible("fsl,ls1028a-dcfg"); map = syscon_regmap_lookup_by_compatible("fsl,ls1028a-dcfg");
if (IS_ERR(map)) { if (IS_ERR(map)) {
dev_err(f->dev, "No syscon regmap\n"); dev_err(f->dev, "No syscon regmap\n");
...@@ -948,23 +948,11 @@ static void erratum_err050568(struct nxp_fspi *f) ...@@ -948,23 +948,11 @@ static void erratum_err050568(struct nxp_fspi *f)
if (ret < 0) if (ret < 0)
goto err; goto err;
/* Strap bits 6:2 define SYS_PLL_RAT i.e frequency multiplier ratio */ sys_pll_ratio = FIELD_GET(SYS_PLL_RAT, val);
val = (val >> 2) & 0x1F; dev_dbg(f->dev, "val: 0x%08x, sys_pll_ratio: %d\n", val, sys_pll_ratio);
WARN(val == 0, "Strapping is zero: Cannot determine ratio");
/* Compute system clock frequency */ /* Use IP bus only if platform clock is 300MHz */
np = of_find_node_by_name(NULL, "clock-sysclk"); if (sys_pll_ratio == 3)
if (!np)
goto err;
if (of_property_read_u32(np, "clock-frequency", &sysclk))
goto err;
sysclk = (sysclk * val) / 1000000; /* Convert sysclk to Mhz */
dev_dbg(f->dev, "val: 0x%08x, sysclk: %dMhz\n", val, sysclk);
/* Use IP bus only if PLL is 300MHz */
if (sysclk == 300)
f->devtype_data->quirks |= FSPI_QUIRK_USE_IP_ONLY; f->devtype_data->quirks |= FSPI_QUIRK_USE_IP_ONLY;
return; return;
......
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