Commit 683bac6b authored by yipechai's avatar yipechai Committed by Alex Deucher

drm/amdgpu: Optimize amdgpu_sdma_ras_late_init/amdgpu_sdma_ras_fini function code

Optimize amdgpu_sdma_ras_late_init/amdgpu_sdma_ras_fini function code.
Signed-off-by: default avataryipechai <YiPeng.Chai@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 80ed77f9
......@@ -90,28 +90,10 @@ int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev,
void *ras_ih_info)
{
int r, i;
struct ras_ih_if *ih_info = (struct ras_ih_if *)ras_ih_info;
struct ras_fs_if fs_info = {
.sysfs_name = "sdma_err_count",
};
if (!ih_info)
return -EINVAL;
if (!adev->sdma.ras_if) {
adev->sdma.ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
if (!adev->sdma.ras_if)
return -ENOMEM;
adev->sdma.ras_if->block = AMDGPU_RAS_BLOCK__SDMA;
adev->sdma.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
adev->sdma.ras_if->sub_block_index = 0;
}
fs_info.head = ih_info->head = *adev->sdma.ras_if;
r = amdgpu_ras_late_init(adev, adev->sdma.ras_if,
&fs_info, ih_info);
r = amdgpu_ras_block_late_init(adev, adev->sdma.ras_if);
if (r)
goto free;
return r;
if (amdgpu_ras_is_supported(adev, adev->sdma.ras_if->block)) {
for (i = 0; i < adev->sdma.num_instances; i++) {
......@@ -120,38 +102,20 @@ int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev,
if (r)
goto late_fini;
}
} else {
r = 0;
goto free;
}
return 0;
late_fini:
amdgpu_ras_late_fini(adev, adev->sdma.ras_if, ih_info);
free:
kfree(adev->sdma.ras_if);
adev->sdma.ras_if = NULL;
amdgpu_ras_block_late_fini(adev, adev->sdma.ras_if);
return r;
}
void amdgpu_sdma_ras_fini(struct amdgpu_device *adev)
{
if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA) &&
adev->sdma.ras_if) {
struct ras_common_if *ras_if = adev->sdma.ras_if;
struct ras_ih_if ih_info = {
.head = *ras_if,
/* the cb member will not be used by
* amdgpu_ras_interrupt_remove_handler, init it only
* to cheat the check in ras_late_fini
*/
.cb = amdgpu_sdma_process_ras_data_cb,
};
amdgpu_ras_late_fini(adev, ras_if, &ih_info);
kfree(ras_if);
}
adev->sdma.ras_if)
amdgpu_ras_block_late_fini(adev, adev->sdma.ras_if);
}
int amdgpu_sdma_process_ras_data_cb(struct amdgpu_device *adev,
......
......@@ -1885,9 +1885,6 @@ static int sdma_v4_0_process_ras_data_cb(struct amdgpu_device *adev,
static int sdma_v4_0_late_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct ras_ih_if ih_info = {
.cb = sdma_v4_0_process_ras_data_cb,
};
sdma_v4_0_setup_ulv(adev);
......@@ -1898,7 +1895,7 @@ static int sdma_v4_0_late_init(void *handle)
}
if (adev->sdma.ras && adev->sdma.ras->ras_block.ras_late_init)
return adev->sdma.ras->ras_block.ras_late_init(adev, &ih_info);
return adev->sdma.ras->ras_block.ras_late_init(adev, NULL);
else
return 0;
}
......@@ -2802,6 +2799,7 @@ const struct amdgpu_ras_block_hw_ops sdma_v4_0_ras_hw_ops = {
static struct amdgpu_sdma_ras sdma_v4_0_ras = {
.ras_block = {
.hw_ops = &sdma_v4_0_ras_hw_ops,
.ras_cb = sdma_v4_0_process_ras_data_cb,
},
};
......@@ -2824,6 +2822,8 @@ static void sdma_v4_0_set_ras_funcs(struct amdgpu_device *adev)
strcpy(adev->sdma.ras->ras_block.ras_comm.name, "sdma");
adev->sdma.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__SDMA;
adev->sdma.ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
adev->sdma.ras_if = &adev->sdma.ras->ras_block.ras_comm;
/* If don't define special ras_late_init function, use default ras_late_init */
if (!adev->sdma.ras->ras_block.ras_late_init)
......@@ -2832,6 +2832,10 @@ static void sdma_v4_0_set_ras_funcs(struct amdgpu_device *adev)
/* If don't define special ras_fini function, use default ras_fini */
if (!adev->sdma.ras->ras_block.ras_fini)
adev->sdma.ras->ras_block.ras_fini = amdgpu_sdma_ras_fini;
/* If not defined special ras_cb function, use default ras_cb */
if (!adev->sdma.ras->ras_block.ras_cb)
adev->sdma.ras->ras_block.ras_cb = amdgpu_sdma_process_ras_data_cb;
}
}
......
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