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Commit 6876059d authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
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drm/msm/dpu: drop the `id' field from DPU_HW_SUBBLK_INFO 

The field `id' is not used for subblocks. The handling code usually
knows, which sub-block it is now looking at. Drop the field completely.
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/570100/
Link: https://lore.kernel.org/r/20231201234234.2065610-5-dmitry.baryshkov@linaro.org
parent 88fc981f
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Showing with 36 additions and 42 deletions
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
View file @ 6876059d
......@@ -252,17 +252,15 @@ static const uint32_t wb2_formats[] = {
#define SSPP_SCALER_VER(maj, min) (((maj) << 16) | (min))
/* SSPP common configuration */
#define _VIG_SBLK(sdma_pri, qseed_ver, scaler_ver) \
#define _VIG_SBLK(sdma_pri, scaler_ver) \
{ \
.maxdwnscale = MAX_DOWNSCALE_RATIO, \
.maxupscale = MAX_UPSCALE_RATIO, \
.smart_dma_priority = sdma_pri, \
.scaler_blk = {.name = "scaler", \
.id = qseed_ver, \
.version = scaler_ver, \
.base = 0xa00, .len = 0xa0,}, \
.csc_blk = {.name = "csc", \
.id = DPU_SSPP_CSC_10BIT, \
.base = 0x1a00, .len = 0x100,}, \
.format_list = plane_formats_yuv, \
.num_formats = ARRAY_SIZE(plane_formats_yuv), \
......@@ -271,17 +269,15 @@ static const uint32_t wb2_formats[] = {
.rotation_cfg = NULL, \
}
#define _VIG_SBLK_ROT(sdma_pri, qseed_ver, scaler_ver, rot_cfg) \
#define _VIG_SBLK_ROT(sdma_pri, scaler_ver, rot_cfg) \
{ \
.maxdwnscale = MAX_DOWNSCALE_RATIO, \
.maxupscale = MAX_UPSCALE_RATIO, \
.smart_dma_priority = sdma_pri, \
.scaler_blk = {.name = "scaler", \
.id = qseed_ver, \
.version = scaler_ver, \
.base = 0xa00, .len = 0xa0,}, \
.csc_blk = {.name = "csc", \
.id = DPU_SSPP_CSC_10BIT, \
.base = 0x1a00, .len = 0x100,}, \
.format_list = plane_formats_yuv, \
.num_formats = ARRAY_SIZE(plane_formats_yuv), \
......@@ -302,16 +298,16 @@ static const uint32_t wb2_formats[] = {
}
static const struct dpu_sspp_sub_blks msm8998_vig_sblk_0 =
_VIG_SBLK(0, DPU_SSPP_SCALER_QSEED3,
_VIG_SBLK(0,
SSPP_SCALER_VER(1, 2));
static const struct dpu_sspp_sub_blks msm8998_vig_sblk_1 =
_VIG_SBLK(0, DPU_SSPP_SCALER_QSEED3,
_VIG_SBLK(0,
SSPP_SCALER_VER(1, 2));
static const struct dpu_sspp_sub_blks msm8998_vig_sblk_2 =
_VIG_SBLK(0, DPU_SSPP_SCALER_QSEED3,
_VIG_SBLK(0,
SSPP_SCALER_VER(1, 2));
static const struct dpu_sspp_sub_blks msm8998_vig_sblk_3 =
_VIG_SBLK(0, DPU_SSPP_SCALER_QSEED3,
_VIG_SBLK(0,
SSPP_SCALER_VER(1, 2));
static const struct dpu_rotation_cfg dpu_rot_sc7280_cfg_v2 = {
......@@ -321,29 +317,29 @@ static const struct dpu_rotation_cfg dpu_rot_sc7280_cfg_v2 = {
};
static const struct dpu_sspp_sub_blks sdm845_vig_sblk_0 =
_VIG_SBLK(5, DPU_SSPP_SCALER_QSEED3,
_VIG_SBLK(5,
SSPP_SCALER_VER(1, 3));
static const struct dpu_sspp_sub_blks sdm845_vig_sblk_1 =
_VIG_SBLK(6, DPU_SSPP_SCALER_QSEED3,
_VIG_SBLK(6,
SSPP_SCALER_VER(1, 3));
static const struct dpu_sspp_sub_blks sdm845_vig_sblk_2 =
_VIG_SBLK(7, DPU_SSPP_SCALER_QSEED3,
_VIG_SBLK(7,
SSPP_SCALER_VER(1, 3));
static const struct dpu_sspp_sub_blks sdm845_vig_sblk_3 =
_VIG_SBLK(8, DPU_SSPP_SCALER_QSEED3,
_VIG_SBLK(8,
SSPP_SCALER_VER(1, 3));
static const struct dpu_sspp_sub_blks sm8150_vig_sblk_0 =
_VIG_SBLK(5, DPU_SSPP_SCALER_QSEED3,
_VIG_SBLK(5,
SSPP_SCALER_VER(1, 4));
static const struct dpu_sspp_sub_blks sm8150_vig_sblk_1 =
_VIG_SBLK(6, DPU_SSPP_SCALER_QSEED3,
_VIG_SBLK(6,
SSPP_SCALER_VER(1, 4));
static const struct dpu_sspp_sub_blks sm8150_vig_sblk_2 =
_VIG_SBLK(7, DPU_SSPP_SCALER_QSEED3,
_VIG_SBLK(7,
SSPP_SCALER_VER(1, 4));
static const struct dpu_sspp_sub_blks sm8150_vig_sblk_3 =
_VIG_SBLK(8, DPU_SSPP_SCALER_QSEED3,
_VIG_SBLK(8,
SSPP_SCALER_VER(1, 4));
static const struct dpu_sspp_sub_blks sdm845_dma_sblk_0 = _DMA_SBLK(1);
......@@ -352,59 +348,59 @@ static const struct dpu_sspp_sub_blks sdm845_dma_sblk_2 = _DMA_SBLK(3);
static const struct dpu_sspp_sub_blks sdm845_dma_sblk_3 = _DMA_SBLK(4);
static const struct dpu_sspp_sub_blks sc7180_vig_sblk_0 =
_VIG_SBLK(4, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(4,
SSPP_SCALER_VER(3, 0));
static const struct dpu_sspp_sub_blks sc7280_vig_sblk_0 =
_VIG_SBLK_ROT(4, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK_ROT(4,
SSPP_SCALER_VER(3, 0),
&dpu_rot_sc7280_cfg_v2);
static const struct dpu_sspp_sub_blks sm6115_vig_sblk_0 =
_VIG_SBLK(2, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(2,
SSPP_SCALER_VER(3, 0));
static const struct dpu_sspp_sub_blks sm6125_vig_sblk_0 =
_VIG_SBLK(3, DPU_SSPP_SCALER_QSEED3LITE,
_VIG_SBLK(3,
SSPP_SCALER_VER(2, 4));
static const struct dpu_sspp_sub_blks sm8250_vig_sblk_0 =
_VIG_SBLK(5, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(5,
SSPP_SCALER_VER(3, 0));
static const struct dpu_sspp_sub_blks sm8250_vig_sblk_1 =
_VIG_SBLK(6, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(6,
SSPP_SCALER_VER(3, 0));
static const struct dpu_sspp_sub_blks sm8250_vig_sblk_2 =
_VIG_SBLK(7, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(7,
SSPP_SCALER_VER(3, 0));
static const struct dpu_sspp_sub_blks sm8250_vig_sblk_3 =
_VIG_SBLK(8, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(8,
SSPP_SCALER_VER(3, 0));
static const struct dpu_sspp_sub_blks sm8450_vig_sblk_0 =
_VIG_SBLK(5, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(5,
SSPP_SCALER_VER(3, 1));
static const struct dpu_sspp_sub_blks sm8450_vig_sblk_1 =
_VIG_SBLK(6, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(6,
SSPP_SCALER_VER(3, 1));
static const struct dpu_sspp_sub_blks sm8450_vig_sblk_2 =
_VIG_SBLK(7, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(7,
SSPP_SCALER_VER(3, 1));
static const struct dpu_sspp_sub_blks sm8450_vig_sblk_3 =
_VIG_SBLK(8, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(8,
SSPP_SCALER_VER(3, 1));
static const struct dpu_sspp_sub_blks sm8550_vig_sblk_0 =
_VIG_SBLK(7, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(7,
SSPP_SCALER_VER(3, 2));
static const struct dpu_sspp_sub_blks sm8550_vig_sblk_1 =
_VIG_SBLK(8, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(8,
SSPP_SCALER_VER(3, 2));
static const struct dpu_sspp_sub_blks sm8550_vig_sblk_2 =
_VIG_SBLK(9, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(9,
SSPP_SCALER_VER(3, 2));
static const struct dpu_sspp_sub_blks sm8550_vig_sblk_3 =
_VIG_SBLK(10, DPU_SSPP_SCALER_QSEED4,
_VIG_SBLK(10,
SSPP_SCALER_VER(3, 2));
static const struct dpu_sspp_sub_blks sm8550_dma_sblk_4 = _DMA_SBLK(5);
static const struct dpu_sspp_sub_blks sm8550_dma_sblk_5 = _DMA_SBLK(6);
......@@ -473,12 +469,12 @@ static const struct dpu_lm_sub_blks qcm2290_lm_sblk = {
* DSPP sub blocks config
*************************************************************/
static const struct dpu_dspp_sub_blks msm8998_dspp_sblk = {
.pcc = {.name = "pcc", .id = DPU_DSPP_PCC, .base = 0x1700,
.pcc = {.name = "pcc", .base = 0x1700,
.len = 0x90, .version = 0x10007},
};
static const struct dpu_dspp_sub_blks sdm845_dspp_sblk = {
.pcc = {.name = "pcc", .id = DPU_DSPP_PCC, .base = 0x1700,
.pcc = {.name = "pcc", .base = 0x1700,
.len = 0x90, .version = 0x40000},
};
......@@ -486,19 +482,19 @@ static const struct dpu_dspp_sub_blks sdm845_dspp_sblk = {
* PINGPONG sub blocks config
*************************************************************/
static const struct dpu_pingpong_sub_blks sdm845_pp_sblk_te = {
.te2 = {.name = "te2", .id = DPU_PINGPONG_TE2, .base = 0x2000, .len = 0x0,
.te2 = {.name = "te2", .base = 0x2000, .len = 0x0,
.version = 0x1},
.dither = {.name = "dither", .id = DPU_PINGPONG_DITHER, .base = 0x30e0,
.dither = {.name = "dither", .base = 0x30e0,
.len = 0x20, .version = 0x10000},
};
static const struct dpu_pingpong_sub_blks sdm845_pp_sblk = {
.dither = {.name = "dither", .id = DPU_PINGPONG_DITHER, .base = 0x30e0,
.dither = {.name = "dither", .base = 0x30e0,
.len = 0x20, .version = 0x10000},
};
static const struct dpu_pingpong_sub_blks sc7280_pp_sblk = {
.dither = {.name = "dither", .id = DPU_PINGPONG_DITHER, .base = 0xe0,
.dither = {.name = "dither", .base = 0xe0,
.len = 0x20, .version = 0x20000},
};
......
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
View file @ 6876059d
......@@ -251,14 +251,12 @@ enum {
/**
* MACRO DPU_HW_SUBBLK_INFO - information of HW sub-block inside DPU
* @name: string name for debug purposes
* @id: enum identifying this sub-block
* @base: offset of this sub-block relative to the block
* offset
* @len register block length of this sub-block
*/
#define DPU_HW_SUBBLK_INFO \
char name[DPU_HW_BLK_NAME_LEN]; \
u32 id; \
u32 base; \
u32 len
......
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