Commit 68895644 authored by Sowjanya Komatineni's avatar Sowjanya Komatineni Committed by Ulf Hansson

mmc: cqhci: add CQHCI_SSC1 register CBC field mask

This patch adds define for CBC field mask of the register
CQHCI_SSC1.
Tested-by: default avatarJon Hunter <jonathanh@nvidia.com>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: default avatarSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent c6e7ab90
...@@ -88,6 +88,7 @@ ...@@ -88,6 +88,7 @@
/* send status config 1 */ /* send status config 1 */
#define CQHCI_SSC1 0x40 #define CQHCI_SSC1 0x40
#define CQHCI_SSC1_CBC_MASK GENMASK(19, 16)
/* send status config 2 */ /* send status config 2 */
#define CQHCI_SSC2 0x44 #define CQHCI_SSC2 0x44
......
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