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Commit 693fed98 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'char-misc-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc 

Pull char/misc and other driver subsystem updates from Greg KH:
 "Here is the large set of driver changes for char/misc drivers and
  other smaller driver subsystems that flow through this git tree.

  Included in here are:

   - New IIO drivers and features and improvments in that subsystem

   - New hwtracing drivers and additions to that subsystem

   - lots of interconnect changes and new drivers as that subsystem
     seems under very active development recently. This required also
     merging in the icc subsystem changes through this tree.

   - FPGA driver updates

   - counter subsystem and driver updates

   - MHI driver updates

   - nvmem driver updates

   - documentation updates

   - Other smaller driver updates and fixes, full details in the
     shortlog

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (223 commits)
  scripts/tags.sh: fix incompatibility with PCRE2
  firmware: coreboot: Remove GOOGLE_COREBOOT_TABLE_ACPI/OF Kconfig entries
  mei: lower the log level for non-fatal failed messages
  mei: bus: disallow driver match while dismantling device
  misc: vmw_balloon: fix memory leak with using debugfs_lookup()
  nvmem: stm32: fix OPTEE dependency
  dt-bindings: nvmem: qfprom: add IPQ8074 compatible
  nvmem: qcom-spmi-sdam: register at device init time
  nvmem: rave-sp-eeprm: fix kernel-doc bad line warning
  nvmem: stm32: detect bsec pta presence for STM32MP15x
  nvmem: stm32: add OP-TEE support for STM32MP13x
  nvmem: core: use nvmem_add_one_cell() in nvmem_add_cells_from_of()
  nvmem: core: add nvmem_add_one_cell()
  nvmem: core: drop the removal of the cells in nvmem_add_cells()
  nvmem: core: move struct nvmem_cell_info to nvmem-provider.h
  nvmem: core: add an index parameter to the cell
  of: property: add #nvmem-cell-cells property
  of: property: make #.*-cells optional for simple props
  of: base: add of_parse_phandle_with_optional_args()
  net: add helper eth_addr_add()
  ...
parents 0601f25d 6ec363fc
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Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x
View file @ 693fed98
......@@ -236,7 +236,7 @@ What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/traceid
Date: November 2014
KernelVersion: 3.19
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Holds the trace ID that will appear in the trace stream
Description: (RO) Holds the trace ID that will appear in the trace stream
coming from this trace entity.
What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/trigger_event
......
Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm 0 → 100644
View file @ 693fed98
What: /sys/bus/coresight/devices/<tpdm-name>/integration_test
Date: January 2023
KernelVersion 6.2
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
Description:
(Write) Run integration test for tpdm. Integration test
will generate test data for tpdm. It can help to make
sure that the trace path is enabled and the link configurations
are fine.
Accepts only one of the 2 values - 1 or 2.
1 : Generate 64 bits data
2 : Generate 32 bits data
Documentation/ABI/testing/sysfs-bus-coresight-devices-ultra_smb 0 → 100644
View file @ 693fed98
What: /sys/bus/coresight/devices/ultra_smb<N>/enable_sink
Date: January 2023
KernelVersion: 6.3
Contact: Junhao He <hejunhao3@huawei.com>
Description: (RW) Add/remove a SMB device from a trace path. There can be
multiple sources for a single SMB device.
What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/buf_size
Date: January 2023
KernelVersion: 6.3
Contact: Junhao He <hejunhao3@huawei.com>
Description: (RO) Shows the buffer size of each UltraSoc SMB device.
What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/buf_status
Date: January 2023
KernelVersion: 6.3
Contact: Junhao He <hejunhao3@huawei.com>
Description: (RO) Shows the value of UltraSoc SMB status register.
BIT(0) is zero means buffer is empty.
What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/read_pos
Date: January 2023
KernelVersion: 6.3
Contact: Junhao He <hejunhao3@huawei.com>
Description: (RO) Shows the value of UltraSoc SMB Read Pointer register.
What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/write_pos
Date: January 2023
KernelVersion: 6.3
Contact: Junhao He <hejunhao3@huawei.com>
Description: (RO) Shows the value of UltraSoc SMB Write Pointer register.
Documentation/ABI/testing/sysfs-driver-uacce
View file @ 693fed98
......@@ -19,6 +19,24 @@ Contact: linux-accelerators@lists.ozlabs.org
Description: Available instances left of the device
Return -ENODEV if uacce_ops get_available_instances is not provided
What: /sys/class/uacce/<dev_name>/isolate_strategy
Date: Nov 2022
KernelVersion: 6.1
Contact: linux-accelerators@lists.ozlabs.org
Description: (RW) A sysfs node that configure the error threshold for the hardware
isolation strategy. This size is a configured integer value, which is the
number of threshold for hardware errors occurred in one hour. The default is 0.
0 means never isolate the device. The maximum value is 65535. You can write
a number of threshold based on your hardware.
What: /sys/class/uacce/<dev_name>/isolate
Date: Nov 2022
KernelVersion: 6.1
Contact: linux-accelerators@lists.ozlabs.org
Description: (R) A sysfs node that read the device isolated state. The value 1
means the device is unavailable. The 0 means the device is
available.
What: /sys/class/uacce/<dev_name>/algorithms
Date: Feb 2020
KernelVersion: 5.7
......
Documentation/ABI/testing/sysfs-driver-xilinx-tmr-manager 0 → 100644
View file @ 693fed98
What: /sys/devices/platform/amba_pl/<dev>/errcnt
Date: Nov 2022
Contact: appana.durga.kedareswara.rao@amd.com
Description: This control file provides the fault detection count.
This file cannot be written.
Example:
# cat /sys/devices/platform/amba_pl/44a10000.tmr_manager/errcnt
1
What: /sys/devices/platform/amba_pl/<dev>/dis_block_break
Date: Nov 2022
Contact: appana.durga.kedareswara.rao@amd.com
Description: Write any value to it, This control file enables the break signal.
This file is write only.
Example:
# echo <any value> > /sys/devices/platform/amba_pl/44a10000.tmr_manager/dis_block_break
Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/qcom,coresight-tpda.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Trace, Profiling and Diagnostics Aggregator - TPDA
description: |
TPDAs are responsible for packetization and timestamping of data sets
utilizing the MIPI STPv2 packet protocol. Pulling data sets from one or
more attached TPDM and pushing the resultant (packetized) data out a
master ATB interface. Performing an arbitrated ATB interleaving (funneling)
task for free-flowing data from TPDM (i.e. CMB and DSB data set flows).
There is no strict binding between TPDM and TPDA. TPDA can have multiple
TPDMs connect to it. But There must be only one TPDA in the path from the
TPDM source to TMC sink. TPDM can directly connect to TPDA's inport or
connect to funnel which will connect to TPDA's inport.
We can use the commands are similar to the below to validate TPDMs.
Enable coresight sink first.
echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
The test data will be collected in the coresight sink which is enabled.
If rwp register of the sink is keeping updating when do integration_test
(by cat tmc_etf0/mgmt/rwp), it means there is data generated from TPDM
to sink.
maintainers:
- Mao Jinlong <quic_jinlmao@quicinc.com>
- Tao Zhang <quic_taozha@quicinc.com>
# Need a custom select here or 'arm,primecell' will match on lots of nodes
select:
properties:
compatible:
contains:
enum:
- qcom,coresight-tpda
required:
- compatible
properties:
$nodename:
pattern: "^tpda(@[0-9a-f]+)$"
compatible:
items:
- const: qcom,coresight-tpda
- const: arm,primecell
reg:
minItems: 1
maxItems: 2
clocks:
maxItems: 1
clock-names:
items:
- const: apb_pclk
in-ports:
type: object
description: |
Input connections from TPDM to TPDA
$ref: /schemas/graph.yaml#/properties/ports
out-ports:
type: object
description: |
Output connections from the TPDA to legacy CoreSight trace bus.
$ref: /schemas/graph.yaml#/properties/ports
properties:
port:
description:
Output connection from the TPDA to legacy CoreSight Trace bus.
$ref: /schemas/graph.yaml#/properties/port
required:
- compatible
- reg
- clocks
- clock-names
- in-ports
- out-ports
additionalProperties: false
examples:
# minimum tpda definition.
- |
tpda@6004000 {
compatible = "qcom,coresight-tpda", "arm,primecell";
reg = <0x6004000 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tpda_qdss_0_in_tpdm_dcc: endpoint {
remote-endpoint =
<&tpdm_dcc_out_tpda_qdss_0>;
};
};
};
out-ports {
port {
tpda_qdss_out_funnel_in0: endpoint {
remote-endpoint =
<&funnel_in0_in_tpda_qdss>;
};
};
};
};
...
Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Trace, Profiling and Diagnostics Monitor - TPDM
description: |
The TPDM or Monitor serves as data collection component for various dataset
types specified in the QPMDA spec. It covers Implementation defined ((ImplDef),
Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete
Single Bit (DSB). It performs data collection in the data producing clock
domain and transfers it to the data collection time domain, generally ATB
clock domain.
The primary use case of the TPDM is to collect data from different data
sources and send it to a TPDA for packetization, timestamping, and funneling.
maintainers:
- Mao Jinlong <quic_jinlmao@quicinc.com>
- Tao Zhang <quic_taozha@quicinc.com>
# Need a custom select here or 'arm,primecell' will match on lots of nodes
select:
properties:
compatible:
contains:
enum:
- qcom,coresight-tpdm
required:
- compatible
properties:
$nodename:
pattern: "^tpdm(@[0-9a-f]+)$"
compatible:
items:
- const: qcom,coresight-tpdm
- const: arm,primecell
reg:
minItems: 1
maxItems: 2
clocks:
maxItems: 1
clock-names:
items:
- const: apb_pclk
out-ports:
description: |
Output connections from the TPDM to coresight funnel/TPDA.
$ref: /schemas/graph.yaml#/properties/ports
properties:
port:
description: Output connection from the TPDM to coresight
funnel/TPDA.
$ref: /schemas/graph.yaml#/properties/port
required:
- compatible
- reg
- clocks
- clock-names
additionalProperties: false
examples:
# minimum TPDM definition. TPDM connect to coresight TPDA.
- |
tpdm@684c000 {
compatible = "qcom,coresight-tpdm", "arm,primecell";
reg = <0x0684c000 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
out-ports {
port {
tpdm_prng_out_tpda_qdss: endpoint {
remote-endpoint =
<&tpda_qdss_in_tpdm_prng>;
};
};
};
};
...
Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml
View file @ 693fed98
......@@ -41,7 +41,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;
......
Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml
View file @ 693fed98
......@@ -39,7 +39,7 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;
......
Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml
View file @ 693fed98
......@@ -59,7 +59,7 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
i2c {
#address-cells = <1>;
#size-cells = <0>;
......
Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml
View file @ 693fed98
......@@ -49,7 +49,7 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
i2c {
#address-cells = <1>;
#size-cells = <0>;
......@@ -64,7 +64,7 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;
......
Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml
View file @ 693fed98
......@@ -58,34 +58,34 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
/* Example for a I2C device node */
accelerometer@1d {
compatible = "adi,adxl355";
reg = <0x1d>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "DRDY";
};
/* Example for a I2C device node */
accelerometer@1d {
compatible = "adi,adxl355";
reg = <0x1d>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "DRDY";
};
};
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
accelerometer@0 {
compatible = "adi,adxl355";
reg = <0>;
spi-max-frequency = <1000000>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "DRDY";
};
accelerometer@0 {
compatible = "adi,adxl355";
reg = <0>;
spi-max-frequency = <1000000>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "DRDY";
};
};
Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml
View file @ 693fed98
......@@ -37,32 +37,32 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
#address-cells = <1>;
#size-cells = <0>;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
/* Example for a I2C device node */
accelerometer@53 {
compatible = "adi,adxl372";
reg = <0x53>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
};
/* Example for a I2C device node */
accelerometer@53 {
compatible = "adi,adxl372";
reg = <0x53>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
};
};
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
#address-cells = <1>;
#size-cells = <0>;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
accelerometer@0 {
compatible = "adi,adxl372";
reg = <0>;
spi-max-frequency = <1000000>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
};
accelerometer@0 {
compatible = "adi,adxl372";
reg = <0>;
spi-max-frequency = <1000000>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
};
};
Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml
View file @ 693fed98
......@@ -36,7 +36,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;
......
Documentation/devicetree/bindings/iio/accel/kionix,kxcjk1013.yaml
View file @ 693fed98
......@@ -44,7 +44,7 @@ examples:
accel@f {
compatible = "kionix,kxtf9";
reg = <0x0F>;
reg = <0xf>;
mount-matrix = "0", "1", "0",
"1", "0", "0",
"0", "0", "1";
......
Documentation/devicetree/bindings/iio/accel/memsensing,msa311.yaml
View file @ 693fed98
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: "http://devicetree.org/schemas/iio/accel/memsensing,msa311.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/iio/accel/memsensing,msa311.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MEMSensing digital 3-Axis accelerometer
......
Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml
View file @ 693fed98
......@@ -50,7 +50,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
i2c {
#address-cells = <1>;
#size-cells = <0>;
......@@ -65,7 +65,7 @@ examples:
};
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;
......
Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml
View file @ 693fed98
......@@ -44,11 +44,11 @@ examples:
#size-cells = <0>;
adc@2f {
compatible = "adi,ad7091r5";
reg = <0x2f>;
compatible = "adi,ad7091r5";
reg = <0x2f>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpio>;
};
};
...
Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml
View file @ 693fed98
......@@ -61,7 +61,7 @@ required:
patternProperties:
"^channel@([0-9]|1[0-5])$":
$ref: "adc.yaml"
$ref: adc.yaml
type: object
description: |
Represents the external channels which are connected to the ADC.
......
Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml
View file @ 693fed98
......@@ -99,26 +99,26 @@ unevaluatedProperties: false
examples:
- |
spi0 {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad7192";
reg = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
spi-cpha;
clocks = <&ad7192_mclk>;
clock-names = "mclk";
interrupts = <25 0x2>;
interrupt-parent = <&gpio>;
dvdd-supply = <&dvdd>;
avdd-supply = <&avdd>;
adi,refin2-pins-enable;
adi,rejection-60-Hz-enable;
adi,buffer-enable;
adi,burnout-currents-enable;
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad7192";
reg = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
spi-cpha;
clocks = <&ad7192_mclk>;
clock-names = "mclk";
interrupts = <25 0x2>;
interrupt-parent = <&gpio>;
dvdd-supply = <&dvdd>;
avdd-supply = <&avdd>;
adi,refin2-pins-enable;
adi,rejection-60-Hz-enable;
adi,buffer-enable;
adi,burnout-currents-enable;
};
};
Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml
View file @ 693fed98
......@@ -43,7 +43,7 @@ required:
patternProperties:
"^channel@[0-7]$":
$ref: "adc.yaml"
$ref: adc.yaml
type: object
description: |
Represents the external channels which are connected to the ADC.
......
Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml
View file @ 693fed98
......@@ -112,30 +112,30 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad7606-8";
reg = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
spi-cpha;
avcc-supply = <&adc_vref>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpio>;
adi,conversion-start-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
adi,first-data-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
adi,oversampling-ratio-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>,
<&gpio 23 GPIO_ACTIVE_HIGH>,
<&gpio 26 GPIO_ACTIVE_HIGH>;
standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
adi,sw-mode;
compatible = "adi,ad7606-8";
reg = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
spi-cpha;
avcc-supply = <&adc_vref>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpio>;
adi,conversion-start-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
adi,first-data-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
adi,oversampling-ratio-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>,
<&gpio 23 GPIO_ACTIVE_HIGH>,
<&gpio 26 GPIO_ACTIVE_HIGH>;
standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
adi,sw-mode;
};
};
...
Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml
View file @ 693fed98
......@@ -72,7 +72,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;
......
Documentation/devicetree/bindings/iio/adc/adi,ad799x.yaml
View file @ 693fed98
......@@ -57,17 +57,17 @@ additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
adc1: adc@28 {
reg = <0x28>;
compatible = "adi,ad7991";
interrupts = <13 2>;
interrupt-parent = <&gpio6>;
adc1: adc@28 {
reg = <0x28>;
compatible = "adi,ad7991";
interrupts = <13 2>;
interrupt-parent = <&gpio6>;
vcc-supply = <&vcc_3v3>;
vref-supply = <&adc_vref>;
vcc-supply = <&vcc_3v3>;
vref-supply = <&adc_vref>;
};
};
...
Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml
View file @ 693fed98
......@@ -64,10 +64,10 @@ examples:
#size-cells = <0>;
adc@0 {
compatible = "adi,ad9467";
reg = <0>;
clocks = <&adc_clk>;
clock-names = "adc-clk";
compatible = "adi,ad9467";
reg = <0>;
clocks = <&adc_clk>;
clock-names = "adc-clk";
};
};
...
Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml
View file @ 693fed98
......@@ -51,11 +51,11 @@ additionalProperties: false
examples:
- |
axi-adc@44a00000 {
compatible = "adi,axi-adc-10.0.a";
reg = <0x44a00000 0x10000>;
dmas = <&rx_dma 0>;
dma-names = "rx";
compatible = "adi,axi-adc-10.0.a";
reg = <0x44a00000 0x10000>;
dmas = <&rx_dma 0>;
dma-names = "rx";
adi,adc-dev = <&spi_adc>;
adi,adc-dev = <&spi_adc>;
};
...
Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml
View file @ 693fed98
......@@ -41,7 +41,7 @@ properties:
description: Startup time expressed in ms, it depends on SoC.
atmel,trigger-edge-type:
$ref: '/schemas/types.yaml#/definitions/uint32'
$ref: /schemas/types.yaml#/definitions/uint32
description:
One of possible edge types for the ADTRG hardware trigger pin.
When the specific edge type is detected, the conversion will
......
Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml
View file @ 693fed98
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: "http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: AVIA HX711 ADC chip for weight cells
......
Documentation/devicetree/bindings/iio/adc/cirrus,ep9301-adc.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/cirrus,ep9301-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Cirrus Logic EP930x internal ADC
description: |
Cirrus Logic EP9301/EP9302 SoCs' internal ADC block.
User's manual:
https://cdn.embeddedts.com/resource-attachments/ts-7000_ep9301-ug.pdf
maintainers:
- Alexander Sverdlin <alexander.sverdlin@gmail.com>
properties:
compatible:
const: cirrus,ep9301-adc
reg:
maxItems: 1
clocks:
maxItems: 1
interrupts:
maxItems: 1
required:
- compatible
- reg
- clocks
additionalProperties: false
examples:
- |
adc: adc@80900000 {
compatible = "cirrus,ep9301-adc";
reg = <0x80900000 0x28>;
clocks = <&syscon 24>;
interrupt-parent = <&vic1>;
interrupts = <30>;
};
...
Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml
View file @ 693fed98
......@@ -2,8 +2,8 @@
# Copyright 2019-2020 Artur Rojek
%YAML 1.2
---
$id: "http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Ingenic JZ47xx ADC controller IIO
......@@ -78,14 +78,14 @@ examples:
#include <dt-bindings/iio/adc/ingenic,adc.h>
adc@10070000 {
compatible = "ingenic,jz4740-adc";
#io-channel-cells = <1>;
compatible = "ingenic,jz4740-adc";
#io-channel-cells = <1>;
reg = <0x10070000 0x30>;
reg = <0x10070000 0x30>;
clocks = <&cgu JZ4740_CLK_ADC>;
clock-names = "adc";
clocks = <&cgu JZ4740_CLK_ADC>;
clock-names = "adc";
interrupt-parent = <&intc>;
interrupts = <18>;
interrupt-parent = <&intc>;
interrupts = <18>;
};
Documentation/devicetree/bindings/iio/adc/maxim,max1027.yaml
View file @ 693fed98
......@@ -54,8 +54,8 @@ examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
maxadc: adc@0 {
compatible = "maxim,max1027";
reg = <0>;
......
Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml
View file @ 693fed98
......@@ -10,7 +10,7 @@ maintainers:
- Jonathan Cameron <jic23@kernel.org>
description: |
Family of simple ADCs with i2c inteface and internal references.
Family of simple ADCs with i2c interface and internal references.
properties:
compatible:
......
Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml
View file @ 693fed98
......@@ -54,8 +54,8 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "maxim,max1241";
......
Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml
View file @ 693fed98
......@@ -10,7 +10,7 @@ maintainers:
- Jonathan Cameron <jic23@kernel.org>
description: |
Family of ADCs with i2c inteface, internal references and threshold
Family of ADCs with i2c interface, internal references and threshold
monitoring.
properties:
......
Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml
View file @ 693fed98
......@@ -2,8 +2,8 @@
# Copyright 2019 Marcus Folkesson <marcus.folkesson@gmail.com>
%YAML 1.2
---
$id: "http://devicetree.org/schemas/iio/adc/microchip,mcp3911.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3911.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip MCP3911 Dual channel analog front end (ADC)
......
Documentation/devicetree/bindings/iio/adc/nxp,imx93-adc.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP iMX93 ADC
maintainers:
- Haibo Chen <haibo.chen@nxp.com>
description:
The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels
connected to pins. it support normal and inject mode, include
One-Shot and Scan (continuous) conversions. Programmable DMA
enables for each channel Also this ADC contain alternate analog
watchdog thresholds, select threshold through input ports. And
also has Self-test logic and Software-initiated calibration.
properties:
compatible:
const: nxp,imx93-adc
reg:
maxItems: 1
interrupts:
items:
- description: WDGnL, watchdog threshold interrupt requests.
- description: WDGnH, watchdog threshold interrupt requests.
- description: normal conversion, include EOC (End of Conversion),
ECH (End of Chain), JEOC (End of Injected Conversion) and
JECH (End of injected Chain).
- description: Self-testing Interrupts.
clocks:
maxItems: 1
clock-names:
const: ipg
vref-supply:
description:
The reference voltage which used to establish channel scaling.
"#io-channel-cells":
const: 1
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- vref-supply
- "#io-channel-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/imx93-clock.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
soc {
#address-cells = <1>;
#size-cells = <1>;
adc@44530000 {
compatible = "nxp,imx93-adc";
reg = <0x44530000 0x10000>;
interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_ADC1_GATE>;
clock-names = "ipg";
vref-supply = <&reg_vref_1v8>;
#io-channel-cells = <1>;
};
};
...
Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.yaml
View file @ 693fed98
......@@ -160,7 +160,7 @@ examples:
};
ref_muxoff: adc-channel@f {
reg = <0x00 0x0f>;
};
};
};
};
...
Documentation/devicetree/bindings/iio/adc/qcom,spmi-iadc.yaml
View file @ 693fed98
......@@ -20,6 +20,7 @@ properties:
compatible:
items:
- enum:
- qcom,pm8226-iadc
- qcom,pm8941-iadc
- const: qcom,spmi-iadc
......@@ -49,7 +50,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spmi_bus {
spmi {
#address-cells = <1>;
#size-cells = <0>;
pmic_iadc: adc@3600 {
......
Documentation/devicetree/bindings/iio/adc/qcom,spmi-rradc.yaml
View file @ 693fed98
......@@ -40,12 +40,12 @@ additionalProperties: false
examples:
- |
pmic {
#address-cells = <1>;
#size-cells = <0>;
pmic_rradc: adc@4500 {
compatible = "qcom,pmi8998-rradc";
reg = <0x4500>;
#io-channel-cells = <1>;
};
#address-cells = <1>;
#size-cells = <0>;
pmic_rradc: adc@4500 {
compatible = "qcom,pmi8998-rradc";
reg = <0x4500>;
#io-channel-cells = <1>;
};
};
Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
View file @ 693fed98
......@@ -69,7 +69,7 @@ required:
patternProperties:
"^channel@[0-7]$":
$ref: "adc.yaml"
$ref: adc.yaml
type: object
description: |
Represents the external channels which are connected to the ADC.
......
Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
View file @ 693fed98
......@@ -52,7 +52,7 @@ properties:
vdd-supply: true
samsung,syscon-phandle:
$ref: '/schemas/types.yaml#/definitions/phandle'
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to the PMU system controller node (to access the ADC_PHY
register on Exynos3250/4x12/5250/5420/5800).
......@@ -142,7 +142,7 @@ examples:
pullup-ohm = <47000>;
pulldown-ohm = <0>;
io-channels = <&adc 4>;
};
};
};
- |
......@@ -150,7 +150,7 @@ examples:
adc@126c0000 {
compatible = "samsung,exynos3250-adc";
reg = <0x126C0000 0x100>;
reg = <0x126c0000 0x100>;
interrupts = <0 137 0>;
#io-channel-cells = <1>;
......
Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
View file @ 693fed98
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 ADC
......@@ -80,7 +80,7 @@ properties:
description:
Phandle to system configuration controller. It can be used to control the
analog circuitry on stm32mp1.
$ref: "/schemas/types.yaml#/definitions/phandle-array"
$ref: /schemas/types.yaml#/definitions/phandle-array
interrupt-controller: true
......@@ -341,7 +341,7 @@ patternProperties:
patternProperties:
"^channel@([0-9]|1[0-9])$":
type: object
$ref: "adc.yaml"
$ref: adc.yaml
description: Represents the external channels which are connected to the ADC.
properties:
......
Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml
View file @ 693fed98
......@@ -35,10 +35,8 @@ additionalProperties: false
examples:
- |
stmpe {
stmpe_adc {
compatible = "st,stmpe-adc";
st,norequest-mask = <0x0F>; /* dont use ADC CH3-0 */
};
adc {
compatible = "st,stmpe-adc";
st,norequest-mask = <0x0f>; /* dont use ADC CH3-0 */
};
...
Documentation/devicetree/bindings/iio/adc/ti,adc081c.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/ti,adc081c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI Single-channel I2C ADCs
maintainers:
- Jonathan Cameron <jic23@kernel.org>
- Lars-Peter Clausen <lars@metafoo.de>
description: |
Single-channel ADC supporting 8, 10, or 12-bit samples and high/low alerts.
properties:
compatible:
enum:
- ti,adc081c
- ti,adc101c
- ti,adc121c
reg:
maxItems: 1
interrupts:
maxItems: 1
vref-supply:
description:
Regulator for the combined power supply and voltage reference
"#io-channel-cells":
const: 1
required:
- compatible
- reg
- vref-supply
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
adc@52 {
compatible = "ti,adc081c";
reg = <0x52>;
vref-supply = <&reg_2p5v>;
};
};
...
Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml
View file @ 693fed98
......@@ -104,12 +104,12 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
reg = <0>;
};
channel@4 {
reg = <4>;
ti,gain = <3>;
ti,datarate = <5>;
reg = <4>;
ti,gain = <3>;
ti,datarate = <5>;
};
};
};
......
Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml
View file @ 693fed98
......@@ -77,7 +77,7 @@ required:
patternProperties:
"^channel@([0-7])$":
$ref: "adc.yaml"
$ref: adc.yaml
type: object
description: |
Represents the external channels which are connected to the ADC.
......
Documentation/devicetree/bindings/iio/adc/ti,ads7924.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/ti,ads7924.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI ADS7924 4 channels 12 bits I2C analog to digital converter
maintainers:
- Hugo Villeneuve <hvilleneuve@dimonoff.com>
description: |
Texas Instruments ADS7924 4 channels 12 bits I2C analog to digital converter
Specifications:
https://www.ti.com/lit/gpn/ads7924
properties:
compatible:
const: ti,ads7924
reg:
maxItems: 1
vref-supply:
description:
The regulator supply for the ADC reference voltage (AVDD)
reset-gpios:
maxItems: 1
interrupts:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 0
"#io-channel-cells":
const: 1
patternProperties:
"^channel@[0-3]+$":
$ref: adc.yaml
description: |
Represents the external channels which are connected to the ADC.
properties:
reg:
description: |
The channel number. It can have up to 4 channels numbered from 0 to 3.
items:
- minimum: 0
maximum: 3
label: true
required:
- reg
additionalProperties: false
additionalProperties: false
required:
- compatible
- reg
- vref-supply
- "#address-cells"
- "#size-cells"
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
adc@48 {
compatible = "ti,ads7924";
reg = <0x48>;
vref-supply = <&ads7924_reg>;
reset-gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpio>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
label = "CH0";
};
channel@1 {
reg = <1>;
label = "CH1";
};
channel@2 {
reg = <2>;
label = "CH2";
};
channel@3 {
reg = <3>;
label = "CH3";
};
};
};
...
Documentation/devicetree/bindings/iio/adc/ti,lmp92064.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/ti,lmp92064.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments LMP92064 Precision Current and Voltage Sensor.
maintainers:
- Leonard Göhrs <l.goehrs@pengutronix.de>
description: |
The LMP92064 is a two channel ADC intended for combined voltage and current
measurements.
The device contains two ADCs to allow simultaneous sampling of voltage and
current and thus of instantaneous power consumption.
properties:
compatible:
enum:
- ti,lmp92064
reg:
maxItems: 1
vdd-supply:
description: Regulator that provides power to the main part of the chip
vdig-supply:
description: |
Regulator that provides power to the digital I/O part of the chip
shunt-resistor-micro-ohms:
description: |
Value of the shunt resistor (in µΩ) connected between INCP and INCN,
across which current is measured. Used to provide correct scaling of the
raw ADC measurement.
reset-gpios:
maxItems: 1
required:
- compatible
- reg
- shunt-resistor-micro-ohms
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "ti,lmp92064";
reg = <0>;
vdd-supply = <&vdd>;
vdig-supply = <&vdd>;
spi-max-frequency = <20000000>;
shunt-resistor-micro-ohms = <15000>;
reset-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
};
};
...
Documentation/devicetree/bindings/iio/adc/ti,tsc2046.yaml
View file @ 693fed98
......@@ -41,7 +41,7 @@ required:
patternProperties:
"^channel@[0-7]$":
$ref: "adc.yaml"
$ref: adc.yaml
type: object
properties:
......@@ -83,36 +83,36 @@ examples:
#size-cells = <0>;
channel@0 {
reg = <0>;
reg = <0>;
};
channel@1 {
reg = <1>;
settling-time-us = <700>;
oversampling-ratio = <5>;
reg = <1>;
settling-time-us = <700>;
oversampling-ratio = <5>;
};
channel@2 {
reg = <2>;
reg = <2>;
};
channel@3 {
reg = <3>;
settling-time-us = <700>;
oversampling-ratio = <5>;
reg = <3>;
settling-time-us = <700>;
oversampling-ratio = <5>;
};
channel@4 {
reg = <4>;
settling-time-us = <700>;
oversampling-ratio = <5>;
reg = <4>;
settling-time-us = <700>;
oversampling-ratio = <5>;
};
channel@5 {
reg = <5>;
settling-time-us = <700>;
oversampling-ratio = <5>;
reg = <5>;
settling-time-us = <700>;
oversampling-ratio = <5>;
};
channel@6 {
reg = <6>;
reg = <6>;
};
channel@7 {
reg = <7>;
reg = <7>;
};
};
};
......
Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml
View file @ 693fed98
......@@ -192,26 +192,26 @@ additionalProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
ad3552r@0 {
compatible = "adi,ad3552r";
reg = <0>;
spi-max-frequency = <20000000>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
adi,output-range-microvolt = <0 10000000>;
};
channel@1 {
reg = <1>;
custom-output-range-config {
adi,gain-offset = <5>;
adi,gain-scaling-p-inv-log2 = <1>;
adi,gain-scaling-n-inv-log2 = <2>;
adi,rfb-ohms = <1>;
};
#address-cells = <1>;
#size-cells = <0>;
ad3552r@0 {
compatible = "adi,ad3552r";
reg = <0>;
spi-max-frequency = <20000000>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
adi,output-range-microvolt = <0 10000000>;
};
channel@1 {
reg = <1>;
custom-output-range-config {
adi,gain-offset = <5>;
adi,gain-scaling-p-inv-log2 = <1>;
adi,gain-scaling-n-inv-log2 = <2>;
adi,rfb-ohms = <1>;
};
};
};
};
......
Documentation/devicetree/bindings/iio/dac/adi,ad5380.yaml
View file @ 693fed98
......@@ -12,6 +12,7 @@ maintainers:
description: |
DAC devices supporting both SPI and I2C interfaces.
properties:
compatible:
enum:
......
Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml
View file @ 693fed98
......@@ -33,6 +33,7 @@ properties:
- description: I2C devices
enum:
- adi,ad5311r
- adi,ad5337r
- adi,ad5338r
- adi,ad5671r
- adi,ad5675r
......
Documentation/devicetree/bindings/iio/dac/adi,ad5766.yaml
View file @ 693fed98
......@@ -51,15 +51,15 @@ additionalProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
ad5766@0 {
compatible = "adi,ad5766";
output-range-microvolts = <(-5000000) 5000000>;
reg = <0>;
spi-cpol;
spi-max-frequency = <1000000>;
reset-gpios = <&gpio 22 0>;
};
};
ad5766@0 {
compatible = "adi,ad5766";
output-range-microvolts = <(-5000000) 5000000>;
reg = <0>;
spi-cpol;
spi-max-frequency = <1000000>;
reset-gpios = <&gpio 22 0>;
};
};
Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml
View file @ 693fed98
......@@ -147,49 +147,49 @@ unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
ad5770r@0 {
compatible = "adi,ad5770r";
reg = <0>;
spi-max-frequency = <1000000>;
vref-supply = <&vref>;
adi,external-resistor;
reset-gpios = <&gpio 22 0>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
adi,range-microamp = <0 300000>;
};
channel@1 {
reg = <1>;
adi,range-microamp = <0 140000>;
};
channel@2 {
reg = <2>;
adi,range-microamp = <0 55000>;
};
channel@3 {
reg = <3>;
adi,range-microamp = <0 45000>;
};
channel@4 {
reg = <4>;
adi,range-microamp = <0 45000>;
};
channel@5 {
reg = <5>;
adi,range-microamp = <0 45000>;
};
};
spi {
#address-cells = <1>;
#size-cells = <0>;
ad5770r@0 {
compatible = "adi,ad5770r";
reg = <0>;
spi-max-frequency = <1000000>;
vref-supply = <&vref>;
adi,external-resistor;
reset-gpios = <&gpio 22 0>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
adi,range-microamp = <0 300000>;
};
channel@1 {
reg = <1>;
adi,range-microamp = <0 140000>;
};
channel@2 {
reg = <2>;
adi,range-microamp = <0 55000>;
};
channel@3 {
reg = <3>;
adi,range-microamp = <0 45000>;
};
channel@4 {
reg = <4>;
adi,range-microamp = <0 45000>;
};
channel@5 {
reg = <5>;
adi,range-microamp = <0 45000>;
};
};
};
...
Documentation/devicetree/bindings/iio/dac/adi,ltc2688.yaml
View file @ 693fed98
......@@ -116,32 +116,32 @@ examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
ltc2688: ltc2688@0 {
compatible = "adi,ltc2688";
reg = <0>;
vcc-supply = <&vcc>;
iovcc-supply = <&vcc>;
vref-supply = <&vref>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
adi,toggle-mode;
adi,overrange;
};
channel@1 {
reg = <1>;
adi,output-range-microvolt = <0 10000000>;
clocks = <&clock_tgp3>;
adi,toggle-dither-input = <2>;
};
};
#address-cells = <1>;
#size-cells = <0>;
ltc2688: ltc2688@0 {
compatible = "adi,ltc2688";
reg = <0>;
vcc-supply = <&vcc>;
iovcc-supply = <&vcc>;
vref-supply = <&vref>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
adi,toggle-mode;
adi,overrange;
};
channel@1 {
reg = <1>;
adi,output-range-microvolt = <0 10000000>;
clocks = <&clock_tgp3>;
adi,toggle-dither-input = <2>;
};
};
};
...
Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml
View file @ 693fed98
......@@ -2,8 +2,8 @@
# Copyright 2019 Marcus Folkesson <marcus.folkesson@gmail.com>
%YAML 1.2
---
$id: "http://devicetree.org/schemas/iio/dac/lltc,ltc1660.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/iio/dac/lltc,ltc1660.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Linear Technology Micropower octal 8-Bit and 10-Bit DACs
......
Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml
View file @ 693fed98
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: "http://devicetree.org/schemas/iio/dac/lltc,ltc2632.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/iio/dac/lltc,ltc2632.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Linear Technology LTC263x 12-/10-/8-Bit Rail-to-Rail DAC
......@@ -64,14 +64,14 @@ examples:
};
spi {
#address-cells = <1>;
#size-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
dac@0 {
compatible = "lltc,ltc2632-l12";
reg = <0>; /* CS0 */
spi-max-frequency = <1000000>;
vref-supply = <&vref>;
};
dac@0 {
compatible = "lltc,ltc2632-l12";
reg = <0>; /* CS0 */
spi-max-frequency = <1000000>;
vref-supply = <&vref>;
};
};
...
Documentation/devicetree/bindings/iio/dac/maxim,max5522.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/dac/maxim,max5522.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Maxim Integrated MAX5522 Dual 10-bit Voltage-Output SPI DACs
maintainers:
- Angelo Dureghello <angelo.dureghello@timesys.com>
- Jonathan Cameron <jic23@kernel.org>
description: |
Datasheet available at:
https://www.analog.com/en/products/max5522.html
properties:
compatible:
const: maxim,max5522
reg:
maxItems: 1
vdd-supply: true
vrefin-supply: true
required:
- compatible
- reg
- vrefin-supply
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
dac@0 {
compatible = "maxim,max5522";
reg = <0>;
vrefin-supply = <&vref>;
};
};
...
Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml
View file @ 693fed98
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/iio/dac/st,stm32-dac.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/iio/dac/st,stm32-dac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 DAC
......
Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml
View file @ 693fed98
......@@ -46,7 +46,7 @@ examples:
dac@4c {
compatible = "ti,dac5571";
reg = <0x4C>;
reg = <0x4c>;
vref-supply = <&vdd_supply>;
};
};
......
Documentation/devicetree/bindings/iio/frequency/adf4371.yaml
View file @ 693fed98
......@@ -53,16 +53,16 @@ unevaluatedProperties: false
examples:
- |
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;
frequency@0 {
compatible = "adi,adf4371";
reg = <0>;
spi-max-frequency = <1000000>;
clocks = <&adf4371_clkin>;
clock-names = "clkin";
compatible = "adi,adf4371";
reg = <0>;
spi-max-frequency = <1000000>;
clocks = <&adf4371_clkin>;
clock-names = "clkin";
};
};
...
Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml
View file @ 693fed98
......@@ -50,13 +50,13 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
gyro@0 {
compatible = "adi,adxrs290";
reg = <0>;
spi-max-frequency = <5000000>;
spi-cpol;
spi-cpha;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
compatible = "adi,adxrs290";
reg = <0>;
spi-max-frequency = <5000000>;
spi-cpol;
spi-cpha;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
};
};
...
Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.yaml
View file @ 693fed98
......@@ -65,34 +65,34 @@ examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
i2c {
#address-cells = <1>;
#size-cells = <0>;
gyroscope@20 {
compatible = "nxp,fxas21002c";
reg = <0x20>;
compatible = "nxp,fxas21002c";
reg = <0x20>;
vdd-supply = <&reg_peri_3p15v>;
vddio-supply = <&reg_peri_3p15v>;
vdd-supply = <&reg_peri_3p15v>;
vddio-supply = <&reg_peri_3p15v>;
interrupt-parent = <&gpio1>;
interrupts = <7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT1";
interrupt-parent = <&gpio1>;
interrupts = <7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT1";
};
};
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;
gyroscope@0 {
compatible = "nxp,fxas21002c";
reg = <0x0>;
compatible = "nxp,fxas21002c";
reg = <0x0>;
spi-max-frequency = <2000000>;
spi-max-frequency = <2000000>;
interrupt-parent = <&gpio2>;
interrupts = <7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT2";
interrupt-parent = <&gpio2>;
interrupts = <7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT2";
};
};
Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml
View file @ 693fed98
......@@ -42,7 +42,7 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
heart_mon@0 {
heart-mon@0 {
compatible = "ti,afe4403";
reg = <0>;
spi-max-frequency = <10000000>;
......
Documentation/devicetree/bindings/iio/health/ti,afe4404.yaml
View file @ 693fed98
......@@ -39,7 +39,7 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
heart_mon@58 {
heart-mon@58 {
compatible = "ti,afe4404";
reg = <0x58>;
tx-supply = <&vbat>;
......
Documentation/devicetree/bindings/iio/humidity/dht11.yaml
View file @ 693fed98
......@@ -34,7 +34,7 @@ additionalProperties: false
examples:
- |
humidity_sensor {
humidity-sensor {
compatible = "dht11";
gpios = <&gpio0 6 0>;
};
......
Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml
View file @ 693fed98
......@@ -35,12 +35,12 @@ additionalProperties: false
examples:
- |
i2c0 {
#address-cells = <1>;
#size-cells = <0>;
humidity@40 {
compatible = "ti,hdc2010";
reg = <0x40>;
};
i2c {
#address-cells = <1>;
#size-cells = <0>;
humidity@40 {
compatible = "ti,hdc2010";
reg = <0x40>;
};
};
Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml
View file @ 693fed98
......@@ -42,7 +42,7 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;
......
Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml
View file @ 693fed98
......@@ -114,17 +114,17 @@ examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
adis16475: adis16475-3@0 {
compatible = "adi,adis16475-3";
reg = <0>;
spi-cpha;
spi-cpol;
spi-max-frequency = <2000000>;
interrupts = <4 IRQ_TYPE_EDGE_RISING>;
interrupt-parent = <&gpio>;
};
#address-cells = <1>;
#size-cells = <0>;
adis16475: adis16475-3@0 {
compatible = "adi,adis16475-3";
reg = <0>;
spi-cpha;
spi-cpol;
spi-max-frequency = <2000000>;
interrupts = <4 IRQ_TYPE_EDGE_RISING>;
interrupt-parent = <&gpio>;
};
};
...
Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml
View file @ 693fed98
......@@ -64,16 +64,16 @@ examples:
#size-cells = <0>;
bmi160@68 {
compatible = "bosch,bmi160";
reg = <0x68>;
vdd-supply = <&pm8916_l17>;
vddio-supply = <&pm8916_l6>;
interrupt-parent = <&gpio4>;
interrupts = <12 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT1";
mount-matrix = "0", "1", "0",
"-1", "0", "0",
"0", "0", "1";
compatible = "bosch,bmi160";
reg = <0x68>;
vdd-supply = <&pm8916_l17>;
vddio-supply = <&pm8916_l6>;
interrupt-parent = <&gpio4>;
interrupts = <12 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT1";
mount-matrix = "0", "1", "0",
"-1", "0", "0",
"0", "0", "1";
};
};
- |
......@@ -84,11 +84,11 @@ examples:
#size-cells = <0>;
bmi160@0 {
compatible = "bosch,bmi160";
reg = <0>;
spi-max-frequency = <10000000>;
interrupt-parent = <&gpio2>;
interrupts = <12 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT2";
compatible = "bosch,bmi160";
reg = <0>;
spi-max-frequency = <10000000>;
interrupt-parent = <&gpio2>;
interrupts = <12 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT2";
};
};
Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml
View file @ 693fed98
......@@ -65,35 +65,35 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
i2c {
#address-cells = <1>;
#size-cells = <0>;
icm42605@68 {
compatible = "invensense,icm42605";
reg = <0x68>;
interrupt-parent = <&gpio2>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
vdd-supply = <&vdd>;
vddio-supply = <&vddio>;
compatible = "invensense,icm42605";
reg = <0x68>;
interrupt-parent = <&gpio2>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
vdd-supply = <&vdd>;
vddio-supply = <&vddio>;
};
};
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;
icm42602@0 {
compatible = "invensense,icm42602";
reg = <0>;
spi-max-frequency = <24000000>;
spi-cpha;
spi-cpol;
interrupt-parent = <&gpio1>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
vdd-supply = <&vdd>;
vddio-supply = <&vddio>;
compatible = "invensense,icm42602";
reg = <0>;
spi-max-frequency = <24000000>;
spi-cpha;
spi-cpol;
interrupt-parent = <&gpio1>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
vdd-supply = <&vdd>;
vddio-supply = <&vddio>;
};
};
Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
View file @ 693fed98
......@@ -49,33 +49,33 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
i2c {
#address-cells = <1>;
#size-cells = <0>;
fxos8700@1e {
compatible = "nxp,fxos8700";
reg = <0x1e>;
compatible = "nxp,fxos8700";
reg = <0x1e>;
interrupt-parent = <&gpio2>;
interrupts = <7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT1";
interrupt-parent = <&gpio2>;
interrupts = <7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT1";
};
};
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;
fxos8700@0 {
compatible = "nxp,fxos8700";
reg = <0>;
compatible = "nxp,fxos8700";
reg = <0>;
spi-max-frequency = <1000000>;
interrupt-parent = <&gpio1>;
interrupts = <7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT2";
spi-max-frequency = <1000000>;
interrupt-parent = <&gpio1>;
interrupts = <7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT2";
};
};
Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml
View file @ 693fed98
......@@ -63,7 +63,7 @@ properties:
description: if defined provides VDD IO power to the sensor.
st,drdy-int-pin:
$ref: '/schemas/types.yaml#/definitions/uint32'
$ref: /schemas/types.yaml#/definitions/uint32
description: |
The pin on the package that will be used to signal data ready
enum:
......
Documentation/devicetree/bindings/iio/magnetometer/ti,tmag5273.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/magnetometer/ti,tmag5273.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI TMAG5273 Low-Power Linear 3D Hall-Effect Sensor
maintainers:
- Gerald Loacker <gerald.loacker@wolfvision.net>
description:
The TI TMAG5273 is a low-power linear 3D Hall-effect sensor. This device
integrates three independent Hall-effect sensors in the X, Y, and Z axes.
The device has an integrated temperature sensor available. The TMAG5273
can be configured through the I2C interface to enable any combination of
magnetic axes and temperature measurements. An integrated angle calculation
engine (CORDIC) provides full 360° angular position information for both
on-axis and off-axis angle measurement topologies. The angle calculation is
performed using two user-selected magnetic axes.
properties:
compatible:
const: ti,tmag5273
reg:
maxItems: 1
"#io-channel-cells":
const: 1
ti,angle-measurement:
$ref: /schemas/types.yaml#/definitions/string
description:
Enables angle measurement in the selected plane.
If not specified, "x-y" will be anables as default.
enum:
- off
- x-y
- y-z
- x-z
vcc-supply:
description:
A regulator providing 1.7 V to 3.6 V supply voltage on the VCC pin,
typically 3.3 V.
interrupts:
description:
The low active interrupt can be configured to be fixed width or latched.
Interrupt events can be configured to be generated from magnetic
thresholds or when a conversion is completed.
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
magnetometer@35 {
compatible = "ti,tmag5273";
reg = <0x35>;
#io-channel-cells = <1>;
ti,angle-measurement = "x-z";
vcc-supply = <&vcc3v3>;
};
};
...
Documentation/devicetree/bindings/iio/magnetometer/yamaha,yas530.yaml
View file @ 693fed98
......@@ -91,12 +91,12 @@ examples:
#size-cells = <0>;
magnetometer@2e {
compatible = "yamaha,yas530";
reg = <0x2e>;
vdd-supply = <&ldo1_reg>;
iovdd-supply = <&ldo2_reg>;
reset-gpios = <&gpio6 12 GPIO_ACTIVE_LOW>;
interrupts = <13 IRQ_TYPE_EDGE_RISING>;
compatible = "yamaha,yas530";
reg = <0x2e>;
vdd-supply = <&ldo1_reg>;
iovdd-supply = <&ldo2_reg>;
reset-gpios = <&gpio6 12 GPIO_ACTIVE_LOW>;
interrupts = <13 IRQ_TYPE_EDGE_RISING>;
};
};
......@@ -105,8 +105,8 @@ examples:
#size-cells = <0>;
magnetometer@2e {
compatible = "yamaha,yas539";
reg = <0x2e>;
vdd-supply = <&ldo1_reg>;
compatible = "yamaha,yas539";
reg = <0x2e>;
vdd-supply = <&ldo1_reg>;
};
};
Documentation/devicetree/bindings/iio/potentiometer/adi,ad5272.yaml
View file @ 693fed98
......@@ -44,7 +44,7 @@ examples:
potentiometer@2f {
compatible = "adi,ad5272-020";
reg = <0x2F>;
reg = <0x2f>;
reset-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
};
};
......
Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml
View file @ 693fed98
......@@ -39,7 +39,7 @@ examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
i2c {
#address-cells = <1>;
#size-cells = <0>;
......
Documentation/devicetree/bindings/iio/pressure/bmp085.yaml
View file @ 693fed98
......@@ -60,16 +60,16 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
#address-cells = <1>;
#size-cells = <0>;
pressure@77 {
compatible = "bosch,bmp085";
reg = <0x77>;
interrupt-parent = <&gpio0>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
vddd-supply = <&foo>;
vdda-supply = <&bar>;
};
i2c {
#address-cells = <1>;
#size-cells = <0>;
pressure@77 {
compatible = "bosch,bmp085";
reg = <0x77>;
interrupt-parent = <&gpio0>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
vddd-supply = <&foo>;
vdda-supply = <&bar>;
};
};
Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml
View file @ 693fed98
......@@ -60,7 +60,7 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
lightning@0 {
lightning@0 {
compatible = "ams,as3935";
reg = <0>;
spi-max-frequency = <400000>;
......
Documentation/devicetree/bindings/iio/proximity/google,cros-ec-mkbp-proximity.yaml
View file @ 693fed98
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
......
Documentation/devicetree/bindings/iio/proximity/semtech,sx9360.yaml
View file @ 693fed98
......@@ -36,7 +36,7 @@ properties:
const: 1
semtech,resolution:
$ref: /schemas/types.yaml#/definitions/uint32-array
$ref: /schemas/types.yaml#/definitions/uint32
enum: [8, 16, 32, 64, 128, 256, 512, 1024]
description:
Capacitance measurement resolution. For both phases, "reference" and
......
Documentation/devicetree/bindings/iio/st,st-sensors.yaml
View file @ 693fed98
......@@ -39,6 +39,7 @@ properties:
- st,lis3lv02dl-accel
- st,lng2dm-accel
- st,lsm303agr-accel
- st,lsm303c-accel
- st,lsm303dl-accel
- st,lsm303dlh-accel
- st,lsm303dlhc-accel
......@@ -66,6 +67,7 @@ properties:
- st,lis2mdl
- st,lis3mdl-magn
- st,lsm303agr-magn
- st,lsm303c-magn
- st,lsm303dlh-magn
- st,lsm303dlhc-magn
- st,lsm303dlm-magn
......
Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml
View file @ 693fed98
......@@ -472,75 +472,74 @@ examples:
#size-cells = <0>;
temperature-sensor@0 {
compatible = "adi,ltc2983";
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <20 IRQ_TYPE_EDGE_RISING>;
interrupt-parent = <&gpio>;
thermocouple@18 {
reg = <18>;
adi,sensor-type = <8>; //Type B
adi,sensor-oc-current-microamp = <10>;
adi,cold-junction-handle = <&diode5>;
};
diode5: diode@5 {
reg = <5>;
adi,sensor-type = <28>;
};
rsense2: rsense@2 {
reg = <2>;
adi,sensor-type = <29>;
adi,rsense-val-milli-ohms = <1200000>; //1.2Kohms
};
rtd@14 {
reg = <14>;
adi,sensor-type = <15>; //PT1000
/*2-wire, internal gnd, no current rotation*/
adi,number-of-wires = <2>;
adi,rsense-share;
adi,excitation-current-microamp = <500>;
adi,rsense-handle = <&rsense2>;
};
adc@10 {
reg = <10>;
adi,sensor-type = <30>;
adi,single-ended;
};
thermistor@12 {
reg = <12>;
adi,sensor-type = <26>; //Steinhart
adi,rsense-handle = <&rsense2>;
adi,custom-steinhart = <0x00F371EC 0x12345678
0x2C0F8733 0x10018C66 0xA0FEACCD
0x90021D99>; //6 entries
};
thermocouple@20 {
reg = <20>;
adi,sensor-type = <9>; //custom thermocouple
adi,single-ended;
adi,custom-thermocouple =
/bits/ 64 <(-50220000) 0>,
/bits/ 64 <(-30200000) 99100000>,
/bits/ 64 <(-5300000) 135400000>,
/bits/ 64 <0 273150000>,
/bits/ 64 <40200000 361200000>,
/bits/ 64 <55300000 522100000>,
/bits/ 64 <88300000 720300000>,
/bits/ 64 <132200000 811200000>,
/bits/ 64 <188700000 922500000>,
/bits/ 64 <460400000 1000000000>; //10 pairs
};
compatible = "adi,ltc2983";
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <20 IRQ_TYPE_EDGE_RISING>;
interrupt-parent = <&gpio>;
thermocouple@18 {
reg = <18>;
adi,sensor-type = <8>; //Type B
adi,sensor-oc-current-microamp = <10>;
adi,cold-junction-handle = <&diode5>;
};
diode5: diode@5 {
reg = <5>;
adi,sensor-type = <28>;
};
rsense2: rsense@2 {
reg = <2>;
adi,sensor-type = <29>;
adi,rsense-val-milli-ohms = <1200000>; //1.2Kohms
};
rtd@14 {
reg = <14>;
adi,sensor-type = <15>; //PT1000
/*2-wire, internal gnd, no current rotation*/
adi,number-of-wires = <2>;
adi,rsense-share;
adi,excitation-current-microamp = <500>;
adi,rsense-handle = <&rsense2>;
};
adc@10 {
reg = <10>;
adi,sensor-type = <30>;
adi,single-ended;
};
thermistor@12 {
reg = <12>;
adi,sensor-type = <26>; //Steinhart
adi,rsense-handle = <&rsense2>;
adi,custom-steinhart = <0x00f371ec 0x12345678
0x2c0f8733 0x10018c66 0xa0feaccd
0x90021d99>; //6 entries
};
thermocouple@20 {
reg = <20>;
adi,sensor-type = <9>; //custom thermocouple
adi,single-ended;
adi,custom-thermocouple =
/bits/ 64 <(-50220000) 0>,
/bits/ 64 <(-30200000) 99100000>,
/bits/ 64 <(-5300000) 135400000>,
/bits/ 64 <0 273150000>,
/bits/ 64 <40200000 361200000>,
/bits/ 64 <55300000 522100000>,
/bits/ 64 <88300000 720300000>,
/bits/ 64 <132200000 811200000>,
/bits/ 64 <188700000 922500000>,
/bits/ 64 <460400000 1000000000>; //10 pairs
};
};
};
...
Documentation/devicetree/bindings/iio/temperature/maxim,max31865.yaml
View file @ 693fed98
......@@ -43,12 +43,12 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
temp_sensor@0 {
compatible = "maxim,max31865";
reg = <0>;
spi-max-frequency = <400000>;
spi-cpha;
maxim,3-wire;
temperature-sensor@0 {
compatible = "maxim,max31865";
reg = <0>;
spi-max-frequency = <400000>;
spi-cpha;
maxim,3-wire;
};
};
...
Documentation/devicetree/bindings/iio/temperature/ti,tmp117.yaml
View file @ 693fed98
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/iio/temperature/ti,tmp117.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/iio/temperature/ti,tmp117.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: "TI TMP117 - Digital temperature sensor with integrated NV memory"
title: TI TMP117 - Digital temperature sensor with integrated NV memory
description: |
TI TMP117 - Digital temperature sensor with integrated NV memory that supports
......
Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
View file @ 693fed98
......@@ -27,11 +27,13 @@ properties:
- qcom,sc7280-cpu-bwmon
- qcom,sc8280xp-cpu-bwmon
- qcom,sdm845-bwmon
- qcom,sm8550-cpu-bwmon
- const: qcom,msm8998-bwmon
- const: qcom,msm8998-bwmon # BWMON v4
- items:
- enum:
- qcom,sc8280xp-llcc-bwmon
- qcom,sm8550-llcc-bwmon
- const: qcom,sc7280-llcc-bwmon
- const: qcom,sc7280-llcc-bwmon # BWMON v5
- const: qcom,sdm845-llcc-bwmon # BWMON v5
......
Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
View file @ 693fed98
......@@ -22,6 +22,7 @@ properties:
- qcom,sc7180-osm-l3
- qcom,sc8180x-osm-l3
- qcom,sdm845-osm-l3
- qcom,sm6350-osm-l3
- qcom,sm8150-osm-l3
- const: qcom,osm-l3
- items:
......
Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml
View file @ 693fed98
......@@ -62,6 +62,37 @@ properties:
power-domains:
maxItems: 1
# Child node's properties
patternProperties:
'^interconnect-[a-z0-9]+$':
type: object
description:
snoc-mm is a child of snoc, sharing snoc's register address space.
properties:
compatible:
enum:
- qcom,msm8939-snoc-mm
'#interconnect-cells':
const: 1
clock-names:
items:
- const: bus
- const: bus_a
clocks:
items:
- description: Bus Clock
- description: Bus A Clock
required:
- compatible
- '#interconnect-cells'
- clock-names
- clocks
required:
- compatible
- reg
......@@ -108,37 +139,6 @@ allOf:
- description: Bus Clock
- description: Bus A Clock
# Child node's properties
patternProperties:
'^interconnect-[a-z0-9]+$':
type: object
description:
snoc-mm is a child of snoc, sharing snoc's register address space.
properties:
compatible:
enum:
- qcom,msm8939-snoc-mm
'#interconnect-cells':
const: 1
clock-names:
items:
- const: bus
- const: bus_a
clocks:
items:
- description: Bus Clock
- description: Bus A Clock
required:
- compatible
- '#interconnect-cells'
- clock-names
- clocks
- if:
properties:
compatible:
......@@ -237,6 +237,17 @@ allOf:
- description: Aggregate2 USB3 AXI Clock.
- description: Config NoC USB2 AXI Clock.
- if:
not:
properties:
compatible:
contains:
enum:
- qcom,msm8939-snoc
then:
patternProperties:
'^interconnect-[a-z0-9]+$': false
examples:
- |
#include <dt-bindings/clock/qcom,rpmcc.h>
......
Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
View file @ 693fed98
......@@ -39,18 +39,6 @@ properties:
- qcom,sc7180-npu-noc
- qcom,sc7180-qup-virt
- qcom,sc7180-system-noc
- qcom,sc7280-aggre1-noc
- qcom,sc7280-aggre2-noc
- qcom,sc7280-clk-virt
- qcom,sc7280-cnoc2
- qcom,sc7280-cnoc3
- qcom,sc7280-dc-noc
- qcom,sc7280-gem-noc
- qcom,sc7280-lpass-ag-noc
- qcom,sc7280-mc-virt
- qcom,sc7280-mmss-noc
- qcom,sc7280-nsp-noc
- qcom,sc7280-system-noc
- qcom,sc8180x-aggre1-noc
- qcom,sc8180x-aggre2-noc
- qcom,sc8180x-camnoc-virt
......@@ -58,23 +46,18 @@ properties:
- qcom,sc8180x-config-noc
- qcom,sc8180x-dc-noc
- qcom,sc8180x-gem-noc
- qcom,sc8180x-ipa-virt
- qcom,sc8180x-mc-virt
- qcom,sc8180x-mmss-noc
- qcom,sc8180x-qup-virt
- qcom,sc8180x-system-noc
- qcom,sc8280xp-aggre1-noc
- qcom,sc8280xp-aggre2-noc
- qcom,sc8280xp-clk-virt
- qcom,sc8280xp-config-noc
- qcom,sc8280xp-dc-noc
- qcom,sc8280xp-gem-noc
- qcom,sc8280xp-lpass-ag-noc
- qcom,sc8280xp-mc-virt
- qcom,sc8280xp-mmss-noc
- qcom,sc8280xp-nspa-noc
- qcom,sc8280xp-nspb-noc
- qcom,sc8280xp-system-noc
- qcom,sdm670-aggre1-noc
- qcom,sdm670-aggre2-noc
- qcom,sdm670-config-noc
- qcom,sdm670-dc-noc
- qcom,sdm670-gladiator-noc
- qcom,sdm670-mem-noc
- qcom,sdm670-mmss-noc
- qcom,sdm670-system-noc
- qcom,sdm845-aggre1-noc
- qcom,sdm845-aggre2-noc
- qcom,sdm845-config-noc
......@@ -96,7 +79,6 @@ properties:
- qcom,sm8150-config-noc
- qcom,sm8150-dc-noc
- qcom,sm8150-gem-noc
- qcom,sm8150-ipa-virt
- qcom,sm8150-mc-virt
- qcom,sm8150-mmss-noc
- qcom,sm8150-system-noc
......@@ -106,7 +88,6 @@ properties:
- qcom,sm8250-config-noc
- qcom,sm8250-dc-noc
- qcom,sm8250-gem-noc
- qcom,sm8250-ipa-virt
- qcom,sm8250-mc-virt
- qcom,sm8250-mmss-noc
- qcom,sm8250-npu-noc
......@@ -121,17 +102,6 @@ properties:
- qcom,sm8350-mmss-noc
- qcom,sm8350-compute-noc
- qcom,sm8350-system-noc
- qcom,sm8450-aggre1-noc
- qcom,sm8450-aggre2-noc
- qcom,sm8450-clk-virt
- qcom,sm8450-config-noc
- qcom,sm8450-gem-noc
- qcom,sm8450-lpass-ag-noc
- qcom,sm8450-mc-virt
- qcom,sm8450-mmss-noc
- qcom,sm8450-nsp-noc
- qcom,sm8450-pcie-anoc
- qcom,sm8450-system-noc
'#interconnect-cells': true
......
Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,sa8775p-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on SA8775P
maintainers:
- Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM).
See also:: include/dt-bindings/interconnect/qcom,sa8775p.h
properties:
compatible:
enum:
- qcom,sa8775p-aggre1-noc
- qcom,sa8775p-aggre2-noc
- qcom,sa8775p-clk-virt
- qcom,sa8775p-config-noc
- qcom,sa8775p-dc-noc
- qcom,sa8775p-gem-noc
- qcom,sa8775p-gpdsp-anoc
- qcom,sa8775p-lpass-ag-noc
- qcom,sa8775p-mc-virt
- qcom,sa8775p-mmss-noc
- qcom,sa8775p-nspa-noc
- qcom,sa8775p-nspb-noc
- qcom,sa8775p-pcie-anoc
- qcom,sa8775p-system-noc
required:
- compatible
allOf:
- $ref: qcom,rpmh-common.yaml#
unevaluatedProperties: false
examples:
- |
aggre1_noc: interconnect-aggre1-noc {
compatible = "qcom,sa8775p-aggre1-noc";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on SC7280
maintainers:
- Bjorn Andersson <andersson@kernel.org>
- Konrad Dybcio <konrad.dybcio@linaro.org>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM).
See also:: include/dt-bindings/interconnect/qcom,sc7280.h
properties:
compatible:
enum:
- qcom,sc7280-aggre1-noc
- qcom,sc7280-aggre2-noc
- qcom,sc7280-clk-virt
- qcom,sc7280-cnoc2
- qcom,sc7280-cnoc3
- qcom,sc7280-dc-noc
- qcom,sc7280-gem-noc
- qcom,sc7280-lpass-ag-noc
- qcom,sc7280-mc-virt
- qcom,sc7280-mmss-noc
- qcom,sc7280-nsp-noc
- qcom,sc7280-system-noc
reg:
maxItems: 1
required:
- compatible
allOf:
- $ref: qcom,rpmh-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,sc7280-clk-virt
then:
properties:
reg: false
else:
required:
- reg
unevaluatedProperties: false
examples:
- |
interconnect {
compatible = "qcom,sc7280-clk-virt";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
interconnect@9100000 {
reg = <0x9100000 0xe2200>;
compatible = "qcom,sc7280-gem-noc";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
Documentation/devicetree/bindings/interconnect/qcom,sc8280xp-rpmh.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,sc8280xp-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on SC8280XP
maintainers:
- Bjorn Andersson <andersson@kernel.org>
- Konrad Dybcio <konrad.dybcio@linaro.org>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM).
See also:: include/dt-bindings/interconnect/qcom,sc8280xp.h
properties:
compatible:
enum:
- qcom,sc8280xp-aggre1-noc
- qcom,sc8280xp-aggre2-noc
- qcom,sc8280xp-clk-virt
- qcom,sc8280xp-config-noc
- qcom,sc8280xp-dc-noc
- qcom,sc8280xp-gem-noc
- qcom,sc8280xp-lpass-ag-noc
- qcom,sc8280xp-mc-virt
- qcom,sc8280xp-mmss-noc
- qcom,sc8280xp-nspa-noc
- qcom,sc8280xp-nspb-noc
- qcom,sc8280xp-system-noc
required:
- compatible
allOf:
- $ref: qcom,rpmh-common.yaml#
unevaluatedProperties: false
examples:
- |
interconnect-0 {
compatible = "qcom,sc8280xp-aggre1-noc";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
Documentation/devicetree/bindings/interconnect/qcom,sm8450-rpmh.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,sm8450-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on SM8450
maintainers:
- Bjorn Andersson <andersson@kernel.org>
- Konrad Dybcio <konrad.dybcio@linaro.org>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM).
See also:: include/dt-bindings/interconnect/qcom,sm8450.h
properties:
compatible:
enum:
- qcom,sm8450-aggre1-noc
- qcom,sm8450-aggre2-noc
- qcom,sm8450-clk-virt
- qcom,sm8450-config-noc
- qcom,sm8450-gem-noc
- qcom,sm8450-lpass-ag-noc
- qcom,sm8450-mc-virt
- qcom,sm8450-mmss-noc
- qcom,sm8450-nsp-noc
- qcom,sm8450-pcie-anoc
- qcom,sm8450-system-noc
reg:
maxItems: 1
clocks:
minItems: 1
maxItems: 4
required:
- compatible
allOf:
- $ref: qcom,rpmh-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8450-clk-virt
- qcom,sm8450-mc-virt
then:
properties:
reg: false
else:
required:
- reg
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8450-aggre1-noc
then:
properties:
clocks:
items:
- description: aggre UFS PHY AXI clock
- description: aggre USB3 PRIM AXI clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8450-aggre2-noc
then:
properties:
clocks:
items:
- description: aggre-NOC PCIe 0 AXI clock
- description: aggre-NOC PCIe 1 AXI clock
- description: aggre UFS PHY AXI clock
- description: RPMH CC IPA clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8450-aggre1-noc
- qcom,sm8450-aggre2-noc
then:
required:
- clocks
else:
properties:
clocks: false
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sm8450.h>
#include <dt-bindings/clock/qcom,rpmh.h>
interconnect-0 {
compatible = "qcom,sm8450-clk-virt";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
interconnect@1700000 {
compatible = "qcom,sm8450-aggre2-noc";
reg = <0x01700000 0x31080>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
clocks = <&gcc GCC_AGGRE_NOC_PCIE_0_AXI_CLK>,
<&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&rpmhcc RPMH_IPA_CLK>;
};
Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml
View file @ 693fed98
......@@ -196,6 +196,8 @@ properties:
maxItems: 2
operating-points-v2: true
opp-table:
type: object
samsung,data-clock-ratio:
$ref: /schemas/types.yaml#/definitions/uint32
......@@ -227,6 +229,31 @@ examples:
operating-points-v2 = <&bus_dmc_opp_table>;
devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
vdd-supply = <&buck1_reg>;
bus_dmc_opp_table: opp-table {
compatible = "operating-points-v2";
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
opp-microvolt = <800000>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <800000>;
};
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-microvolt = <800000>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <825000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <875000>;
};
};
};
ppmu_dmc0: ppmu@106a0000 {
......
Documentation/devicetree/bindings/misc/xlnx,tmr-inject.yaml 0 → 100644
View file @ 693fed98
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/misc/xlnx,tmr-inject.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx Triple Modular Redundancy(TMR) Inject IP
maintainers:
- Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
description: |
The Triple Modular Redundancy(TMR) Inject core provides functional fault
injection by changing selected MicroBlaze instructions, which provides the
possibility to verify that the TMR subsystem error detection and fault
recovery logic is working properly.
properties:
compatible:
enum:
- xlnx,tmr-inject-1.0
reg:
maxItems: 1
xlnx,magic:
minimum: 0
maximum: 255
description: |
Magic number, When configured it allows the controller to perform
recovery.
$ref: /schemas/types.yaml#/definitions/uint32
required:
- compatible
- reg
- xlnx,magic
additionalProperties: false
examples:
- |
fault-inject@44a30000 {
compatible = "xlnx,tmr-inject-1.0";
reg = <0x44a10000 0x10000>;
xlnx,magic = <0x46>;
};
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/misc/xlnx,tmr-manager.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx Triple Modular Redundancy(TMR) Manager IP
maintainers:
- Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
description: |
The Triple Modular Redundancy(TMR) Manager is responsible for handling the
TMR subsystem state, including fault detection and error recovery. The core
is triplicated in each of the sub-blocks in the TMR subsystem, and provides
majority voting of its internal state.
properties:
compatible:
enum:
- xlnx,tmr-manager-1.0
reg:
maxItems: 1
xlnx,magic1:
minimum: 0
maximum: 255
description:
Magic byte 1, When configured it allows the controller to perform
recovery.
$ref: /schemas/types.yaml#/definitions/uint32
required:
- compatible
- reg
- xlnx,magic1
additionalProperties: false
examples:
- |
tmr-manager@44a10000 {
compatible = "xlnx,tmr-manager-1.0";
reg = <0x44a10000 0x10000>;
xlnx,magic1 = <0x46>;
};
Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
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......@@ -19,16 +19,21 @@ properties:
- qcom,apq8064-qfprom
- qcom,apq8084-qfprom
- qcom,ipq8064-qfprom
- qcom,msm8974-qfprom
- qcom,ipq8074-qfprom
- qcom,msm8916-qfprom
- qcom,msm8974-qfprom
- qcom,msm8976-qfprom
- qcom,msm8996-qfprom
- qcom,msm8998-qfprom
- qcom,qcs404-qfprom
- qcom,sc7180-qfprom
- qcom,sc7280-qfprom
- qcom,sdm630-qfprom
- qcom,sdm670-qfprom
- qcom,sdm845-qfprom
- qcom,sm6115-qfprom
- qcom,sm8150-qfprom
- qcom,sm8250-qfprom
- const: qcom,qfprom
reg:
......
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......@@ -278,6 +278,13 @@ To get all available archs you can also specify all. E.g.::
$ make ALLSOURCE_ARCHS=all tags
IGNORE_DIRS
-----------
For tags/TAGS/cscope targets, you can choose which directories won't
be included in the databases, separated by blank space. E.g.::
$ make IGNORE_DIRS="drivers/gpu/drm/radeon tools" cscope
KBUILD_BUILD_TIMESTAMP
----------------------
Setting this to a date string overrides the timestamp used in the
......
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.. SPDX-License-Identifier: GPL-2.0
=================================================================
The trace performance monitoring and diagnostics aggregator(TPDA)
=================================================================
:Author: Jinlong Mao <quic_jinlmao@quicinc.com>
:Date: January 2023
Hardware Description
--------------------
TPDA - The trace performance monitoring and diagnostics aggregator or
TPDA in short serves as an arbitration and packetization engine for the
performance monitoring and diagnostics network specification.
The primary use case of the TPDA is to provide packetization, funneling
and timestamping of Monitor data.
Sysfs files and directories
---------------------------
Root: ``/sys/bus/coresight/devices/tpda<N>``
Config details
---------------------------
The tpdm and tpda nodes should be observed at the coresight path
"/sys/bus/coresight/devices".
e.g.
/sys/bus/coresight/devices # ls -l | grep tpd
tpda0 -> ../../../devices/platform/soc@0/6004000.tpda/tpda0
tpdm0 -> ../../../devices/platform/soc@0/6c08000.mm.tpdm/tpdm0
We can use the commands are similar to the below to validate TPDMs.
Enable coresight sink first. The port of tpda which is connected to
the tpdm will be enabled after commands below.
echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
The test data will be collected in the coresight sink which is enabled.
If rwp register of the sink is keeping updating when do
integration_test (by cat tmc_etf0/mgmt/rwp), it means there is data
generated from TPDM to sink.
There must be a tpda between tpdm and the sink. When there are some
other trace event hw components in the same HW block with tpdm, tpdm
and these hw components will connect to the coresight funnel. When
there is only tpdm trace hw in the HW block, tpdm will connect to
tpda directly.
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.. SPDX-License-Identifier: GPL-2.0
==========================================================
Trace performance monitoring and diagnostics monitor(TPDM)
==========================================================
:Author: Jinlong Mao <quic_jinlmao@quicinc.com>
:Date: January 2023
Hardware Description
--------------------
TPDM - The trace performance monitoring and diagnostics monitor or TPDM in
short serves as data collection component for various dataset types.
The primary use case of the TPDM is to collect data from different data
sources and send it to a TPDA for packetization, timestamping and funneling.
Sysfs files and directories
---------------------------
Root: ``/sys/bus/coresight/devices/tpdm<N>``
----
:File: ``enable_source`` (RW)
:Notes:
- > 0 : enable the datasets of TPDM.
- = 0 : disable the datasets of TPDM.
:Syntax:
``echo 1 > enable_source``
----
:File: ``integration_test`` (wo)
:Notes:
Integration test will generate test data for tpdm.
:Syntax:
``echo value > integration_test``
value - 1 or 2.
----
.. This text is intentionally added to make Sphinx happy.
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