Commit 69b80659 authored by Paul Kocialkowski's avatar Paul Kocialkowski Committed by Mauro Carvalho Chehab

media: sun6i-csi: Use runtime pm for clocks and reset

Wrap the clock and reset preparation into runtime pm functions
for better organization of the code. Also fix the clock and
reset enable order to first deassert reset, as recommended in
Allwinner literature.

Make the driver depend on PM while at it since runtime pm is
mandatory for the driver to work.
Signed-off-by: default avatarPaul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: default avatarJernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@kernel.org>
parent bc67ec9e
......@@ -2,7 +2,7 @@
config VIDEO_SUN6I_CSI
tristate "Allwinner V3s Camera Sensor Interface driver"
depends on V4L_PLATFORM_DRIVERS
depends on VIDEO_DEV && COMMON_CLK && RESET_CONTROLLER && HAS_DMA
depends on VIDEO_DEV && COMMON_CLK && RESET_CONTROLLER && HAS_DMA && PM
depends on ARCH_SUNXI || COMPILE_TEST
select MEDIA_CONTROLLER
select VIDEO_V4L2_SUBDEV_API
......
......@@ -152,40 +152,18 @@ int sun6i_csi_set_power(struct sun6i_csi_device *csi_dev, bool enable)
if (!enable) {
regmap_update_bits(regmap, CSI_EN_REG, CSI_EN_CSI_EN, 0);
pm_runtime_put(dev);
clk_disable_unprepare(csi_dev->clock_ram);
clk_disable_unprepare(csi_dev->clock_mod);
reset_control_assert(csi_dev->reset);
return 0;
}
ret = clk_prepare_enable(csi_dev->clock_mod);
if (ret) {
dev_err(csi_dev->dev, "Enable csi clk err %d\n", ret);
ret = pm_runtime_resume_and_get(dev);
if (ret < 0)
return ret;
}
ret = clk_prepare_enable(csi_dev->clock_ram);
if (ret) {
dev_err(csi_dev->dev, "Enable clk_dram_csi clk err %d\n", ret);
goto clk_mod_disable;
}
ret = reset_control_deassert(csi_dev->reset);
if (ret) {
dev_err(csi_dev->dev, "reset err %d\n", ret);
goto clk_ram_disable;
}
regmap_update_bits(regmap, CSI_EN_REG, CSI_EN_CSI_EN, CSI_EN_CSI_EN);
return 0;
clk_ram_disable:
clk_disable_unprepare(csi_dev->clock_ram);
clk_mod_disable:
clk_disable_unprepare(csi_dev->clock_mod);
return ret;
}
static enum csi_input_fmt get_csi_input_format(struct sun6i_csi_device *csi_dev,
......@@ -797,6 +775,56 @@ static irqreturn_t sun6i_csi_interrupt(int irq, void *private)
return IRQ_HANDLED;
}
static int sun6i_csi_suspend(struct device *dev)
{
struct sun6i_csi_device *csi_dev = dev_get_drvdata(dev);
reset_control_assert(csi_dev->reset);
clk_disable_unprepare(csi_dev->clock_ram);
clk_disable_unprepare(csi_dev->clock_mod);
return 0;
}
static int sun6i_csi_resume(struct device *dev)
{
struct sun6i_csi_device *csi_dev = dev_get_drvdata(dev);
int ret;
ret = reset_control_deassert(csi_dev->reset);
if (ret) {
dev_err(dev, "failed to deassert reset\n");
return ret;
}
ret = clk_prepare_enable(csi_dev->clock_mod);
if (ret) {
dev_err(dev, "failed to enable module clock\n");
goto error_reset;
}
ret = clk_prepare_enable(csi_dev->clock_ram);
if (ret) {
dev_err(dev, "failed to enable ram clock\n");
goto error_clock_mod;
}
return 0;
error_clock_mod:
clk_disable_unprepare(csi_dev->clock_mod);
error_reset:
reset_control_assert(csi_dev->reset);
return ret;
}
static const struct dev_pm_ops sun6i_csi_pm_ops = {
.runtime_suspend = sun6i_csi_suspend,
.runtime_resume = sun6i_csi_resume,
};
static const struct regmap_config sun6i_csi_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
......@@ -876,6 +904,10 @@ static int sun6i_csi_resources_setup(struct sun6i_csi_device *csi_dev,
goto error_clock_rate_exclusive;
}
/* Runtime PM */
pm_runtime_enable(dev);
return 0;
error_clock_rate_exclusive:
......@@ -886,6 +918,7 @@ static int sun6i_csi_resources_setup(struct sun6i_csi_device *csi_dev,
static void sun6i_csi_resources_cleanup(struct sun6i_csi_device *csi_dev)
{
pm_runtime_disable(csi_dev->dev);
clk_rate_exclusive_put(csi_dev->clock_mod);
}
......@@ -968,6 +1001,7 @@ static struct platform_driver sun6i_csi_platform_driver = {
.driver = {
.name = SUN6I_CSI_NAME,
.of_match_table = of_match_ptr(sun6i_csi_of_match),
.pm = &sun6i_csi_pm_ops,
},
};
......
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