Commit 6abf32f1 authored by Anup Patel's avatar Anup Patel Committed by Palmer Dabbelt

cpuidle: Add RISC-V SBI CPU idle driver

The RISC-V SBI HSM extension provides HSM suspend call which can
be used by Linux RISC-V to enter platform specific low-power state.

This patch adds a CPU idle driver based on RISC-V SBI calls which
will populate idle states from device tree and use SBI calls to
entry these idle states.
Signed-off-by: default avatarAnup Patel <anup.patel@wdc.com>
Signed-off-by: default avatarAnup Patel <apatel@ventanamicro.com>
Acked-by: default avatarAtish Patra <atishp@rivosinc.com>
Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 9d976d67
......@@ -5058,6 +5058,13 @@ S: Supported
F: drivers/cpuidle/dt_idle_genpd.c
F: drivers/cpuidle/dt_idle_genpd.h
CPUIDLE DRIVER - RISC-V SBI
M: Anup Patel <anup@brainfault.org>
L: linux-pm@vger.kernel.org
L: linux-riscv@lists.infradead.org
S: Maintained
F: drivers/cpuidle/cpuidle-riscv-sbi.c
CRAMFS FILESYSTEM
M: Nicolas Pitre <nico@fluxnic.net>
S: Maintained
......
......@@ -66,6 +66,11 @@ depends on PPC
source "drivers/cpuidle/Kconfig.powerpc"
endmenu
menu "RISC-V CPU Idle Drivers"
depends on RISCV
source "drivers/cpuidle/Kconfig.riscv"
endmenu
config HALTPOLL_CPUIDLE
tristate "Halt poll cpuidle driver"
depends on X86 && KVM_GUEST
......
# SPDX-License-Identifier: GPL-2.0-only
#
# RISC-V CPU Idle drivers
#
config RISCV_SBI_CPUIDLE
bool "RISC-V SBI CPU idle Driver"
depends on RISCV_SBI
select DT_IDLE_STATES
select CPU_IDLE_MULTIPLE_DRIVERS
select DT_IDLE_GENPD if PM_GENERIC_DOMAINS_OF
help
Select this option to enable RISC-V SBI firmware based CPU idle
driver for RISC-V systems. This drivers also supports hierarchical
DT based layout of the idle state.
......@@ -35,3 +35,7 @@ obj-$(CONFIG_MIPS_CPS_CPUIDLE) += cpuidle-cps.o
# POWERPC drivers
obj-$(CONFIG_PSERIES_CPUIDLE) += cpuidle-pseries.o
obj-$(CONFIG_POWERNV_CPUIDLE) += cpuidle-powernv.o
###############################################################################
# RISC-V drivers
obj-$(CONFIG_RISCV_SBI_CPUIDLE) += cpuidle-riscv-sbi.o
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