ASoC: Intel: sof_da7219: add adl_mx98360_da7219 board config
This configuration supports ADL boards which implement DA7219 on SSP0 and MAX98360A on SSP1. DA7219 uses PLL bypass mode to avoid WCLK locking problem. To use this mode, MCLK frequency must be 12.288 or 24.576MHz. Signed-off-by: Brent Lu <brent.lu@intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20230915124852.1696857-19-yung-chuan.liao@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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