Commit 6bf07b8e authored by Yuval Mintz's avatar Yuval Mintz Committed by David S. Miller

bnx2x: Revise prints

This patch revises many bnx2x prints - mainly fixing print typos and
adding some new debug prints (mostly for parity issues).
Signed-off-by: default avatarYuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: default avatarAriel Elior <ariele@broadcom.com>
Signed-off-by: default avatarEilon Greenstein <eilong@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3cdeec22
...@@ -1900,7 +1900,6 @@ u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type, ...@@ -1900,7 +1900,6 @@ u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type,
void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae,
u8 src_type, u8 dst_type); u8 src_type, u8 dst_type);
int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae); int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae);
void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl);
/* FLR related routines */ /* FLR related routines */
u32 bnx2x_flr_clnup_poll_count(struct bnx2x *bp); u32 bnx2x_flr_clnup_poll_count(struct bnx2x *bp);
......
...@@ -2162,10 +2162,10 @@ static int bnx2x_alloc_fw_stats_mem(struct bnx2x *bp) ...@@ -2162,10 +2162,10 @@ static int bnx2x_alloc_fw_stats_mem(struct bnx2x *bp)
bp->fw_stats_data_mapping = bp->fw_stats_mapping + bp->fw_stats_data_mapping = bp->fw_stats_mapping +
bp->fw_stats_req_sz; bp->fw_stats_req_sz;
DP(BNX2X_MSG_SP, "statistics request base address set to %x %x", DP(BNX2X_MSG_SP, "statistics request base address set to %x %x\n",
U64_HI(bp->fw_stats_req_mapping), U64_HI(bp->fw_stats_req_mapping),
U64_LO(bp->fw_stats_req_mapping)); U64_LO(bp->fw_stats_req_mapping));
DP(BNX2X_MSG_SP, "statistics data base address set to %x %x", DP(BNX2X_MSG_SP, "statistics data base address set to %x %x\n",
U64_HI(bp->fw_stats_data_mapping), U64_HI(bp->fw_stats_data_mapping),
U64_LO(bp->fw_stats_data_mapping)); U64_LO(bp->fw_stats_data_mapping));
return 0; return 0;
...@@ -2240,7 +2240,7 @@ int bnx2x_nic_load_analyze_req(struct bnx2x *bp, u32 load_code) ...@@ -2240,7 +2240,7 @@ int bnx2x_nic_load_analyze_req(struct bnx2x *bp, u32 load_code)
/* abort nic load if version mismatch */ /* abort nic load if version mismatch */
if (my_fw != loaded_fw) { if (my_fw != loaded_fw) {
BNX2X_ERR("bnx2x with FW %x was already loaded which mismatches my %x FW. aborting\n", BNX2X_ERR("bnx2x with FW %x was already loaded which mismatches my %x FW. Aborting\n",
loaded_fw, my_fw); loaded_fw, my_fw);
return -EBUSY; return -EBUSY;
} }
...@@ -3977,7 +3977,7 @@ int bnx2x_setup_tc(struct net_device *dev, u8 num_tc) ...@@ -3977,7 +3977,7 @@ int bnx2x_setup_tc(struct net_device *dev, u8 num_tc)
/* requested to support too many traffic classes */ /* requested to support too many traffic classes */
if (num_tc > bp->max_cos) { if (num_tc > bp->max_cos) {
BNX2X_ERR("support for too many traffic classes requested: %d. max supported is %d\n", BNX2X_ERR("support for too many traffic classes requested: %d. Max supported is %d\n",
num_tc, bp->max_cos); num_tc, bp->max_cos);
return -EINVAL; return -EINVAL;
} }
......
...@@ -49,13 +49,15 @@ extern int int_mode; ...@@ -49,13 +49,15 @@ extern int int_mode;
} \ } \
} while (0) } while (0)
#define BNX2X_PCI_ALLOC(x, y, size) \ #define BNX2X_PCI_ALLOC(x, y, size) \
do { \ do { \
x = dma_alloc_coherent(&bp->pdev->dev, size, y, \ x = dma_alloc_coherent(&bp->pdev->dev, size, y, \
GFP_KERNEL | __GFP_ZERO); \ GFP_KERNEL | __GFP_ZERO); \
if (x == NULL) \ if (x == NULL) \
goto alloc_mem_err; \ goto alloc_mem_err; \
} while (0) DP(NETIF_MSG_HW, "BNX2X_PCI_ALLOC: Physical %Lx Virtual %p\n", \
(unsigned long long)(*y), x); \
} while (0)
#define BNX2X_ALLOC(x, size) \ #define BNX2X_ALLOC(x, size) \
do { \ do { \
......
...@@ -2381,7 +2381,7 @@ static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid, ...@@ -2381,7 +2381,7 @@ static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid,
*flags |= DCB_FEATCFG_ERROR; *flags |= DCB_FEATCFG_ERROR;
break; break;
default: default:
BNX2X_ERR("Non valid featrue-ID\n"); BNX2X_ERR("Non valid feature-ID\n");
rval = 1; rval = 1;
break; break;
} }
...@@ -2422,7 +2422,7 @@ static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid, ...@@ -2422,7 +2422,7 @@ static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid,
flags & DCB_FEATCFG_WILLING ? 1 : 0; flags & DCB_FEATCFG_WILLING ? 1 : 0;
break; break;
default: default:
BNX2X_ERR("Non valid featrue-ID\n"); BNX2X_ERR("Non valid feature-ID\n");
rval = 1; rval = 1;
break; break;
} }
......
...@@ -35,6 +35,8 @@ ...@@ -35,6 +35,8 @@
#define ATC_REG_ATC_INT_STS_CLR 0x1101c0 #define ATC_REG_ATC_INT_STS_CLR 0x1101c0
/* [RW 5] Parity mask register #0 read/write */ /* [RW 5] Parity mask register #0 read/write */
#define ATC_REG_ATC_PRTY_MASK 0x1101d8 #define ATC_REG_ATC_PRTY_MASK 0x1101d8
/* [R 5] Parity register #0 read */
#define ATC_REG_ATC_PRTY_STS 0x1101cc
/* [RC 5] Parity register #0 read clear */ /* [RC 5] Parity register #0 read clear */
#define ATC_REG_ATC_PRTY_STS_CLR 0x1101d0 #define ATC_REG_ATC_PRTY_STS_CLR 0x1101d0
/* [RW 19] Interrupt mask register #0 read/write */ /* [RW 19] Interrupt mask register #0 read/write */
...@@ -2750,6 +2752,8 @@ ...@@ -2750,6 +2752,8 @@
#define PBF_REG_PBF_INT_STS 0x1401c8 #define PBF_REG_PBF_INT_STS 0x1401c8
/* [RW 20] Parity mask register #0 read/write */ /* [RW 20] Parity mask register #0 read/write */
#define PBF_REG_PBF_PRTY_MASK 0x1401e4 #define PBF_REG_PBF_PRTY_MASK 0x1401e4
/* [R 28] Parity register #0 read */
#define PBF_REG_PBF_PRTY_STS 0x1401d8
/* [RC 20] Parity register #0 read clear */ /* [RC 20] Parity register #0 read clear */
#define PBF_REG_PBF_PRTY_STS_CLR 0x1401dc #define PBF_REG_PBF_PRTY_STS_CLR 0x1401dc
/* [RW 16] The Ethernet type value for L2 tag 0 */ /* [RW 16] The Ethernet type value for L2 tag 0 */
...@@ -4517,6 +4521,8 @@ ...@@ -4517,6 +4521,8 @@
#define TM_REG_TM_INT_STS 0x1640f0 #define TM_REG_TM_INT_STS 0x1640f0
/* [RW 7] Parity mask register #0 read/write */ /* [RW 7] Parity mask register #0 read/write */
#define TM_REG_TM_PRTY_MASK 0x16410c #define TM_REG_TM_PRTY_MASK 0x16410c
/* [R 7] Parity register #0 read */
#define TM_REG_TM_PRTY_STS 0x164100
/* [RC 7] Parity register #0 read clear */ /* [RC 7] Parity register #0 read clear */
#define TM_REG_TM_PRTY_STS_CLR 0x164104 #define TM_REG_TM_PRTY_STS_CLR 0x164104
/* [RW 8] The event id for aggregated interrupt 0 */ /* [RW 8] The event id for aggregated interrupt 0 */
......
...@@ -1620,7 +1620,7 @@ static void bnx2x_vf_flr_clnup(struct bnx2x *bp, struct bnx2x_virtf *prev_vf) ...@@ -1620,7 +1620,7 @@ static void bnx2x_vf_flr_clnup(struct bnx2x *bp, struct bnx2x_virtf *prev_vf)
i++) i++)
; ;
DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. num of vfs: %d\n", i, DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n", i,
BNX2X_NR_VIRTFN(bp)); BNX2X_NR_VIRTFN(bp));
if (i < BNX2X_NR_VIRTFN(bp)) { if (i < BNX2X_NR_VIRTFN(bp)) {
...@@ -3031,7 +3031,7 @@ int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param) ...@@ -3031,7 +3031,7 @@ int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
/* HW channel is only operational when PF is up */ /* HW channel is only operational when PF is up */
if (bp->state != BNX2X_STATE_OPEN) { if (bp->state != BNX2X_STATE_OPEN) {
BNX2X_ERR("VF num configurtion via sysfs not supported while PF is down"); BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
return -EINVAL; return -EINVAL;
} }
...@@ -3391,7 +3391,7 @@ enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp) ...@@ -3391,7 +3391,7 @@ enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
if (bulletin.crc == bnx2x_crc_vf_bulletin(bp, if (bulletin.crc == bnx2x_crc_vf_bulletin(bp,
&bulletin)) &bulletin))
break; break;
BNX2X_ERR("bad crc on bulletin board. contained %x computed %x\n", BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
bulletin.crc, bulletin.crc,
bnx2x_crc_vf_bulletin(bp, &bulletin)); bnx2x_crc_vf_bulletin(bp, &bulletin));
} }
......
...@@ -496,7 +496,7 @@ enum { ...@@ -496,7 +496,7 @@ enum {
else if ((next) == VFOP_VERIFY_PEND) \ else if ((next) == VFOP_VERIFY_PEND) \
BNX2X_ERR("expected pending\n"); \ BNX2X_ERR("expected pending\n"); \
else { \ else { \
DP(BNX2X_MSG_IOV, "no ramrod. scheduling\n"); \ DP(BNX2X_MSG_IOV, "no ramrod. Scheduling\n"); \
atomic_set(&vf->op_in_progress, 1); \ atomic_set(&vf->op_in_progress, 1); \
queue_delayed_work(bnx2x_wq, &bp->sp_task, 0); \ queue_delayed_work(bnx2x_wq, &bp->sp_task, 0); \
return; \ return; \
......
...@@ -333,7 +333,7 @@ int bnx2x_vfpf_release(struct bnx2x *bp) ...@@ -333,7 +333,7 @@ int bnx2x_vfpf_release(struct bnx2x *bp)
DP(BNX2X_MSG_SP, "vf released\n"); DP(BNX2X_MSG_SP, "vf released\n");
} else { } else {
/* PF reports error */ /* PF reports error */
BNX2X_ERR("PF failed our release request - are we out of sync? response status: %d\n", BNX2X_ERR("PF failed our release request - are we out of sync? Response status: %d\n",
resp->hdr.status); resp->hdr.status);
rc = -EAGAIN; rc = -EAGAIN;
goto out; goto out;
...@@ -844,7 +844,6 @@ static int bnx2x_copy32_vf_dmae(struct bnx2x *bp, u8 from_vf, ...@@ -844,7 +844,6 @@ static int bnx2x_copy32_vf_dmae(struct bnx2x *bp, u8 from_vf,
dmae.dst_addr_hi = vf_addr_hi; dmae.dst_addr_hi = vf_addr_hi;
} }
dmae.len = len32; dmae.len = len32;
bnx2x_dp_dmae(bp, &dmae, BNX2X_MSG_DMAE);
/* issue the command and wait for completion */ /* issue the command and wait for completion */
return bnx2x_issue_dmae_with_comp(bp, &dmae); return bnx2x_issue_dmae_with_comp(bp, &dmae);
...@@ -1588,8 +1587,9 @@ static void bnx2x_vf_mbx_request(struct bnx2x *bp, struct bnx2x_virtf *vf, ...@@ -1588,8 +1587,9 @@ static void bnx2x_vf_mbx_request(struct bnx2x *bp, struct bnx2x_virtf *vf,
* support them. Or this may be because someone wrote a crappy * support them. Or this may be because someone wrote a crappy
* VF driver and is sending garbage over the channel. * VF driver and is sending garbage over the channel.
*/ */
BNX2X_ERR("unknown TLV. type %d length %d. first 20 bytes of mailbox buffer:\n", BNX2X_ERR("unknown TLV. type %d length %d vf->state was %d. first 20 bytes of mailbox buffer:\n",
mbx->first_tlv.tl.type, mbx->first_tlv.tl.length); mbx->first_tlv.tl.type, mbx->first_tlv.tl.length,
vf->state);
for (i = 0; i < 20; i++) for (i = 0; i < 20; i++)
DP_CONT(BNX2X_MSG_IOV, "%x ", DP_CONT(BNX2X_MSG_IOV, "%x ",
mbx->msg->req.tlv_buf_size.tlv_buffer[i]); mbx->msg->req.tlv_buf_size.tlv_buffer[i]);
......
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