Commit 6c17e9dd authored by Mohan Kumar's avatar Mohan Kumar Committed by Takashi Iwai

ASoC: hda/tegra: Set buffer alignment to 128 bytes

Set chip->align_buffer_size to 1 for Tegra platforms to make the buffer
alignment to be multiple of 128 bytes. This fix is applied as gstreamer
alsasink gets stuck with the default buffer-time and latency-time
parameters with 4 byte buffer alignment.
Signed-off-by: default avatarMohan Kumar <mkumard@nvidia.com>
Link: https://lore.kernel.org/r/20200805095221.5476-2-mkumard@nvidia.comSigned-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 80982c7e
...@@ -333,6 +333,8 @@ static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev) ...@@ -333,6 +333,8 @@ static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
gcap = azx_readw(chip, GCAP); gcap = azx_readw(chip, GCAP);
dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap); dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
chip->align_buffer_size = 1;
/* read number of streams from GCAP register instead of using /* read number of streams from GCAP register instead of using
* hardcoded value * hardcoded value
*/ */
......
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