Skip to content

L
linux
Commit 6c1e8ab2 authored by Dave Jiang's avatar Dave Jiang Committed by Jon Mason
Browse files
Options

ntb: intel: change references of skx to gen3 

Change all references to skx to gen3 NTB.
Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
Signed-off-by: default avatarJon Mason <jdmason@kudzu.us>
parent f6e51c35
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 126 additions and 130 deletions
drivers/ntb/hw/intel/ntb_hw_gen1.c
View file @ 6c1e8ab2
......@@ -45,9 +45,6 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Intel PCIe NTB Linux driver
*
* Contact Information:
* Jon Mason <jon.mason@intel.com>
*/
#include <linux/debugfs.h>
......@@ -651,7 +648,7 @@ static ssize_t ndev_ntb_debugfs_read(struct file *filp, char __user *ubuf,
"LMT45 -\t\t\t%#018llx\n", u.v64);
}
if (pdev_is_xeon(pdev)) {
if (pdev_is_gen1(pdev)) {
if (ntb_topo_is_b2b(ndev->ntb.topo)) {
off += scnprintf(buf + off, buf_size - off,
"\nNTB Outgoing B2B XLAT:\n");
......@@ -763,9 +760,9 @@ static ssize_t ndev_debugfs_read(struct file *filp, char __user *ubuf,
{
struct intel_ntb_dev *ndev = filp->private_data;
if (pdev_is_xeon(ndev->ntb.pdev))
if (pdev_is_gen1(ndev->ntb.pdev))
return ndev_ntb_debugfs_read(filp, ubuf, count, offp);
else if (pdev_is_skx_xeon(ndev->ntb.pdev))
else if (pdev_is_gen3(ndev->ntb.pdev))
return ndev_ntb3_debugfs_read(filp, ubuf, count, offp);
return -ENXIO;
......@@ -1849,7 +1846,7 @@ static int intel_ntb_pci_probe(struct pci_dev *pdev,
node = dev_to_node(&pdev->dev);
if (pdev_is_xeon(pdev)) {
if (pdev_is_gen1(pdev)) {
ndev = kzalloc_node(sizeof(*ndev), GFP_KERNEL, node);
if (!ndev) {
rc = -ENOMEM;
......@@ -1866,7 +1863,7 @@ static int intel_ntb_pci_probe(struct pci_dev *pdev,
if (rc)
goto err_init_dev;
} else if (pdev_is_skx_xeon(pdev)) {
} else if (pdev_is_gen3(pdev)) {
ndev = kzalloc_node(sizeof(*ndev), GFP_KERNEL, node);
if (!ndev) {
rc = -ENOMEM;
......@@ -1880,7 +1877,7 @@ static int intel_ntb_pci_probe(struct pci_dev *pdev,
if (rc)
goto err_init_pci;
rc = skx_init_dev(ndev);
rc = gen3_init_dev(ndev);
if (rc)
goto err_init_dev;
......@@ -1905,7 +1902,7 @@ static int intel_ntb_pci_probe(struct pci_dev *pdev,
err_register:
ndev_deinit_debugfs(ndev);
if (pdev_is_xeon(pdev) || pdev_is_skx_xeon(pdev))
if (pdev_is_gen1(pdev) || pdev_is_gen3(pdev))
xeon_deinit_dev(ndev);
err_init_dev:
intel_ntb_deinit_pci(ndev);
......@@ -1921,7 +1918,7 @@ static void intel_ntb_pci_remove(struct pci_dev *pdev)
ntb_unregister_device(&ndev->ntb);
ndev_deinit_debugfs(ndev);
if (pdev_is_xeon(pdev) || pdev_is_skx_xeon(pdev))
if (pdev_is_gen1(pdev) || pdev_is_gen3(pdev))
xeon_deinit_dev(ndev);
intel_ntb_deinit_pci(ndev);
kfree(ndev);
......
drivers/ntb/hw/intel/ntb_hw_gen3.c
View file @ 6c1e8ab2
This diff is collapsed.
drivers/ntb/hw/intel/ntb_hw_gen3.h
View file @ 6c1e8ab2
......@@ -47,64 +47,63 @@
#include "ntb_hw_intel.h"
/* Intel Skylake Xeon hardware */
#define SKX_IMBAR1SZ_OFFSET 0x00d0
#define SKX_IMBAR2SZ_OFFSET 0x00d1
#define SKX_EMBAR1SZ_OFFSET 0x00d2
#define SKX_EMBAR2SZ_OFFSET 0x00d3
#define SKX_DEVCTRL_OFFSET 0x0098
#define SKX_DEVSTS_OFFSET 0x009a
#define SKX_UNCERRSTS_OFFSET 0x014c
#define SKX_CORERRSTS_OFFSET 0x0158
#define SKX_LINK_STATUS_OFFSET 0x01a2
#define GEN3_IMBAR1SZ_OFFSET 0x00d0
#define GEN3_IMBAR2SZ_OFFSET 0x00d1
#define GEN3_EMBAR1SZ_OFFSET 0x00d2
#define GEN3_EMBAR2SZ_OFFSET 0x00d3
#define GEN3_DEVCTRL_OFFSET 0x0098
#define GEN3_DEVSTS_OFFSET 0x009a
#define GEN3_UNCERRSTS_OFFSET 0x014c
#define GEN3_CORERRSTS_OFFSET 0x0158
#define GEN3_LINK_STATUS_OFFSET 0x01a2
#define SKX_NTBCNTL_OFFSET 0x0000
#define SKX_IMBAR1XBASE_OFFSET 0x0010 /* SBAR2XLAT */
#define SKX_IMBAR1XLMT_OFFSET 0x0018 /* SBAR2LMT */
#define SKX_IMBAR2XBASE_OFFSET 0x0020 /* SBAR4XLAT */
#define SKX_IMBAR2XLMT_OFFSET 0x0028 /* SBAR4LMT */
#define SKX_IM_INT_STATUS_OFFSET 0x0040
#define SKX_IM_INT_DISABLE_OFFSET 0x0048
#define SKX_IM_SPAD_OFFSET 0x0080 /* SPAD */
#define SKX_USMEMMISS_OFFSET 0x0070
#define SKX_INTVEC_OFFSET 0x00d0
#define SKX_IM_DOORBELL_OFFSET 0x0100 /* SDOORBELL0 */
#define SKX_B2B_SPAD_OFFSET 0x0180 /* B2B SPAD */
#define SKX_EMBAR0XBASE_OFFSET 0x4008 /* B2B_XLAT */
#define SKX_EMBAR1XBASE_OFFSET 0x4010 /* PBAR2XLAT */
#define SKX_EMBAR1XLMT_OFFSET 0x4018 /* PBAR2LMT */
#define SKX_EMBAR2XBASE_OFFSET 0x4020 /* PBAR4XLAT */
#define SKX_EMBAR2XLMT_OFFSET 0x4028 /* PBAR4LMT */
#define SKX_EM_INT_STATUS_OFFSET 0x4040
#define SKX_EM_INT_DISABLE_OFFSET 0x4048
#define SKX_EM_SPAD_OFFSET 0x4080 /* remote SPAD */
#define SKX_EM_DOORBELL_OFFSET 0x4100 /* PDOORBELL0 */
#define SKX_SPCICMD_OFFSET 0x4504 /* SPCICMD */
#define SKX_EMBAR0_OFFSET 0x4510 /* SBAR0BASE */
#define SKX_EMBAR1_OFFSET 0x4518 /* SBAR23BASE */
#define SKX_EMBAR2_OFFSET 0x4520 /* SBAR45BASE */
#define GEN3_NTBCNTL_OFFSET 0x0000
#define GEN3_IMBAR1XBASE_OFFSET 0x0010 /* SBAR2XLAT */
#define GEN3_IMBAR1XLMT_OFFSET 0x0018 /* SBAR2LMT */
#define GEN3_IMBAR2XBASE_OFFSET 0x0020 /* SBAR4XLAT */
#define GEN3_IMBAR2XLMT_OFFSET 0x0028 /* SBAR4LMT */
#define GEN3_IM_INT_STATUS_OFFSET 0x0040
#define GEN3_IM_INT_DISABLE_OFFSET 0x0048
#define GEN3_IM_SPAD_OFFSET 0x0080 /* SPAD */
#define GEN3_USMEMMISS_OFFSET 0x0070
#define GEN3_INTVEC_OFFSET 0x00d0
#define GEN3_IM_DOORBELL_OFFSET 0x0100 /* SDOORBELL0 */
#define GEN3_B2B_SPAD_OFFSET 0x0180 /* B2B SPAD */
#define GEN3_EMBAR0XBASE_OFFSET 0x4008 /* B2B_XLAT */
#define GEN3_EMBAR1XBASE_OFFSET 0x4010 /* PBAR2XLAT */
#define GEN3_EMBAR1XLMT_OFFSET 0x4018 /* PBAR2LMT */
#define GEN3_EMBAR2XBASE_OFFSET 0x4020 /* PBAR4XLAT */
#define GEN3_EMBAR2XLMT_OFFSET 0x4028 /* PBAR4LMT */
#define GEN3_EM_INT_STATUS_OFFSET 0x4040
#define GEN3_EM_INT_DISABLE_OFFSET 0x4048
#define GEN3_EM_SPAD_OFFSET 0x4080 /* remote SPAD */
#define GEN3_EM_DOORBELL_OFFSET 0x4100 /* PDOORBELL0 */
#define GEN3_SPCICMD_OFFSET 0x4504 /* SPCICMD */
#define GEN3_EMBAR0_OFFSET 0x4510 /* SBAR0BASE */
#define GEN3_EMBAR1_OFFSET 0x4518 /* SBAR23BASE */
#define GEN3_EMBAR2_OFFSET 0x4520 /* SBAR45BASE */
#define SKX_DB_COUNT 32
#define SKX_DB_LINK 32
#define SKX_DB_LINK_BIT BIT_ULL(SKX_DB_LINK)
#define SKX_DB_MSIX_VECTOR_COUNT 33
#define SKX_DB_MSIX_VECTOR_SHIFT 1
#define SKX_DB_TOTAL_SHIFT 33
#define SKX_SPAD_COUNT 16
#define GEN3_DB_COUNT 32
#define GEN3_DB_LINK 32
#define GEN3_DB_LINK_BIT BIT_ULL(GEN3_DB_LINK)
#define GEN3_DB_MSIX_VECTOR_COUNT 33
#define GEN3_DB_MSIX_VECTOR_SHIFT 1
#define GEN3_DB_TOTAL_SHIFT 33
#define GEN3_SPAD_COUNT 16
static inline u64 skx_db_ioread(void __iomem *mmio)
static inline u64 gen3_db_ioread(void __iomem *mmio)
{
return ioread64(mmio);
}
static inline void skx_db_iowrite(u64 bits, void __iomem *mmio)
static inline void gen3_db_iowrite(u64 bits, void __iomem *mmio)
{
iowrite64(bits, mmio);
}
ssize_t ndev_ntb3_debugfs_read(struct file *filp, char __user *ubuf,
size_t count, loff_t *offp);
int skx_init_dev(struct intel_ntb_dev *ndev);
int skx_poll_link(struct intel_ntb_dev *ndev);
int gen3_init_dev(struct intel_ntb_dev *ndev);
extern const struct ntb_dev_ops intel_ntb3_ops;
......
drivers/ntb/hw/intel/ntb_hw_intel.h
View file @ 6c1e8ab2
......@@ -187,7 +187,7 @@ struct intel_ntb_dev {
#define hb_ndev(__work) container_of(__work, struct intel_ntb_dev, \
hb_timer.work)
static inline int pdev_is_xeon(struct pci_dev *pdev)
static inline int pdev_is_gen1(struct pci_dev *pdev)
{
switch (pdev->device) {
case PCI_DEVICE_ID_INTEL_NTB_SS_JSF:
......@@ -210,7 +210,7 @@ static inline int pdev_is_xeon(struct pci_dev *pdev)
return 0;
}
static inline int pdev_is_skx_xeon(struct pci_dev *pdev)
static inline int pdev_is_gen3(struct pci_dev *pdev)
{
if (pdev->device == PCI_DEVICE_ID_INTEL_NTB_B2B_SKX)
return 1;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7