Commit 6d36e8e0 authored by Thomas Petazzoni's avatar Thomas Petazzoni Committed by Arnd Bergmann

arm: mvebu: add pin muxing options for the SDIO interface on Armada XP

The SDIO interface is only available on pins MPP30/31/32/33/34/35 on
the various Armada XP variants, so we provide a pin muxing option for
this in the Armada XP .dtsi files.

Even though those muxing options are the same for MV78230, MV78260 and
MV78460, we keep them in each .dtsi file, because the number of pins,
and therefore the declaration of the pinctrl node, is different for
each SoC variant.
Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent fa1b21d1
...@@ -47,6 +47,12 @@ soc { ...@@ -47,6 +47,12 @@ soc {
pinctrl { pinctrl {
compatible = "marvell,mv78230-pinctrl"; compatible = "marvell,mv78230-pinctrl";
reg = <0xd0018000 0x38>; reg = <0xd0018000 0x38>;
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
"mpp33", "mpp34", "mpp35";
marvell,function = "sd0";
};
}; };
gpio0: gpio@d0018100 { gpio0: gpio@d0018100 {
......
...@@ -48,6 +48,12 @@ soc { ...@@ -48,6 +48,12 @@ soc {
pinctrl { pinctrl {
compatible = "marvell,mv78260-pinctrl"; compatible = "marvell,mv78260-pinctrl";
reg = <0xd0018000 0x38>; reg = <0xd0018000 0x38>;
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
"mpp33", "mpp34", "mpp35";
marvell,function = "sd0";
};
}; };
gpio0: gpio@d0018100 { gpio0: gpio@d0018100 {
......
...@@ -63,6 +63,12 @@ soc { ...@@ -63,6 +63,12 @@ soc {
pinctrl { pinctrl {
compatible = "marvell,mv78460-pinctrl"; compatible = "marvell,mv78460-pinctrl";
reg = <0xd0018000 0x38>; reg = <0xd0018000 0x38>;
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
"mpp33", "mpp34", "mpp35";
marvell,function = "sd0";
};
}; };
gpio0: gpio@d0018100 { gpio0: gpio@d0018100 {
......
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