Commit 6d40edcf authored by Jakub Kicinski's avatar Jakub Kicinski

Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue

Tony Nguyen says:

====================
1GbE Intel Wired LAN Driver Updates 2021-10-29

This series contains updates to igc driver only.

Sasha removes an unnecessary media type check, adds a new device ID, and
changes a device reset to a port reset command.
====================

Link: https://lore.kernel.org/r/20211029174101.2970935-1-anthony.l.nguyen@intel.comSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents d2692877 e377a063
...@@ -40,7 +40,7 @@ static s32 igc_reset_hw_base(struct igc_hw *hw) ...@@ -40,7 +40,7 @@ static s32 igc_reset_hw_base(struct igc_hw *hw)
ctrl = rd32(IGC_CTRL); ctrl = rd32(IGC_CTRL);
hw_dbg("Issuing a global reset to MAC\n"); hw_dbg("Issuing a global reset to MAC\n");
wr32(IGC_CTRL, ctrl | IGC_CTRL_DEV_RST); wr32(IGC_CTRL, ctrl | IGC_CTRL_RST);
ret_val = igc_get_auto_rd_done(hw); ret_val = igc_get_auto_rd_done(hw);
if (ret_val) { if (ret_val) {
...@@ -158,11 +158,6 @@ static s32 igc_init_phy_params_base(struct igc_hw *hw) ...@@ -158,11 +158,6 @@ static s32 igc_init_phy_params_base(struct igc_hw *hw)
struct igc_phy_info *phy = &hw->phy; struct igc_phy_info *phy = &hw->phy;
s32 ret_val = 0; s32 ret_val = 0;
if (hw->phy.media_type != igc_media_type_copper) {
phy->type = igc_phy_none;
goto out;
}
phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT_2500; phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT_2500;
phy->reset_delay_us = 100; phy->reset_delay_us = 100;
...@@ -207,6 +202,7 @@ static s32 igc_get_invariants_base(struct igc_hw *hw) ...@@ -207,6 +202,7 @@ static s32 igc_get_invariants_base(struct igc_hw *hw)
case IGC_DEV_ID_I225_K2: case IGC_DEV_ID_I225_K2:
case IGC_DEV_ID_I226_K: case IGC_DEV_ID_I226_K:
case IGC_DEV_ID_I225_LMVP: case IGC_DEV_ID_I225_LMVP:
case IGC_DEV_ID_I226_LMVP:
case IGC_DEV_ID_I225_IT: case IGC_DEV_ID_I225_IT:
case IGC_DEV_ID_I226_LM: case IGC_DEV_ID_I226_LM:
case IGC_DEV_ID_I226_V: case IGC_DEV_ID_I226_V:
......
...@@ -130,7 +130,7 @@ ...@@ -130,7 +130,7 @@
#define IGC_ERR_SWFW_SYNC 13 #define IGC_ERR_SWFW_SYNC 13
/* Device Control */ /* Device Control */
#define IGC_CTRL_DEV_RST 0x20000000 /* Device reset */ #define IGC_CTRL_RST 0x04000000 /* Global reset */
#define IGC_CTRL_PHY_RST 0x80000000 /* PHY Reset */ #define IGC_CTRL_PHY_RST 0x80000000 /* PHY Reset */
#define IGC_CTRL_SLU 0x00000040 /* Set link up (Force Link) */ #define IGC_CTRL_SLU 0x00000040 /* Set link up (Force Link) */
......
...@@ -24,6 +24,7 @@ ...@@ -24,6 +24,7 @@
#define IGC_DEV_ID_I225_K2 0x3101 #define IGC_DEV_ID_I225_K2 0x3101
#define IGC_DEV_ID_I226_K 0x3102 #define IGC_DEV_ID_I226_K 0x3102
#define IGC_DEV_ID_I225_LMVP 0x5502 #define IGC_DEV_ID_I225_LMVP 0x5502
#define IGC_DEV_ID_I226_LMVP 0x5503
#define IGC_DEV_ID_I225_IT 0x0D9F #define IGC_DEV_ID_I225_IT 0x0D9F
#define IGC_DEV_ID_I226_LM 0x125B #define IGC_DEV_ID_I226_LM 0x125B
#define IGC_DEV_ID_I226_V 0x125C #define IGC_DEV_ID_I226_V 0x125C
......
...@@ -56,6 +56,7 @@ static const struct pci_device_id igc_pci_tbl[] = { ...@@ -56,6 +56,7 @@ static const struct pci_device_id igc_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, IGC_DEV_ID_I225_K2), board_base }, { PCI_VDEVICE(INTEL, IGC_DEV_ID_I225_K2), board_base },
{ PCI_VDEVICE(INTEL, IGC_DEV_ID_I226_K), board_base }, { PCI_VDEVICE(INTEL, IGC_DEV_ID_I226_K), board_base },
{ PCI_VDEVICE(INTEL, IGC_DEV_ID_I225_LMVP), board_base }, { PCI_VDEVICE(INTEL, IGC_DEV_ID_I225_LMVP), board_base },
{ PCI_VDEVICE(INTEL, IGC_DEV_ID_I226_LMVP), board_base },
{ PCI_VDEVICE(INTEL, IGC_DEV_ID_I225_IT), board_base }, { PCI_VDEVICE(INTEL, IGC_DEV_ID_I225_IT), board_base },
{ PCI_VDEVICE(INTEL, IGC_DEV_ID_I226_LM), board_base }, { PCI_VDEVICE(INTEL, IGC_DEV_ID_I226_LM), board_base },
{ PCI_VDEVICE(INTEL, IGC_DEV_ID_I226_V), board_base }, { PCI_VDEVICE(INTEL, IGC_DEV_ID_I226_V), board_base },
......
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