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Commit 6d4e1ff5 authored by Stefan Riedmueller's avatar Stefan Riedmueller Committed by Shawn Guo
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ARM: dts: imx6ul: phytec: Add support for optional PEB-AV-02 LCD adapter 

The PHYTEC PEB-AV-02 adapter adds the capability to connect a parallel
LCD display to the phyBOARD-Segin full featured, either with capacitive
or resistive touch.
Signed-off-by: default avatarStefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent f4d0fea1
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Showing with 180 additions and 50 deletions
arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts
View file @ 6d4e1ff5
......@@ -9,6 +9,7 @@
#include "imx6ul-phytec-phycore-som.dtsi"
#include "imx6ul-phytec-segin.dtsi"
#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
#include "imx6ul-phytec-segin-peb-av-02.dtsi"
/ {
model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with eMMC";
......
arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-nand.dts
View file @ 6d4e1ff5
......@@ -9,6 +9,7 @@
#include "imx6ul-phytec-phycore-som.dtsi"
#include "imx6ul-phytec-segin.dtsi"
#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
#include "imx6ul-phytec-segin-peb-av-02.dtsi"
/ {
model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with NAND";
......
arch/arm/boot/dts/imx6ul-phytec-segin-peb-av-02.dtsi 0 → 100644
View file @ 6d4e1ff5
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright (C) 2016, 2020 PHYTEC Messtechnik
* Author: Christian Hemp <c.hemp@phytec.de>
* Author: Stefan Riedmueller <s.riedmueller@phytec.de>
*/
/ {
backlight_lcd: backlight-lcd {
compatible = "pwm-backlight";
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <5>;
power-supply = <&reg_backlight_en>;
pwms = <&pwm3 0 5000000>;
status = "disabled";
};
lcd_panel: lcd-panel {
compatible = "edt,etm0700g0edh6";
backlight = <&backlight_lcd>;
status = "disabled";
port {
lcd_panel_in: endpoint {
remote-endpoint = <&lcdif_parallel_out>;
};
};
};
reg_backlight_en: regulator-backlight-en {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_backlight_en>;
regulator-name = "backlight-lcd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&i2c1 {
edt_ft5406: touchscreen@38 {
compatible = "edt,edt-ft5406";
reg = <0x38>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_edt_ft5406>;
interrupt-parent = <&gpio5>;
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
wakeup-source;
status = "disabled";
};
stmpe: touchscreen@44 {
compatible = "st,stmpe811";
reg = <0x44>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_stmpe>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio5>;
status = "disabled";
stmpe_touchscreen {
compatible = "st,stmpe-ts";
st,sample-time = <4>;
st,mod-12b = <1>;
st,ref-sel = <0>;
st,adc-freq = <1>;
st,ave-ctrl = <1>;
st,touch-det-delay = <2>;
st,settling = <2>;
st,fraction-z = <7>;
st,i-drive = <1>;
touchscreen-inverted-x = <1>;
touchscreen-inverted-y = <1>;
};
};
};
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat>;
status = "disabled";
port {
lcdif_parallel_out: endpoint {
remote-endpoint = <&lcd_panel_in>;
};
};
};
&pwm3 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "disabled";
};
&iomuxc {
pinctrl_edt_ft5406: edtft5406grp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0
>;
};
pinctrl_backlight_en: bachlightengrp {
fsl,pins = <
MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b0
>;
};
pinctrl_lcdif_dat: lcdifdatgrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x59
MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x59
MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x59
MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x59
MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x59
MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x59
MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x59
MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x59
MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x59
MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x59
MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x59
MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x59
MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x59
MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x59
MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x59
MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x59
MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x59
MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x59
MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x59
MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x59
MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x59
MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x59
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO04__PWM3_OUT 0x0b0b0
>;
};
pinctrl_stmpe: stmpegrp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
>;
};
};
arch/arm/boot/dts/imx6ul-phytec-segin.dtsi
View file @ 6d4e1ff5
......@@ -130,31 +130,6 @@ tlv320: codec@18 {
status = "disabled";
};
stmpe: touchscreen@44 {
compatible = "st,stmpe811";
reg = <0x44>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_stmpe>;
status = "disabled";
stmpe_touchscreen {
compatible = "st,stmpe-ts";
st,sample-time = <4>;
st,mod-12b = <1>;
st,ref-sel = <0>;
st,adc-freq = <1>;
st,ave-ctrl = <1>;
st,touch-det-delay = <2>;
st,settling = <2>;
st,fraction-z = <7>;
st,i-drive = <1>;
touchscreen-inverted-x = <1>;
touchscreen-inverted-y = <1>;
};
};
i2c_rtc: rtc@68 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc_int>;
......@@ -176,12 +151,6 @@ ethphy2: ethernet-phy@2 {
};
};
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "disabled";
};
&sai2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2>;
......@@ -267,12 +236,6 @@ MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO04__PWM3_OUT 0x0b0b0
>;
};
pinctrl_rtc_int: rtcintgrp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
......@@ -289,12 +252,6 @@ MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088
>;
};
pinctrl_stmpe: stmpegrp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
>;
};
pinctrl_uart5: uart5grp {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1
......
arch/arm/boot/dts/imx6ull-phytec-segin-ff-rdk-emmc.dts
View file @ 6d4e1ff5
......@@ -9,6 +9,7 @@
#include "imx6ull-phytec-phycore-som.dtsi"
#include "imx6ull-phytec-segin.dtsi"
#include "imx6ull-phytec-segin-peb-eval-01.dtsi"
#include "imx6ull-phytec-segin-peb-av-02.dtsi"
/ {
model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with eMMC";
......
arch/arm/boot/dts/imx6ull-phytec-segin-ff-rdk-nand.dts
View file @ 6d4e1ff5
......@@ -9,6 +9,7 @@
#include "imx6ull-phytec-phycore-som.dtsi"
#include "imx6ull-phytec-segin.dtsi"
#include "imx6ull-phytec-segin-peb-eval-01.dtsi"
#include "imx6ull-phytec-segin-peb-av-02.dtsi"
/ {
model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with NAND";
......
arch/arm/boot/dts/imx6ull-phytec-segin-peb-av-02.dtsi 0 → 100644
View file @ 6d4e1ff5
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright (C) 2018 PHYTEC Messtechnik GmbH
* Author: Stefan Riedmueller <s.riedmueller@phytec.de>
*/
#include "imx6ul-phytec-segin-peb-av-02.dtsi"
&iomuxc {
/delete-node/ edtft5406grp;
/delete-node/ stmpegrp;
};
&iomuxc_snvs {
pinctrl_edt_ft5406: edtft5406grp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0
>;
};
pinctrl_stmpe: stmpegrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
>;
};
};
arch/arm/boot/dts/imx6ull-phytec-segin.dtsi
View file @ 6d4e1ff5
......@@ -14,7 +14,6 @@ / {
&iomuxc {
/delete-node/ flexcan1engrp;
/delete-node/ rtcintgrp;
/delete-node/ stmpegrp;
};
&iomuxc_snvs {
......@@ -29,10 +28,4 @@ pinctrl_rtc_int: rtcintgrp {
MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
>;
};
pinctrl_stmpe: stmpegrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
>;
};
};
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