Commit 6dc669a2 authored by Jacob Siverskog's avatar Jacob Siverskog Committed by Stephen Boyd

clk: si5351: Add PLL soft reset

This is according to figure 12 ("I2C Programming Procedure") in
"Si5351A/B/C Data Sheet"
(https://www.silabs.com/Support%20Documents/TechnicalDocs/Si5351-B.pdf).

Without the PLL soft reset, we were unable to get three outputs
working at the same time.

According to Silicon Labs support, performing PLL soft reset will only
be noticeable if the PLL parameters have been changed.
Signed-off-by: default avatarJacob Siverskog <jacob@teenage.engineering>
Signed-off-by: default avatarJens Rudberg <jens@teenage.engineering>
Acked-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent c1de1357
...@@ -1091,6 +1091,13 @@ static int si5351_clkout_set_rate(struct clk_hw *hw, unsigned long rate, ...@@ -1091,6 +1091,13 @@ static int si5351_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
si5351_set_bits(hwdata->drvdata, SI5351_CLK0_CTRL + hwdata->num, si5351_set_bits(hwdata->drvdata, SI5351_CLK0_CTRL + hwdata->num,
SI5351_CLK_POWERDOWN, 0); SI5351_CLK_POWERDOWN, 0);
/*
* Do a pll soft reset on both plls, needed in some cases to get
* all outputs running.
*/
si5351_reg_write(hwdata->drvdata, SI5351_PLL_RESET,
SI5351_PLL_RESET_A | SI5351_PLL_RESET_B);
dev_dbg(&hwdata->drvdata->client->dev, dev_dbg(&hwdata->drvdata->client->dev,
"%s - %s: rdiv = %u, parent_rate = %lu, rate = %lu\n", "%s - %s: rdiv = %u, parent_rate = %lu, rate = %lu\n",
__func__, clk_hw_get_name(hw), (1 << rdiv), __func__, clk_hw_get_name(hw), (1 << rdiv),
......
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