Commit 6e93d0c9 authored by Shannon Nelson's avatar Shannon Nelson Committed by Jeff Kirsher

i40e: better error reporting for nvmupdate

Make sure we return EBUSY while finishing up a reset, and add a few bits
for better debug messages.

Change-ID: I23f6c28a8d96d7aa171abcc265737cec7826c292
Signed-off-by: default avatarShannon Nelson <shannon.nelson@intel.com>
Tested-by: default avatarAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 0d790327
...@@ -1005,16 +1005,19 @@ static int i40e_get_eeprom(struct net_device *netdev, ...@@ -1005,16 +1005,19 @@ static int i40e_get_eeprom(struct net_device *netdev,
/* check for NVMUpdate access method */ /* check for NVMUpdate access method */
magic = hw->vendor_id | (hw->device_id << 16); magic = hw->vendor_id | (hw->device_id << 16);
if (eeprom->magic && eeprom->magic != magic) { if (eeprom->magic && eeprom->magic != magic) {
struct i40e_nvm_access *cmd; struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
int errno; int errno = 0;
/* make sure it is the right magic for NVMUpdate */ /* make sure it is the right magic for NVMUpdate */
if ((eeprom->magic >> 16) != hw->device_id) if ((eeprom->magic >> 16) != hw->device_id)
return -EINVAL; errno = -EINVAL;
else if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) ||
test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state))
errno = -EBUSY;
else
ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
cmd = (struct i40e_nvm_access *)eeprom; if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
if (ret_val && (hw->debug_mask & I40E_DEBUG_NVM))
dev_info(&pf->pdev->dev, dev_info(&pf->pdev->dev,
"NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
ret_val, hw->aq.asq_last_status, errno, ret_val, hw->aq.asq_last_status, errno,
...@@ -1098,27 +1101,25 @@ static int i40e_set_eeprom(struct net_device *netdev, ...@@ -1098,27 +1101,25 @@ static int i40e_set_eeprom(struct net_device *netdev,
struct i40e_netdev_priv *np = netdev_priv(netdev); struct i40e_netdev_priv *np = netdev_priv(netdev);
struct i40e_hw *hw = &np->vsi->back->hw; struct i40e_hw *hw = &np->vsi->back->hw;
struct i40e_pf *pf = np->vsi->back; struct i40e_pf *pf = np->vsi->back;
struct i40e_nvm_access *cmd; struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
int ret_val = 0; int ret_val = 0;
int errno; int errno = 0;
u32 magic; u32 magic;
/* normal ethtool set_eeprom is not supported */ /* normal ethtool set_eeprom is not supported */
magic = hw->vendor_id | (hw->device_id << 16); magic = hw->vendor_id | (hw->device_id << 16);
if (eeprom->magic == magic) if (eeprom->magic == magic)
return -EOPNOTSUPP; errno = -EOPNOTSUPP;
/* check for NVMUpdate access method */ /* check for NVMUpdate access method */
if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
return -EINVAL; errno = -EINVAL;
else if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) ||
if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) || test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state))
test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) errno = -EBUSY;
return -EBUSY; else
ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
cmd = (struct i40e_nvm_access *)eeprom; if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
if (ret_val && (hw->debug_mask & I40E_DEBUG_NVM))
dev_info(&pf->pdev->dev, dev_info(&pf->pdev->dev,
"NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
ret_val, hw->aq.asq_last_status, errno, ret_val, hw->aq.asq_last_status, errno,
......
...@@ -3475,6 +3475,7 @@ static irqreturn_t i40e_intr(int irq, void *data) ...@@ -3475,6 +3475,7 @@ static irqreturn_t i40e_intr(int irq, void *data)
if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK; ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
} }
if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
...@@ -6332,7 +6333,9 @@ static void i40e_clean_adminq_subtask(struct i40e_pf *pf) ...@@ -6332,7 +6333,9 @@ static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
case i40e_aqc_opc_nvm_erase: case i40e_aqc_opc_nvm_erase:
case i40e_aqc_opc_nvm_update: case i40e_aqc_opc_nvm_update:
case i40e_aqc_opc_oem_post_update: case i40e_aqc_opc_oem_post_update:
i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n"); i40e_debug(&pf->hw, I40E_DEBUG_NVM,
"ARQ NVM operation 0x%04x completed\n",
opcode);
break; break;
default: default:
dev_info(&pf->pdev->dev, dev_info(&pf->pdev->dev,
......
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