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Kirill Smelkov
linux
Commits
6eb37eb2
Commit
6eb37eb2
authored
Jan 21, 2014
by
Lee Jones
Browse files
Options
Browse Files
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Plain Diff
Merge tag 'tags/ib-asoc-1' into for-mfd-next
Immutable branch for ASoC, as requested by Mark Brown
parents
ac99a037
254dc326
Changes
5
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5 changed files
with
136 additions
and
4 deletions
+136
-4
drivers/mfd/wm5110-tables.c
drivers/mfd/wm5110-tables.c
+69
-4
include/linux/mfd/arizona/registers.h
include/linux/mfd/arizona/registers.h
+37
-0
sound/soc/codecs/arizona.c
sound/soc/codecs/arizona.c
+10
-0
sound/soc/codecs/arizona.h
sound/soc/codecs/arizona.h
+1
-0
sound/soc/codecs/wm5110.c
sound/soc/codecs/wm5110.c
+19
-0
No files found.
drivers/mfd/wm5110-tables.c
View file @
6eb37eb2
...
@@ -14,6 +14,7 @@
...
@@ -14,6 +14,7 @@
#include <linux/mfd/arizona/core.h>
#include <linux/mfd/arizona/core.h>
#include <linux/mfd/arizona/registers.h>
#include <linux/mfd/arizona/registers.h>
#include <linux/device.h>
#include "arizona.h"
#include "arizona.h"
...
@@ -524,6 +525,7 @@ static const struct reg_default wm5110_reg_default[] = {
...
@@ -524,6 +525,7 @@ static const struct reg_default wm5110_reg_default[] = {
{
0x00000300
,
0x0000
},
/* R768 - Input Enables */
{
0x00000300
,
0x0000
},
/* R768 - Input Enables */
{
0x00000308
,
0x0000
},
/* R776 - Input Rate */
{
0x00000308
,
0x0000
},
/* R776 - Input Rate */
{
0x00000309
,
0x0022
},
/* R777 - Input Volume Ramp */
{
0x00000309
,
0x0022
},
/* R777 - Input Volume Ramp */
{
0x0000030C
,
0x0002
},
/* R780 - HPF Control */
{
0x00000310
,
0x2080
},
/* R784 - IN1L Control */
{
0x00000310
,
0x2080
},
/* R784 - IN1L Control */
{
0x00000311
,
0x0180
},
/* R785 - ADC Digital Volume 1L */
{
0x00000311
,
0x0180
},
/* R785 - ADC Digital Volume 1L */
{
0x00000312
,
0x0000
},
/* R786 - DMIC1L Control */
{
0x00000312
,
0x0000
},
/* R786 - DMIC1L Control */
...
@@ -545,6 +547,7 @@ static const struct reg_default wm5110_reg_default[] = {
...
@@ -545,6 +547,7 @@ static const struct reg_default wm5110_reg_default[] = {
{
0x00000328
,
0x2000
},
/* R808 - IN4L Control */
{
0x00000328
,
0x2000
},
/* R808 - IN4L Control */
{
0x00000329
,
0x0180
},
/* R809 - ADC Digital Volume 4L */
{
0x00000329
,
0x0180
},
/* R809 - ADC Digital Volume 4L */
{
0x0000032A
,
0x0000
},
/* R810 - DMIC4L Control */
{
0x0000032A
,
0x0000
},
/* R810 - DMIC4L Control */
{
0x0000032C
,
0x0000
},
/* R812 - IN4R Control */
{
0x0000032D
,
0x0180
},
/* R813 - ADC Digital Volume 4R */
{
0x0000032D
,
0x0180
},
/* R813 - ADC Digital Volume 4R */
{
0x0000032E
,
0x0000
},
/* R814 - DMIC4R Control */
{
0x0000032E
,
0x0000
},
/* R814 - DMIC4R Control */
{
0x00000400
,
0x0000
},
/* R1024 - Output Enables 1 */
{
0x00000400
,
0x0000
},
/* R1024 - Output Enables 1 */
...
@@ -1342,6 +1345,64 @@ static const struct reg_default wm5110_reg_default[] = {
...
@@ -1342,6 +1345,64 @@ static const struct reg_default wm5110_reg_default[] = {
{
0x00001404
,
0x0000
},
/* R5124 - DSP4 Status 1 */
{
0x00001404
,
0x0000
},
/* R5124 - DSP4 Status 1 */
};
};
static
bool
wm5110_is_rev_b_adsp_memory
(
unsigned
int
reg
)
{
if
((
reg
>=
0x100000
&&
reg
<
0x103000
)
||
(
reg
>=
0x180000
&&
reg
<
0x181000
)
||
(
reg
>=
0x190000
&&
reg
<
0x192000
)
||
(
reg
>=
0x1a8000
&&
reg
<
0x1a9000
)
||
(
reg
>=
0x200000
&&
reg
<
0x209000
)
||
(
reg
>=
0x280000
&&
reg
<
0x281000
)
||
(
reg
>=
0x290000
&&
reg
<
0x29a000
)
||
(
reg
>=
0x2a8000
&&
reg
<
0x2aa000
)
||
(
reg
>=
0x300000
&&
reg
<
0x30f000
)
||
(
reg
>=
0x380000
&&
reg
<
0x382000
)
||
(
reg
>=
0x390000
&&
reg
<
0x39e000
)
||
(
reg
>=
0x3a8000
&&
reg
<
0x3b6000
)
||
(
reg
>=
0x400000
&&
reg
<
0x403000
)
||
(
reg
>=
0x480000
&&
reg
<
0x481000
)
||
(
reg
>=
0x490000
&&
reg
<
0x492000
)
||
(
reg
>=
0x4a8000
&&
reg
<
0x4a9000
))
return
true
;
else
return
false
;
}
static
bool
wm5110_is_rev_d_adsp_memory
(
unsigned
int
reg
)
{
if
((
reg
>=
0x100000
&&
reg
<
0x106000
)
||
(
reg
>=
0x180000
&&
reg
<
0x182000
)
||
(
reg
>=
0x190000
&&
reg
<
0x198000
)
||
(
reg
>=
0x1a8000
&&
reg
<
0x1aa000
)
||
(
reg
>=
0x200000
&&
reg
<
0x20f000
)
||
(
reg
>=
0x280000
&&
reg
<
0x282000
)
||
(
reg
>=
0x290000
&&
reg
<
0x29c000
)
||
(
reg
>=
0x2a6000
&&
reg
<
0x2b4000
)
||
(
reg
>=
0x300000
&&
reg
<
0x30f000
)
||
(
reg
>=
0x380000
&&
reg
<
0x382000
)
||
(
reg
>=
0x390000
&&
reg
<
0x3a2000
)
||
(
reg
>=
0x3a6000
&&
reg
<
0x3b4000
)
||
(
reg
>=
0x400000
&&
reg
<
0x406000
)
||
(
reg
>=
0x480000
&&
reg
<
0x482000
)
||
(
reg
>=
0x490000
&&
reg
<
0x498000
)
||
(
reg
>=
0x4a8000
&&
reg
<
0x4aa000
))
return
true
;
else
return
false
;
}
static
bool
wm5110_is_adsp_memory
(
struct
device
*
dev
,
unsigned
int
reg
)
{
struct
arizona
*
arizona
=
dev_get_drvdata
(
dev
);
switch
(
arizona
->
rev
)
{
case
0
...
2
:
return
wm5110_is_rev_b_adsp_memory
(
reg
);
default:
return
wm5110_is_rev_d_adsp_memory
(
reg
);
}
}
static
bool
wm5110_readable_register
(
struct
device
*
dev
,
unsigned
int
reg
)
static
bool
wm5110_readable_register
(
struct
device
*
dev
,
unsigned
int
reg
)
{
{
switch
(
reg
)
{
switch
(
reg
)
{
...
@@ -1460,6 +1521,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
...
@@ -1460,6 +1521,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
case
ARIZONA_INPUT_ENABLES_STATUS
:
case
ARIZONA_INPUT_ENABLES_STATUS
:
case
ARIZONA_INPUT_RATE
:
case
ARIZONA_INPUT_RATE
:
case
ARIZONA_INPUT_VOLUME_RAMP
:
case
ARIZONA_INPUT_VOLUME_RAMP
:
case
ARIZONA_HPF_CONTROL
:
case
ARIZONA_IN1L_CONTROL
:
case
ARIZONA_IN1L_CONTROL
:
case
ARIZONA_ADC_DIGITAL_VOLUME_1L
:
case
ARIZONA_ADC_DIGITAL_VOLUME_1L
:
case
ARIZONA_DMIC1L_CONTROL
:
case
ARIZONA_DMIC1L_CONTROL
:
...
@@ -1481,6 +1543,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
...
@@ -1481,6 +1543,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
case
ARIZONA_IN4L_CONTROL
:
case
ARIZONA_IN4L_CONTROL
:
case
ARIZONA_ADC_DIGITAL_VOLUME_4L
:
case
ARIZONA_ADC_DIGITAL_VOLUME_4L
:
case
ARIZONA_DMIC4L_CONTROL
:
case
ARIZONA_DMIC4L_CONTROL
:
case
ARIZONA_IN4R_CONTROL
:
case
ARIZONA_ADC_DIGITAL_VOLUME_4R
:
case
ARIZONA_ADC_DIGITAL_VOLUME_4R
:
case
ARIZONA_DMIC4R_CONTROL
:
case
ARIZONA_DMIC4R_CONTROL
:
case
ARIZONA_OUTPUT_ENABLES_1
:
case
ARIZONA_OUTPUT_ENABLES_1
:
...
@@ -2331,7 +2394,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
...
@@ -2331,7 +2394,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
case
ARIZONA_DSP4_SCRATCH_3
:
case
ARIZONA_DSP4_SCRATCH_3
:
return
true
;
return
true
;
default:
default:
return
false
;
return
wm5110_is_adsp_memory
(
dev
,
reg
)
;
}
}
}
}
...
@@ -2407,16 +2470,18 @@ static bool wm5110_volatile_register(struct device *dev, unsigned int reg)
...
@@ -2407,16 +2470,18 @@ static bool wm5110_volatile_register(struct device *dev, unsigned int reg)
case
ARIZONA_DSP4_SCRATCH_3
:
case
ARIZONA_DSP4_SCRATCH_3
:
return
true
;
return
true
;
default:
default:
return
false
;
return
wm5110_is_adsp_memory
(
dev
,
reg
)
;
}
}
}
}
#define WM5110_MAX_REGISTER 0x4a9fff
const
struct
regmap_config
wm5110_spi_regmap
=
{
const
struct
regmap_config
wm5110_spi_regmap
=
{
.
reg_bits
=
32
,
.
reg_bits
=
32
,
.
pad_bits
=
16
,
.
pad_bits
=
16
,
.
val_bits
=
16
,
.
val_bits
=
16
,
.
max_register
=
ARIZONA_DSP1_STATUS_2
,
.
max_register
=
WM5110_MAX_REGISTER
,
.
readable_reg
=
wm5110_readable_register
,
.
readable_reg
=
wm5110_readable_register
,
.
volatile_reg
=
wm5110_volatile_register
,
.
volatile_reg
=
wm5110_volatile_register
,
...
@@ -2430,7 +2495,7 @@ const struct regmap_config wm5110_i2c_regmap = {
...
@@ -2430,7 +2495,7 @@ const struct regmap_config wm5110_i2c_regmap = {
.
reg_bits
=
32
,
.
reg_bits
=
32
,
.
val_bits
=
16
,
.
val_bits
=
16
,
.
max_register
=
ARIZONA_DSP1_STATUS_2
,
.
max_register
=
WM5110_MAX_REGISTER
,
.
readable_reg
=
wm5110_readable_register
,
.
readable_reg
=
wm5110_readable_register
,
.
volatile_reg
=
wm5110_volatile_register
,
.
volatile_reg
=
wm5110_volatile_register
,
...
...
include/linux/mfd/arizona/registers.h
View file @
6eb37eb2
...
@@ -139,6 +139,7 @@
...
@@ -139,6 +139,7 @@
#define ARIZONA_INPUT_ENABLES_STATUS 0x301
#define ARIZONA_INPUT_ENABLES_STATUS 0x301
#define ARIZONA_INPUT_RATE 0x308
#define ARIZONA_INPUT_RATE 0x308
#define ARIZONA_INPUT_VOLUME_RAMP 0x309
#define ARIZONA_INPUT_VOLUME_RAMP 0x309
#define ARIZONA_HPF_CONTROL 0x30C
#define ARIZONA_IN1L_CONTROL 0x310
#define ARIZONA_IN1L_CONTROL 0x310
#define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311
#define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311
#define ARIZONA_DMIC1L_CONTROL 0x312
#define ARIZONA_DMIC1L_CONTROL 0x312
...
@@ -160,6 +161,7 @@
...
@@ -160,6 +161,7 @@
#define ARIZONA_IN4L_CONTROL 0x328
#define ARIZONA_IN4L_CONTROL 0x328
#define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329
#define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329
#define ARIZONA_DMIC4L_CONTROL 0x32A
#define ARIZONA_DMIC4L_CONTROL 0x32A
#define ARIZONA_IN4R_CONTROL 0x32C
#define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D
#define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D
#define ARIZONA_DMIC4R_CONTROL 0x32E
#define ARIZONA_DMIC4R_CONTROL 0x32E
#define ARIZONA_OUTPUT_ENABLES_1 0x400
#define ARIZONA_OUTPUT_ENABLES_1 0x400
...
@@ -2292,9 +2294,19 @@
...
@@ -2292,9 +2294,19 @@
#define ARIZONA_IN_VI_RAMP_SHIFT 0
/* IN_VI_RAMP - [2:0] */
#define ARIZONA_IN_VI_RAMP_SHIFT 0
/* IN_VI_RAMP - [2:0] */
#define ARIZONA_IN_VI_RAMP_WIDTH 3
/* IN_VI_RAMP - [2:0] */
#define ARIZONA_IN_VI_RAMP_WIDTH 3
/* IN_VI_RAMP - [2:0] */
/*
* R780 (0x30C) - HPF Control
*/
#define ARIZONA_IN_HPF_CUT_MASK 0x0007
/* IN_HPF_CUT [2:0] */
#define ARIZONA_IN_HPF_CUT_SHIFT 0
/* IN_HPF_CUT [2:0] */
#define ARIZONA_IN_HPF_CUT_WIDTH 3
/* IN_HPF_CUT [2:0] */
/*
/*
* R784 (0x310) - IN1L Control
* R784 (0x310) - IN1L Control
*/
*/
#define ARIZONA_IN1L_HPF_MASK 0x8000
/* IN1L_HPF - [15] */
#define ARIZONA_IN1L_HPF_SHIFT 15
/* IN1L_HPF - [15] */
#define ARIZONA_IN1L_HPF_WIDTH 1
/* IN1L_HPF - [15] */
#define ARIZONA_IN1_OSR_MASK 0x6000
/* IN1_OSR - [14:13] */
#define ARIZONA_IN1_OSR_MASK 0x6000
/* IN1_OSR - [14:13] */
#define ARIZONA_IN1_OSR_SHIFT 13
/* IN1_OSR - [14:13] */
#define ARIZONA_IN1_OSR_SHIFT 13
/* IN1_OSR - [14:13] */
#define ARIZONA_IN1_OSR_WIDTH 2
/* IN1_OSR - [14:13] */
#define ARIZONA_IN1_OSR_WIDTH 2
/* IN1_OSR - [14:13] */
...
@@ -2333,6 +2345,9 @@
...
@@ -2333,6 +2345,9 @@
/*
/*
* R788 (0x314) - IN1R Control
* R788 (0x314) - IN1R Control
*/
*/
#define ARIZONA_IN1R_HPF_MASK 0x8000
/* IN1R_HPF - [15] */
#define ARIZONA_IN1R_HPF_SHIFT 15
/* IN1R_HPF - [15] */
#define ARIZONA_IN1R_HPF_WIDTH 1
/* IN1R_HPF - [15] */
#define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE
/* IN1R_PGA_VOL - [7:1] */
#define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE
/* IN1R_PGA_VOL - [7:1] */
#define ARIZONA_IN1R_PGA_VOL_SHIFT 1
/* IN1R_PGA_VOL - [7:1] */
#define ARIZONA_IN1R_PGA_VOL_SHIFT 1
/* IN1R_PGA_VOL - [7:1] */
#define ARIZONA_IN1R_PGA_VOL_WIDTH 7
/* IN1R_PGA_VOL - [7:1] */
#define ARIZONA_IN1R_PGA_VOL_WIDTH 7
/* IN1R_PGA_VOL - [7:1] */
...
@@ -2362,6 +2377,9 @@
...
@@ -2362,6 +2377,9 @@
/*
/*
* R792 (0x318) - IN2L Control
* R792 (0x318) - IN2L Control
*/
*/
#define ARIZONA_IN2L_HPF_MASK 0x8000
/* IN2L_HPF - [15] */
#define ARIZONA_IN2L_HPF_SHIFT 15
/* IN2L_HPF - [15] */
#define ARIZONA_IN2L_HPF_WIDTH 1
/* IN2L_HPF - [15] */
#define ARIZONA_IN2_OSR_MASK 0x6000
/* IN2_OSR - [14:13] */
#define ARIZONA_IN2_OSR_MASK 0x6000
/* IN2_OSR - [14:13] */
#define ARIZONA_IN2_OSR_SHIFT 13
/* IN2_OSR - [14:13] */
#define ARIZONA_IN2_OSR_SHIFT 13
/* IN2_OSR - [14:13] */
#define ARIZONA_IN2_OSR_WIDTH 2
/* IN2_OSR - [14:13] */
#define ARIZONA_IN2_OSR_WIDTH 2
/* IN2_OSR - [14:13] */
...
@@ -2400,6 +2418,9 @@
...
@@ -2400,6 +2418,9 @@
/*
/*
* R796 (0x31C) - IN2R Control
* R796 (0x31C) - IN2R Control
*/
*/
#define ARIZONA_IN2R_HPF_MASK 0x8000
/* IN2R_HPF - [15] */
#define ARIZONA_IN2R_HPF_SHIFT 15
/* IN2R_HPF - [15] */
#define ARIZONA_IN2R_HPF_WIDTH 1
/* IN2R_HPF - [15] */
#define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE
/* IN2R_PGA_VOL - [7:1] */
#define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE
/* IN2R_PGA_VOL - [7:1] */
#define ARIZONA_IN2R_PGA_VOL_SHIFT 1
/* IN2R_PGA_VOL - [7:1] */
#define ARIZONA_IN2R_PGA_VOL_SHIFT 1
/* IN2R_PGA_VOL - [7:1] */
#define ARIZONA_IN2R_PGA_VOL_WIDTH 7
/* IN2R_PGA_VOL - [7:1] */
#define ARIZONA_IN2R_PGA_VOL_WIDTH 7
/* IN2R_PGA_VOL - [7:1] */
...
@@ -2429,6 +2450,9 @@
...
@@ -2429,6 +2450,9 @@
/*
/*
* R800 (0x320) - IN3L Control
* R800 (0x320) - IN3L Control
*/
*/
#define ARIZONA_IN3L_HPF_MASK 0x8000
/* IN3L_HPF - [15] */
#define ARIZONA_IN3L_HPF_SHIFT 15
/* IN3L_HPF - [15] */
#define ARIZONA_IN3L_HPF_WIDTH 1
/* IN3L_HPF - [15] */
#define ARIZONA_IN3_OSR_MASK 0x6000
/* IN3_OSR - [14:13] */
#define ARIZONA_IN3_OSR_MASK 0x6000
/* IN3_OSR - [14:13] */
#define ARIZONA_IN3_OSR_SHIFT 13
/* IN3_OSR - [14:13] */
#define ARIZONA_IN3_OSR_SHIFT 13
/* IN3_OSR - [14:13] */
#define ARIZONA_IN3_OSR_WIDTH 2
/* IN3_OSR - [14:13] */
#define ARIZONA_IN3_OSR_WIDTH 2
/* IN3_OSR - [14:13] */
...
@@ -2467,6 +2491,9 @@
...
@@ -2467,6 +2491,9 @@
/*
/*
* R804 (0x324) - IN3R Control
* R804 (0x324) - IN3R Control
*/
*/
#define ARIZONA_IN3R_HPF_MASK 0x8000
/* IN3R_HPF - [15] */
#define ARIZONA_IN3R_HPF_SHIFT 15
/* IN3R_HPF - [15] */
#define ARIZONA_IN3R_HPF_WIDTH 1
/* IN3R_HPF - [15] */
#define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE
/* IN3R_PGA_VOL - [7:1] */
#define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE
/* IN3R_PGA_VOL - [7:1] */
#define ARIZONA_IN3R_PGA_VOL_SHIFT 1
/* IN3R_PGA_VOL - [7:1] */
#define ARIZONA_IN3R_PGA_VOL_SHIFT 1
/* IN3R_PGA_VOL - [7:1] */
#define ARIZONA_IN3R_PGA_VOL_WIDTH 7
/* IN3R_PGA_VOL - [7:1] */
#define ARIZONA_IN3R_PGA_VOL_WIDTH 7
/* IN3R_PGA_VOL - [7:1] */
...
@@ -2496,6 +2523,9 @@
...
@@ -2496,6 +2523,9 @@
/*
/*
* R808 (0x328) - IN4 Control
* R808 (0x328) - IN4 Control
*/
*/
#define ARIZONA_IN4L_HPF_MASK 0x8000
/* IN4L_HPF - [15] */
#define ARIZONA_IN4L_HPF_SHIFT 15
/* IN4L_HPF - [15] */
#define ARIZONA_IN4L_HPF_WIDTH 1
/* IN4L_HPF - [15] */
#define ARIZONA_IN4_OSR_MASK 0x6000
/* IN4_OSR - [14:13] */
#define ARIZONA_IN4_OSR_MASK 0x6000
/* IN4_OSR - [14:13] */
#define ARIZONA_IN4_OSR_SHIFT 13
/* IN4_OSR - [14:13] */
#define ARIZONA_IN4_OSR_SHIFT 13
/* IN4_OSR - [14:13] */
#define ARIZONA_IN4_OSR_WIDTH 2
/* IN4_OSR - [14:13] */
#define ARIZONA_IN4_OSR_WIDTH 2
/* IN4_OSR - [14:13] */
...
@@ -2525,6 +2555,13 @@
...
@@ -2525,6 +2555,13 @@
#define ARIZONA_IN4L_DMIC_DLY_SHIFT 0
/* IN4L_DMIC_DLY - [5:0] */
#define ARIZONA_IN4L_DMIC_DLY_SHIFT 0
/* IN4L_DMIC_DLY - [5:0] */
#define ARIZONA_IN4L_DMIC_DLY_WIDTH 6
/* IN4L_DMIC_DLY - [5:0] */
#define ARIZONA_IN4L_DMIC_DLY_WIDTH 6
/* IN4L_DMIC_DLY - [5:0] */
/*
* R812 (0x32C) - IN4R Control
*/
#define ARIZONA_IN4R_HPF_MASK 0x8000
/* IN4R_HPF - [15] */
#define ARIZONA_IN4R_HPF_SHIFT 15
/* IN4R_HPF - [15] */
#define ARIZONA_IN4R_HPF_WIDTH 1
/* IN4R_HPF - [15] */
/*
/*
* R813 (0x32D) - ADC Digital Volume 4R
* R813 (0x32D) - ADC Digital Volume 4R
*/
*/
...
...
sound/soc/codecs/arizona.c
View file @
6eb37eb2
...
@@ -560,6 +560,16 @@ const struct soc_enum arizona_ng_hold =
...
@@ -560,6 +560,16 @@ const struct soc_enum arizona_ng_hold =
4
,
arizona_ng_hold_text
);
4
,
arizona_ng_hold_text
);
EXPORT_SYMBOL_GPL
(
arizona_ng_hold
);
EXPORT_SYMBOL_GPL
(
arizona_ng_hold
);
static
const
char
*
const
arizona_in_hpf_cut_text
[]
=
{
"2.5Hz"
,
"5Hz"
,
"10Hz"
,
"20Hz"
,
"40Hz"
};
const
struct
soc_enum
arizona_in_hpf_cut_enum
=
SOC_ENUM_SINGLE
(
ARIZONA_HPF_CONTROL
,
ARIZONA_IN_HPF_CUT_SHIFT
,
ARRAY_SIZE
(
arizona_in_hpf_cut_text
),
arizona_in_hpf_cut_text
);
EXPORT_SYMBOL_GPL
(
arizona_in_hpf_cut_enum
);
static
const
char
*
const
arizona_in_dmic_osr_text
[]
=
{
static
const
char
*
const
arizona_in_dmic_osr_text
[]
=
{
"1.536MHz"
,
"3.072MHz"
,
"6.144MHz"
,
"1.536MHz"
,
"3.072MHz"
,
"6.144MHz"
,
};
};
...
...
sound/soc/codecs/arizona.h
View file @
6eb37eb2
...
@@ -199,6 +199,7 @@ extern const struct soc_enum arizona_lhpf3_mode;
...
@@ -199,6 +199,7 @@ extern const struct soc_enum arizona_lhpf3_mode;
extern
const
struct
soc_enum
arizona_lhpf4_mode
;
extern
const
struct
soc_enum
arizona_lhpf4_mode
;
extern
const
struct
soc_enum
arizona_ng_hold
;
extern
const
struct
soc_enum
arizona_ng_hold
;
extern
const
struct
soc_enum
arizona_in_hpf_cut_enum
;
extern
const
struct
soc_enum
arizona_in_dmic_osr
[];
extern
const
struct
soc_enum
arizona_in_dmic_osr
[];
extern
int
arizona_in_ev
(
struct
snd_soc_dapm_widget
*
w
,
extern
int
arizona_in_ev
(
struct
snd_soc_dapm_widget
*
w
,
...
...
sound/soc/codecs/wm5110.c
View file @
6eb37eb2
...
@@ -117,6 +117,25 @@ SOC_SINGLE_RANGE_TLV("IN3L Volume", ARIZONA_IN3L_CONTROL,
...
@@ -117,6 +117,25 @@ SOC_SINGLE_RANGE_TLV("IN3L Volume", ARIZONA_IN3L_CONTROL,
SOC_SINGLE_RANGE_TLV
(
"IN3R Volume"
,
ARIZONA_IN3R_CONTROL
,
SOC_SINGLE_RANGE_TLV
(
"IN3R Volume"
,
ARIZONA_IN3R_CONTROL
,
ARIZONA_IN3R_PGA_VOL_SHIFT
,
0x40
,
0x5f
,
0
,
ana_tlv
),
ARIZONA_IN3R_PGA_VOL_SHIFT
,
0x40
,
0x5f
,
0
,
ana_tlv
),
SOC_ENUM
(
"IN HPF Cutoff Frequency"
,
arizona_in_hpf_cut_enum
),
SOC_SINGLE
(
"IN1L HPF Switch"
,
ARIZONA_IN1L_CONTROL
,
ARIZONA_IN1L_HPF_SHIFT
,
1
,
0
),
SOC_SINGLE
(
"IN1R HPF Switch"
,
ARIZONA_IN1R_CONTROL
,
ARIZONA_IN1R_HPF_SHIFT
,
1
,
0
),
SOC_SINGLE
(
"IN2L HPF Switch"
,
ARIZONA_IN2L_CONTROL
,
ARIZONA_IN2L_HPF_SHIFT
,
1
,
0
),
SOC_SINGLE
(
"IN2R HPF Switch"
,
ARIZONA_IN2R_CONTROL
,
ARIZONA_IN2R_HPF_SHIFT
,
1
,
0
),
SOC_SINGLE
(
"IN3L HPF Switch"
,
ARIZONA_IN3L_CONTROL
,
ARIZONA_IN3L_HPF_SHIFT
,
1
,
0
),
SOC_SINGLE
(
"IN3R HPF Switch"
,
ARIZONA_IN3R_CONTROL
,
ARIZONA_IN3R_HPF_SHIFT
,
1
,
0
),
SOC_SINGLE
(
"IN4L HPF Switch"
,
ARIZONA_IN4L_CONTROL
,
ARIZONA_IN4L_HPF_SHIFT
,
1
,
0
),
SOC_SINGLE
(
"IN4R HPF Switch"
,
ARIZONA_IN4R_CONTROL
,
ARIZONA_IN4R_HPF_SHIFT
,
1
,
0
),
SOC_SINGLE_TLV
(
"IN1L Digital Volume"
,
ARIZONA_ADC_DIGITAL_VOLUME_1L
,
SOC_SINGLE_TLV
(
"IN1L Digital Volume"
,
ARIZONA_ADC_DIGITAL_VOLUME_1L
,
ARIZONA_IN1L_DIG_VOL_SHIFT
,
0xbf
,
0
,
digital_tlv
),
ARIZONA_IN1L_DIG_VOL_SHIFT
,
0xbf
,
0
,
digital_tlv
),
SOC_SINGLE_TLV
(
"IN1R Digital Volume"
,
ARIZONA_ADC_DIGITAL_VOLUME_1R
,
SOC_SINGLE_TLV
(
"IN1R Digital Volume"
,
ARIZONA_ADC_DIGITAL_VOLUME_1R
,
...
...
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