Commit 6f231dda authored by Dan Williams's avatar Dan Williams

isci: Intel(R) C600 Series Chipset Storage Control Unit Driver

Support for the up to 2x4-port 6Gb/s SAS controllers embedded in the
chipset.

This is a snapshot of the first publicly available version of the driver,
commit 4c1db2d0 in the 'historical' branch.

   git://git.kernel.org/pub/scm/linux/kernel/git/djbw/isci.git historical
Signed-off-by: default avatarMaciej Trela <maciej.trela@intel.com>
Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
Signed-off-by: default avatarEdmund Nadolski <edmund.nadolski@intel.com>
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent 59c5f46f
......@@ -830,6 +830,40 @@ config SCSI_GDTH
To compile this driver as a module, choose M here: the
module will be called gdth.
config SCSI_ISCI
tristate "Intel(R) C600 Series Chipset SAS Controller"
depends on PCI && SCSI
# little endian host assumptions
depends on X86
# (temporary): dma api misuse
depends on !DMAR
# (temporary): known alpha quality driver
depends on EXPERIMENTAL
select SCSI_SAS_LIBSAS
---help---
This driver supports the 6Gb/s SAS capabilities of the storage
control unit found in the Intel(R) C600 series chipset.
The experimental tag will be removed after the driver exits alpha
choice
prompt "Default Silicon Revision"
depends on SCSI_ISCI
default PBG_HBA_A2
# temporary A-step silicon is pre-production
config PBG_HBA_BETA
bool "B0"
config PBG_HBA_A2
bool "A2"
config PBG_HBA_A0
bool "A0"
endchoice
config SCSI_GENERIC_NCR5380
tristate "Generic NCR5380/53c400 SCSI PIO support"
depends on ISA && SCSI
......
......@@ -73,6 +73,7 @@ obj-$(CONFIG_SCSI_AACRAID) += aacraid/
obj-$(CONFIG_SCSI_AIC7XXX_OLD) += aic7xxx_old.o
obj-$(CONFIG_SCSI_AIC94XX) += aic94xx/
obj-$(CONFIG_SCSI_PM8001) += pm8001/
obj-$(CONFIG_SCSI_ISCI) += isci/
obj-$(CONFIG_SCSI_IPS) += ips.o
obj-$(CONFIG_SCSI_FD_MCS) += fd_mcs.o
obj-$(CONFIG_SCSI_FUTURE_DOMAIN)+= fdomain.o
......
#TODO kill SCIC_SDS_4_ENABLED it is always true for this
#generation of silicon
EXTRA_CFLAGS += -DSCIC_SDS_4_ENABLED
#temporary until atapi support ready
EXTRA_CFLAGS += -DDISABLE_ATAPI
EXTRA_CFLAGS += -Idrivers/scsi/isci/core/ -Idrivers/scsi/isci/
obj-$(CONFIG_SCSI_ISCI) += isci.o
isci-objs := init.o phy.o request.o sata.o \
remote_device.o port.o timers.o deprecated.o \
host.o task.o events.o \
core/scic_sds_controller.o \
core/scic_sds_remote_device.o \
core/scic_sds_request.o \
core/scic_sds_stp_request.o \
core/scic_sds_stp_packet_request.o \
core/scic_sds_stp_remote_device.o \
core/scic_sds_port.o \
core/scic_sds_port_configuration_agent.o \
core/scic_sds_phy.o \
core/scic_sds_ssp_request.o \
core/scic_sds_remote_node_context.o \
core/scic_sds_smp_request.o \
core/scic_sds_smp_remote_device.o \
core/scic_sds_remote_node_table.o \
core/scic_sds_unsolicited_frame_control.o \
core/sci_base_memory_descriptor_list.o \
core/sci_base_state_machine.o \
core/sci_util.o
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/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SAT_H_
#define _SAT_H_
/**
* This file contains constants and constructs defined in the SCSI to ATA
* Translation (SAT) T10 standard. For more information please refer to
* www.t10.org.
*
*
*/
/**
*
*
* SAT_PROTOCOLS These constants indicate the various protocol values that can
* be supported in a SAT translator.
*/
#define SAT_PROTOCOL_ATA_HARD_RESET 0
#define SAT_PROTOCOL_SOFT_RESET 1
#define SAT_PROTOCOL_NON_DATA 3
#define SAT_PROTOCOL_PIO_DATA_IN 4
#define SAT_PROTOCOL_PIO_DATA_OUT 5
#define SAT_PROTOCOL_DMA 6
#define SAT_PROTOCOL_DMA_QUEUED 7
#define SAT_PROTOCOL_DEVICE_DIAGNOSTIC 8
#define SAT_PROTOCOL_DEVICE_RESET 9
#define SAT_PROTOCOL_UDMA_DATA_IN 10
#define SAT_PROTOCOL_UDMA_DATA_OUT 11
#define SAT_PROTOCOL_FPDMA 12
#define SAT_PROTOCOL_RETURN_RESPONSE_INFO 15
#define SAT_PROTOCOL_PACKET 0x10
#define SAT_PROTOCOL_PACKET_NON_DATA (SAT_PROTOCOL_PACKET | 0x0)
#define SAT_PROTOCOL_PACKET_DMA_DATA_IN (SAT_PROTOCOL_PACKET | 0x1)
#define SAT_PROTOCOL_PACKET_DMA_DATA_OUT (SAT_PROTOCOL_PACKET | 0x2)
#define SAT_PROTOCOL_PACKET_PIO_DATA_IN (SAT_PROTOCOL_PACKET | 0x3)
#define SAT_PROTOCOL_PACKET_PIO_DATA_OUT (SAT_PROTOCOL_PACKET | 0x4)
#endif /* _SAT_H_ */
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SATA_H_
#define _SATA_H_
#include <linux/types.h>
/**
* This file defines all of the SATA releated constants, enumerations, and
* types. Please note that this file does not necessarily contain an
* exhaustive list of all contants and commands.
*
*
*/
/**
*
*
* SATA FIS Types These constants depict the various SATA FIS types devined in
* the serial ATA specification.
*/
#define SATA_FIS_TYPE_REGH2D 0x27
#define SATA_FIS_TYPE_REGD2H 0x34
#define SATA_FIS_TYPE_SETDEVBITS 0xA1
#define SATA_FIS_TYPE_DMA_ACTIVATE 0x39
#define SATA_FIS_TYPE_DMA_SETUP 0x41
#define SATA_FIS_TYPE_BIST_ACTIVATE 0x58
#define SATA_FIS_TYPE_PIO_SETUP 0x5F
#define SATA_FIS_TYPE_DATA 0x46
#define SATA_REGISTER_FIS_SIZE 0x20
/**
* struct sata_fis_header - This is the common definition for a SATA FIS Header
* word. A different header word is defined for any FIS type that does not
* use the standard header.
*
*
*/
struct sata_fis_header {
u32 fis_type:8; /* word 0 */
u32 pm_port:4;
u32 reserved:1;
u32 direction_flag:1; /* direction */
u32 interrupt_flag:1;
u32 command_flag:1; /* command, auto_activate, or notification */
u32 status:8;
u32 error:8;
};
/**
* struct sata_fis_reg_h2d - This is the definition for a SATA Host to Device
* Register FIS.
*
*
*/
struct sata_fis_reg_h2d {
u32 fis_type:8; /* word 0 */
u32 pm_port:4;
u32 reserved0:3;
u32 command_flag:1;
u32 command:8;
u32 features:8;
u32 lba_low:8; /* word 1 */
u32 lba_mid:8;
u32 lba_high:8;
u32 device:8;
u32 lba_low_exp:8; /* word 2 */
u32 lba_mid_exp:8;
u32 lba_high_exp:8;
u32 features_exp:8;
u32 sector_count:8; /* word 3 */
u32 sector_count_exp:8;
u32 reserved1:8;
u32 control:8;
u32 reserved2; /* word 4 */
};
/**
* struct sata_fis_reg_d2h - SATA Device To Host FIS
*
*
*/
struct sata_fis_reg_d2h {
u32 fis_type:8; /* word 0 */
u32 pm_port:4;
u32 reserved0:2;
u32 irq:1;
u32 reserved1:1;
u32 status:8;
u32 error:8;
u8 lba_low; /* word 1 */
u8 lba_mid;
u8 lba_high;
u8 device;
u8 lba_low_exp; /* word 2 */
u8 lba_mid_exp;
u8 lba_high_exp;
u8 reserved;
u8 sector_count; /* word 3 */
u8 sector_count_exp;
u16 reserved2;
u32 reserved3;
};
/**
*
*
* Status field bit definitions
*/
#define SATA_FIS_STATUS_DEVBITS_MASK (0x77)
/**
* struct sata_fis_set_dev_bits - SATA Set Device Bits FIS
*
*
*/
struct sata_fis_set_dev_bits {
u32 fis_type:8; /* word 0 */
u32 pm_port:4;
u32 reserved0:2;
u32 irq:1;
u32 notification:1;
u32 status_low:4;
u32 status_high:4;
u32 error:8;
u32 s_active; /* word 1 */
};
/**
* struct sata_fis_dma_activate - SATA DMA Activate FIS
*
*
*/
struct sata_fis_dma_activate {
u32 fis_type:8; /* word 0 */
u32 pm_port:4;
u32 reserved0:24;
};
/**
*
*
* The lower 5 bits in the DMA Buffer ID Low field of the DMA Setup are used to
* communicate the command tag.
*/
#define SATA_DMA_SETUP_TAG_ENABLE 0x1F
#define SATA_DMA_SETUP_AUTO_ACT_ENABLE 0x80
/**
* struct sata_fis_dma_setup - SATA DMA Setup FIS
*
*
*/
struct sata_fis_dma_setup {
u32 fis_type:8; /* word 0 */
u32 pm_port:4;
u32 reserved_00:1;
u32 direction:1;
u32 irq:1;
u32 auto_activate:1;
u32 reserved_01:16;
u32 dma_buffer_id_low; /* word 1 */
u32 dma_buffer_id_high; /* word 2 */
u32 reserved0; /* word 3 */
u32 dma_buffer_offset; /* word 4 */
u32 dma_transfer_count; /* word 5 */
u32 reserved1; /* word 6 */
};
/**
* struct sata_fis_bist_activate - SATA BIST Activate FIS
*
*
*/
struct sata_fis_bist_activate {
u32 fis_type:8; /* word 0 */
u32 reserved0:8;
u32 pattern_definition:8;
u32 reserved1:8;
u32 data1; /* word 1 */
u32 data2; /* word 1 */
};
/*
* SATA PIO Setup FIS
*/
struct sata_fis_pio_setup {
u32 fis_type:8; /* word 0 */
u32 pm_port:4;
u32 reserved_00:1;
u32 direction:1;
u32 irq:1;
u32 reserved_01:1;
u32 status:8;
u32 error:8;
u32 lba_low:8; /* word 1 */
u32 lba_mid:8;
u32 lba_high:8;
u32 device:8;
u32 lba_low_exp:8; /* word 2 */
u32 lba_mid_exp:8;
u32 lba_high_exp:8;
u32 reserved:8;
u32 sector_count:8; /* word 3 */
u32 sector_count_exp:8;
u32 reserved1:8;
u32 ending_status:8;
u32 transfter_count:16; /* word 4 */
u32 reserved3:16;
};
/**
* struct sata_fis_data - SATA Data FIS
*
*
*/
struct sata_fis_data {
u32 fis_type:8; /* word 0 */
u32 pm_port:4;
u32 reserved0:24;
u8 data[4]; /* word 1 */
};
#endif /* _SATA_H_ */
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/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SATI_DEVICE_H_
#define _SATI_DEVICE_H_
/**
* This file contains all of the defintions for the SATI remote device object.
* Some translations require information to be remembered on a per device
* basis. This information is stored in the object defined in this file.
*
*
*/
#include "sati_types.h"
#include "intel_ata.h"
/**
* enum _SATI_DEVICE_STATE - This enumeration depicts the various states
* possible for the a translation remote device object.
*
*
*/
enum sati_device_state {
SATI_DEVICE_STATE_OPERATIONAL,
SATI_DEVICE_STATE_STOPPED,
SATI_DEVICE_STATE_STANDBY,
SATI_DEVICE_STATE_IDLE,
SATI_DEVICE_STATE_DEVICE_FAULT_OCCURRED,
SATI_DEVICE_STATE_FORMAT_UNIT_IN_PROGRESS,
SATI_DEVICE_STATE_SELF_TEST_IN_PROGRESS,
SATI_DEVICE_STATE_SEQUENCE_INCOMPLETE,
SATI_DEVICE_STATE_UNIT_ATTENTION_CONDITION
};
/**
*
*
* SATI_DEVICE_CAPABILITIES These constants define the various capabilities
* that a remote device may support for which there is an impact on translation.
*/
#define SATI_DEVICE_CAP_UDMA_ENABLE 0x00000001
#define SATI_DEVICE_CAP_NCQ_REQUESTED_ENABLE 0x00000002
#define SATI_DEVICE_CAP_NCQ_SUPPORTED_ENABLE 0x00000004
#define SATI_DEVICE_CAP_48BIT_ENABLE 0x00000008
#define SATI_DEVICE_CAP_DMA_FUA_ENABLE 0x00000010
#define SATI_DEVICE_CAP_SMART_SUPPORT 0x00000020
#define SATI_DEVICE_CAP_REMOVABLE_MEDIA 0x00000040
#define SATI_DEVICE_CAP_SMART_ENABLE 0x00000080
#define SATI_DEVICE_CAP_WRITE_UNCORRECTABLE_ENABLE 0x00000100
#define SATI_DEVICE_CAP_MULTIPLE_SECTORS_PER_PHYSCIAL_SECTOR 0x00000200
#define SATI_DEVICE_CAP_SMART_SELF_TEST_SUPPORT 0x00000400
/**
* struct sati_device - The SATI_DEVICE structure define the state of the
* remote device with respect to translation.
*
*
*/
struct sati_device {
/**
* This field simply dictates the state of the SATI device.
*/
enum sati_device_state state;
/**
* This field indicates features supported by the remote device that
* impact translation execution.
*/
u16 capabilities;
/**
* This field indicates the depth of the native command queue supported
* by the device.
*/
u8 ncq_depth;
/**
* This field stores the additional sense code for a unit attention
* condition.
*/
u8 unit_attention_asc;
/**
* This field indicates the additional sense code qualifier for a unit
* attention condition.
*/
u8 unit_attention_ascq;
};
void sati_device_construct(
struct sati_device *device,
bool is_ncq_enabled,
u8 max_ncq_depth);
void sati_device_update_capabilities(
struct sati_device *device,
struct ata_identify_device_data *identify);
#endif /* _SATI_TRANSLATOR_SEQUENCE_H_ */
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SATI_TRANSLATOR_SEQUENCE_H_
#define _SATI_TRANSLATOR_SEQUENCE_H_
/**
* This file contains all of the defintions for the SATI translator sequence.
* A translator sequence is simply a defintion for the various sequences of
* commands that occur in this translator.
*
*
*/
#include "sati_device.h"
/**
* enum _SATI_TRANSLATOR_SEQUENCE_TYPE - This enumeration defines the possible
* sequence types for the translator.
*
*
*/
enum sati_translator_sequence_type {
/* SCSI Primary Command (SPC) sequences. */
SATI_SEQUENCE_REPORT_LUNS,
SATI_SEQUENCE_TEST_UNIT_READY,
SATI_SEQUENCE_INQUIRY_STANDARD,
SATI_SEQUENCE_INQUIRY_SUPPORTED_PAGES,
SATI_SEQUENCE_INQUIRY_SERIAL_NUMBER,
SATI_SEQUENCE_INQUIRY_DEVICE_ID,
SATI_SEQUENCE_INQUIRY_BLOCK_DEVICE,
SATI_SEQUENCE_MODE_SENSE_6_CACHING,
SATI_SEQUENCE_MODE_SENSE_6_INFORMATIONAL_EXCP_CONTROL,
SATI_SEQUENCE_MODE_SENSE_6_READ_WRITE_ERROR,
SATI_SEQUENCE_MODE_SENSE_6_DISCONNECT_RECONNECT,
SATI_SEQUENCE_MODE_SENSE_6_CONTROL,
SATI_SEQUENCE_MODE_SENSE_6_ALL_PAGES,
SATI_SEQUENCE_MODE_SENSE_10_CACHING,
SATI_SEQUENCE_MODE_SENSE_10_INFORMATIONAL_EXCP_CONTROL,
SATI_SEQUENCE_MODE_SENSE_10_READ_WRITE_ERROR,
SATI_SEQUENCE_MODE_SENSE_10_DISCONNECT_RECONNECT,
SATI_SEQUENCE_MODE_SENSE_10_CONTROL,
SATI_SEQUENCE_MODE_SENSE_10_ALL_PAGES,
SATI_SEQUENCE_MODE_SELECT_MODE_PAGE_CACHING,
SATI_SEQUENCE_MODE_SELECT_MODE_POWER_CONDITION,
SATI_SEQUENCE_MODE_SELECT_MODE_INFORMATION_EXCEPT_CONTROL,
/* Log Sense Sequences */
SATI_SEQUENCE_LOG_SENSE_SELF_TEST_LOG_PAGE,
SATI_SEQUENCE_LOG_SENSE_EXTENDED_SELF_TEST_LOG_PAGE,
SATI_SEQUENCE_LOG_SENSE_SUPPORTED_LOG_PAGE,
SATI_SEQUENCE_LOG_SENSE_INFO_EXCEPTION_LOG_PAGE,
/* SCSI Block Command (SBC) sequences. */
SATI_SEQUENCE_READ_6,
SATI_SEQUENCE_READ_10,
SATI_SEQUENCE_READ_12,
SATI_SEQUENCE_READ_16,
SATI_SEQUENCE_READ_CAPACITY_10,
SATI_SEQUENCE_READ_CAPACITY_16,
SATI_SEQUENCE_SYNCHRONIZE_CACHE,
SATI_SEQUENCE_VERIFY_10,
SATI_SEQUENCE_VERIFY_12,
SATI_SEQUENCE_VERIFY_16,
SATI_SEQUENCE_WRITE_6,
SATI_SEQUENCE_WRITE_10,
SATI_SEQUENCE_WRITE_12,
SATI_SEQUENCE_WRITE_16,
SATI_SEQUENCE_START_STOP_UNIT,
SATI_SEQUENCE_REASSIGN_BLOCKS,
/* SCSI Task Requests sequences */
SATI_SEQUENCE_LUN_RESET,
SATI_SEQUENCE_REQUEST_SENSE_SMART_RETURN_STATUS,
SATI_SEQUENCE_REQUEST_SENSE_CHECK_POWER_MODE,
SATI_SEQUENCE_WRITE_LONG
};
#define SATI_SEQUENCE_TYPE_READ_MIN SATI_SEQUENCE_READ_6
#define SATI_SEQUENCE_TYPE_READ_MAX SATI_SEQUENCE_READ_16
/**
*
*
* SATI_SEQUENCE_STATES These constants depict the various state values
* associated with a translation sequence.
*/
#define SATI_SEQUENCE_STATE_INITIAL 0
#define SATI_SEQUENCE_STATE_TRANSLATE_DATA 1
#define SATI_SEQUENCE_STATE_AWAIT_RESPONSE 2
#define SATI_SEQUENCE_STATE_FINAL 3
#define SATI_SEQUENCE_STATE_INCOMPLETE 4
/**
*
*
* SATI_DATA_DIRECTIONS These constants depict the various types of data
* directions for a translation sequence. Data can flow in/out (read/write) or
* no data at all.
*/
#define SATI_DATA_DIRECTION_NONE 0
#define SATI_DATA_DIRECTION_IN 1
#define SATI_DATA_DIRECTION_OUT 2
/**
* struct SATI_MODE_SELECT_PROCESSING_STATE - This structure contains all of
* the current processing states for processing mode select 6 and 10
* commands' parameter fields.
*
*
*/
typedef struct SATI_MODE_SELECT_PROCESSING_STATE {
u8 *mode_pages;
u32 mode_page_offset;
u32 mode_pages_size;
u32 size_of_data_processed;
u32 total_ata_command_sent;
u32 ata_command_sent_for_cmp; /* cmp: current mode page */
bool current_mode_page_processed;
} SATI_MODE_SELECT_PROCESSING_STATE_T;
enum SATI_REASSIGN_BLOCKS_ATA_COMMAND_STATUS {
SATI_REASSIGN_BLOCKS_READY_TO_SEND,
SATI_REASSIGN_BLOCKS_COMMAND_FAIL,
SATI_REASSIGN_BLOCKS_COMMAND_SUCCESS,
};
/**
* struct sati_reassign_blocks_processing_state - This structure contains all
* of the current processing states for processing reassign block command's
* parameter fields.
*
*
*/
struct sati_reassign_blocks_processing_state {
u32 lba_offset;
u32 block_lists_size;
u8 lba_size;
u32 size_of_data_processed;
u32 ata_command_sent_for_current_lba;
bool current_lba_processed;
enum SATI_REASSIGN_BLOCKS_ATA_COMMAND_STATUS ata_command_status;
};
#define SATI_ATAPI_REQUEST_SENSE_CDB_LENGTH 12
/**
* struct sati_atapi_data - The SATI_ATAPI_DATA structure is for sati atapi IO
* specific data.
*
*
*/
struct sati_atapi_data {
u8 request_sense_cdb[SATI_ATAPI_REQUEST_SENSE_CDB_LENGTH];
};
/**
* struct sati_translator_sequence - This structure contains all of the
* translation information associated with a particular request.
*
*
*/
struct sati_translator_sequence {
/**
* This field contains the sequence type determined by the SATI.
*/
u8 type;
/**
* This field indicates the current state for the sequence.
*/
u8 state;
/**
* This field indicates the data direction (none, read, or write) for
* the translated request.
*/
u8 data_direction;
/**
* This field contains the SATA/ATA protocol to be utilized during
* the IO transfer.
*/
u8 protocol;
/**
* This field is utilized for sequences requiring data translation.
* It specifies the amount of data requested by the caller from the
* operation. It's necessary, because at times the user requests less
* data than is available. Thus, we need to avoid overrunning the
* buffer.
*/
u32 allocation_length;
/**
* This field specifies the amount of data that will actually be
* transfered across the wire for this ATA request.
*/
u32 ata_transfer_length;
/**
* This field specifies the amount of data bytes that have been
* set in a translation sequence. It will be incremented every time
* a data byte has been set by a sati translation.
*/
u16 number_data_bytes_set;
/**
* This field indicates whether or not the sense response has been set
* by the translation sequence.
*/
bool is_sense_response_set;
/**
* This field specifies the remote device context for which this
* translator sequence is destined.
*/
struct sati_device *device;
/**
* This field is utilized to provide the translator with memory space
* required for translations that utilize multiple requests.
*/
union {
u32 translated_command;
u32 move_sector_count;
u32 scratch;
struct sati_reassign_blocks_processing_state reassign_blocks_process_state;
SATI_MODE_SELECT_PROCESSING_STATE_T process_state;
struct sati_atapi_data sati_atapi_data;
} command_specific_data;
};
#endif /* _SATI_TRANSLATOR_SEQUENCE_H_ */
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SATI_TYPES_H_
#define _SATI_TYPES_H_
/**
* This file contains various type definitions to be utilized with SCSI to ATA
* Translation Implementation.
*
*
*/
/**
* enum _SATI_STATUS - This enumeration defines the possible return values from
* the SATI translation methods.
*
*
*/
enum sati_status {
/**
* This indicates that the translation was supported and occurred
* without error.
*/
SATI_SUCCESS,
/**
* This indicates that the translation was supported, occurred without
* error, and no additional translation is necessary. This is done in
* conditions where the SCSI command doesn't require any interaction with
* the remote device.
*/
SATI_COMPLETE,
/**
* This indicated everything SATI_COMPLETE does in addition to the response data
* not using all the memory allocated by the OS.
*/
SATI_COMPLETE_IO_DONE_EARLY,
/**
* This indicates that translator sequence has finished some specific
* command in the sequence, but additional commands are necessary.
*/
SATI_SEQUENCE_INCOMPLETE,
/**
* This indicates a general failure has occurred for which no further
* specification information is available.
*/
SATI_FAILURE,
/**
* This indicates that the result of the IO request indicates a
* failure. The caller should reference the corresponding response
* data for further details.
*/
SATI_FAILURE_CHECK_RESPONSE_DATA,
/**
* This status indicates that the supplied sequence type doesn't map
* to an existing definition.
*/
SATI_FAILURE_INVALID_SEQUENCE_TYPE,
/**
* This status indicates that the supplied sequence state doesn't match
* the operation being requested by the user.
*/
SATI_FAILURE_INVALID_STATE
};
#if (!defined(DISABLE_SATI_MODE_SENSE) \
|| !defined(DISABLE_SATI_MODE_SELECT) \
|| !defined(DISABLE_SATI_REQUEST_SENSE)) \
#if !defined(ENABLE_SATI_MODE_PAGES)
/**
*
*
* This macro enables the common mode page data structures and code. Currently,
* MODE SENSE, MODE SELECT, and REQUEST SENSE all make reference to this common
* code. As a result, enable the common mode page code if any of these 3 are
* being translated.
*/
#define ENABLE_SATI_MODE_PAGES
#endif /* !defined(ENABLE_SATI_MODE_PAGES) */
#endif /* MODE_SENSE/SELECT/REQUEST_SENSE */
#endif /* _SATI_TYPES_H_ */
This diff is collapsed.
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* This file contains the base implementation for the memory descriptor list.
* This is currently comprised of MDL iterator methods.
*
*
*/
#include "sci_environment.h"
#include "sci_base_memory_descriptor_list.h"
/*
* ******************************************************************************
* * P U B L I C M E T H O D S
* ****************************************************************************** */
void sci_mdl_first_entry(
struct sci_base_memory_descriptor_list *base_mdl)
{
base_mdl->next_index = 0;
/*
* If this MDL is managing another MDL, then recursively rewind that MDL
* object as well. */
if (base_mdl->next_mdl != SCI_INVALID_HANDLE)
sci_mdl_first_entry(base_mdl->next_mdl);
}
void sci_mdl_next_entry(
struct sci_base_memory_descriptor_list *base_mdl)
{
/*
* If there is at least one more entry left in the array, then change
* the next pointer to it. */
if (base_mdl->next_index < base_mdl->length)
base_mdl->next_index++;
else if (base_mdl->next_index == base_mdl->length) {
/*
* This MDL has exhausted it's set of entries. If this MDL is managing
* another MDL, then start iterating through that MDL. */
if (base_mdl->next_mdl != SCI_INVALID_HANDLE)
sci_mdl_next_entry(base_mdl->next_mdl);
}
}
struct sci_physical_memory_descriptor *sci_mdl_get_current_entry(
struct sci_base_memory_descriptor_list *base_mdl)
{
if (base_mdl->next_index < base_mdl->length)
return &base_mdl->mde_array[base_mdl->next_index];
else if (base_mdl->next_index == base_mdl->length) {
/*
* This MDL has exhausted it's set of entries. If this MDL is managing
* another MDL, then return it's current entry. */
if (base_mdl->next_mdl != SCI_INVALID_HANDLE)
return sci_mdl_get_current_entry(base_mdl->next_mdl);
}
return NULL;
}
/*
* ******************************************************************************
* * P R O T E C T E D M E T H O D S
* ****************************************************************************** */
void sci_base_mdl_construct(
struct sci_base_memory_descriptor_list *mdl,
struct sci_physical_memory_descriptor *mde_array,
u32 mde_array_length,
struct sci_base_memory_descriptor_list *next_mdl)
{
mdl->length = mde_array_length;
mdl->mde_array = mde_array;
mdl->next_index = 0;
mdl->next_mdl = next_mdl;
}
/* --------------------------------------------------------------------------- */
bool sci_base_mde_is_valid(
struct sci_physical_memory_descriptor *mde,
u32 alignment,
u32 size,
u16 attributes)
{
/* Only need the lower 32 bits to ensure alignment is met. */
u32 physical_address = lower_32_bits(mde->physical_address);
if (
((((unsigned long)mde->virtual_address) & (alignment - 1)) != 0)
|| ((physical_address & (alignment - 1)) != 0)
|| (mde->constant_memory_alignment != alignment)
|| (mde->constant_memory_size != size)
|| (mde->virtual_address == NULL)
|| (mde->constant_memory_attributes != attributes)
) {
return false;
}
return true;
}
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SCI_BASE_MEMORY_DESCRIPTOR_LIST_H_
#define _SCI_BASE_MEMORY_DESCRIPTOR_LIST_H_
/**
* This file contains the protected interface structures, constants and
* interface methods for the struct sci_base_memory_descriptor_list object.
*
*
*/
#include "sci_types.h"
#include "sci_memory_descriptor_list.h"
/**
* struct sci_base_memory_descriptor_list - This structure contains all of the
* fields necessary to implement a simple stack for managing the list of
* available controller indices.
*
*
*/
struct sci_base_memory_descriptor_list {
/**
* This field indicates the length of the memory descriptor entry array.
*/
u32 length;
/**
* This field is utilized to provide iterator pattern functionality.
* It indicates the index of the next memory descriptor in the iteration.
*/
u32 next_index;
/**
* This field will point to the list of memory descriptors.
*/
struct sci_physical_memory_descriptor *mde_array;
/**
* This field simply allows a user to chain memory descriptor lists
* together if desired. This field will be initialized to
* SCI_INVALID_HANDLE.
*/
struct sci_base_memory_descriptor_list *next_mdl;
};
/**
* sci_base_mdl_construct() - This method is invoked to construct an memory
* descriptor list. It initializes the fields of the MDL.
* @mdl: This parameter specifies the memory descriptor list to be constructed.
* @mde_array: This parameter specifies the array of memory descriptor entries
* to be managed by this list.
* @mde_array_length: This parameter specifies the size of the array of entries.
* @next_mdl: This parameter specifies a subsequent MDL object to be managed by
* this MDL object.
*
* none.
*/
void sci_base_mdl_construct(
struct sci_base_memory_descriptor_list *mdl,
struct sci_physical_memory_descriptor *mde_array,
u32 mde_array_length,
struct sci_base_memory_descriptor_list *next_mdl);
/**
* sci_base_mde_construct() -
*
* This macro constructs an memory descriptor entry with the given alignment
* and size
*/
#define sci_base_mde_construct(mde, alignment, size, attributes) \
{ \
(mde)->constant_memory_alignment = (alignment); \
(mde)->constant_memory_size = (size); \
(mde)->constant_memory_attributes = (attributes); \
}
/**
* sci_base_mde_is_valid() - This method validates that the memory descriptor
* is correctly filled out by the SCI User
* @mde: This parameter is the mde entry to validate
* @alignment: This parameter specifies the expected alignment of the memory
* for the mde.
* @size: This parameter specifies the memory size expected for the mde its
* value should not have been changed by the SCI User.
* @attributes: This parameter specifies the attributes for the memory
* descriptor provided.
*
* bool This method returns an indication as to whether the supplied MDE is
* valid or not. true The MDE is valid. false The MDE is not valid.
*/
bool sci_base_mde_is_valid(
struct sci_physical_memory_descriptor *mde,
u32 alignment,
u32 size,
u16 attributes);
#endif /* _SCI_BASE_MEMORY_DESCRIPTOR_LIST_H_ */
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SCI_BASE_PHY_H_
#define _SCI_BASE_PHY_H_
/**
* This file contains all of the structures, constants, and methods common to
* all phy object definitions.
*
*
*/
#include "sci_base_state_machine.h"
/**
* enum sci_base_phy_states - This enumeration depicts the standard states
* common to all phy state machine implementations.
*
*
*/
enum sci_base_phy_states {
/**
* Simply the initial state for the base domain state machine.
*/
SCI_BASE_PHY_STATE_INITIAL,
/**
* This state indicates that the phy has successfully been stopped.
* In this state no new IO operations are permitted on this phy.
* This state is entered from the INITIAL state.
* This state is entered from the STARTING state.
* This state is entered from the READY state.
* This state is entered from the RESETTING state.
*/
SCI_BASE_PHY_STATE_STOPPED,
/**
* This state indicates that the phy is in the process of becomming
* ready. In this state no new IO operations are permitted on this phy.
* This state is entered from the STOPPED state.
* This state is entered from the READY state.
* This state is entered from the RESETTING state.
*/
SCI_BASE_PHY_STATE_STARTING,
/**
* This state indicates the the phy is now ready. Thus, the user
* is able to perform IO operations utilizing this phy as long as it
* is currently part of a valid port.
* This state is entered from the STARTING state.
*/
SCI_BASE_PHY_STATE_READY,
/**
* This state indicates that the phy is in the process of being reset.
* In this state no new IO operations are permitted on this phy.
* This state is entered from the READY state.
*/
SCI_BASE_PHY_STATE_RESETTING,
/**
* Simply the final state for the base phy state machine.
*/
SCI_BASE_PHY_STATE_FINAL,
SCI_BASE_PHY_MAX_STATES
};
/**
* struct sci_base_phy - This structure defines all of the fields common to PHY
* objects.
*
*
*/
struct sci_base_phy {
/**
* This field depicts the parent object (struct sci_base_object) for the phy.
*/
struct sci_base_object parent;
/**
* This field contains the information for the base phy state machine.
*/
struct sci_base_state_machine state_machine;
};
typedef enum sci_status (*SCI_BASE_PHY_HANDLER_T)(
struct sci_base_phy *
);
/**
* struct sci_base_phy_state_handler - This structure contains all of the state
* handler methods common to base phy state machines. Handler methods
* provide the ability to change the behavior for user requests or
* transitions depending on the state the machine is in.
*
*
*/
struct sci_base_phy_state_handler {
/**
* The start_handler specifies the method invoked when there is an
* attempt to start a phy.
*/
SCI_BASE_PHY_HANDLER_T start_handler;
/**
* The stop_handler specifies the method invoked when there is an
* attempt to stop a phy.
*/
SCI_BASE_PHY_HANDLER_T stop_handler;
/**
* The reset_handler specifies the method invoked when there is an
* attempt to reset a phy.
*/
SCI_BASE_PHY_HANDLER_T reset_handler;
/**
* The destruct_handler specifies the method invoked when attempting to
* destruct a phy.
*/
SCI_BASE_PHY_HANDLER_T destruct_handler;
};
/**
* sci_base_phy_construct() - Construct the base phy
* @this_phy: This parameter specifies the base phy to be constructed.
* @state_table: This parameter specifies the table of state definitions to be
* utilized for the phy state machine.
*
*/
static inline void sci_base_phy_construct(
struct sci_base_phy *base_phy,
const struct sci_base_state *state_table)
{
base_phy->parent.private = NULL;
sci_base_state_machine_construct(
&base_phy->state_machine,
&base_phy->parent,
state_table,
SCI_BASE_PHY_STATE_INITIAL
);
sci_base_state_machine_start(
&base_phy->state_machine
);
}
#endif /* _SCI_BASE_PHY_H_ */
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SCI_BASE_PORT_H_
#define _SCI_BASE_PORT_H_
#include "sci_base_state_machine.h"
#include "sci_object.h"
/**
* enum sci_base_port_states - This enumeration depicts all the states for the
* common port state machine.
*
*
*/
enum sci_base_port_states {
/**
* This state indicates that the port has successfully been stopped.
* In this state no new IO operations are permitted.
* This state is entered from the STOPPING state.
*/
SCI_BASE_PORT_STATE_STOPPED,
/**
* This state indicates that the port is in the process of stopping.
* In this state no new IO operations are permitted, but existing IO
* operations are allowed to complete.
* This state is entered from the READY state.
*/
SCI_BASE_PORT_STATE_STOPPING,
/**
* This state indicates the port is now ready. Thus, the user is
* able to perform IO operations on this port.
* This state is entered from the STARTING state.
*/
SCI_BASE_PORT_STATE_READY,
/**
* This state indicates the port is in the process of performing a hard
* reset. Thus, the user is unable to perform IO operations on this
* port.
* This state is entered from the READY state.
*/
SCI_BASE_PORT_STATE_RESETTING,
/**
* This state indicates the port has failed a reset request. This state
* is entered when a port reset request times out.
* This state is entered from the RESETTING state.
*/
SCI_BASE_PORT_STATE_FAILED,
SCI_BASE_PORT_MAX_STATES
};
/**
* struct sci_base_port - The base port object abstracts the fields common to
* all SCI port objects.
*
*
*/
struct sci_base_port {
/**
* The field specifies that the parent object for the base controller
* is the base object itself.
*/
struct sci_base_object parent;
/**
* This field contains the information for the base port state machine.
*/
struct sci_base_state_machine state_machine;
};
struct sci_base_phy;
typedef enum sci_status (*SCI_BASE_PORT_HANDLER_T)(
struct sci_base_port *
);
typedef enum sci_status (*SCI_BASE_PORT_PHY_HANDLER_T)(
struct sci_base_port *,
struct sci_base_phy *
);
typedef enum sci_status (*SCI_BASE_PORT_RESET_HANDLER_T)(
struct sci_base_port *,
u32 timeout
);
/**
* struct sci_base_port_state_handler - This structure contains all of the
* state handler methods common to base port state machines. Handler
* methods provide the ability to change the behavior for user requests or
* transitions depending on the state the machine is in.
*
*
*/
struct sci_base_port_state_handler {
/**
* The start_handler specifies the method invoked when a user attempts to
* start a port.
*/
SCI_BASE_PORT_HANDLER_T start_handler;
/**
* The stop_handler specifies the method invoked when a user attempts to
* stop a port.
*/
SCI_BASE_PORT_HANDLER_T stop_handler;
/**
* The destruct_handler specifies the method invoked when attempting to
* destruct a port.
*/
SCI_BASE_PORT_HANDLER_T destruct_handler;
/**
* The reset_handler specifies the method invoked when a user attempts to
* hard reset a port.
*/
SCI_BASE_PORT_RESET_HANDLER_T reset_handler;
/**
* The add_phy_handler specifies the method invoked when a user attempts to
* add another phy into the port.
*/
SCI_BASE_PORT_PHY_HANDLER_T add_phy_handler;
/**
* The remove_phy_handler specifies the method invoked when a user
* attempts to remove a phy from the port.
*/
SCI_BASE_PORT_PHY_HANDLER_T remove_phy_handler;
};
/**
* sci_base_port_construct() - Construct the base port object
* @this_port: This parameter specifies the base port to be constructed.
* @state_table: This parameter specifies the table of state definitions to be
* utilized for the domain state machine.
*
*/
void sci_base_port_construct(
struct sci_base_port *this_port,
const struct sci_base_state *state_table);
#endif /* _SCI_BASE_PORT_H_ */
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SCI_BASE_REMOTE_DEVICE_H_
#define _SCI_BASE_REMOTE_DEVICE_H_
/**
* This file contains all of the structures, constants, and methods common to
* all remote device object definitions.
*
*
*/
#include "sci_base_state_machine.h"
struct sci_base_request;
/**
* enum sci_base_remote_device_states - This enumeration depicts all the states
* for the common remote device state machine.
*
*
*/
enum sci_base_remote_device_states {
/**
* Simply the initial state for the base remote device state machine.
*/
SCI_BASE_REMOTE_DEVICE_STATE_INITIAL,
/**
* This state indicates that the remote device has successfully been
* stopped. In this state no new IO operations are permitted.
* This state is entered from the INITIAL state.
* This state is entered from the STOPPING state.
*/
SCI_BASE_REMOTE_DEVICE_STATE_STOPPED,
/**
* This state indicates the the remote device is in the process of
* becoming ready (i.e. starting). In this state no new IO operations
* are permitted.
* This state is entered from the STOPPED state.
*/
SCI_BASE_REMOTE_DEVICE_STATE_STARTING,
/**
* This state indicates the remote device is now ready. Thus, the user
* is able to perform IO operations on the remote device.
* This state is entered from the STARTING state.
*/
SCI_BASE_REMOTE_DEVICE_STATE_READY,
/**
* This state indicates that the remote device is in the process of
* stopping. In this state no new IO operations are permitted, but
* existing IO operations are allowed to complete.
* This state is entered from the READY state.
* This state is entered from the FAILED state.
*/
SCI_BASE_REMOTE_DEVICE_STATE_STOPPING,
/**
* This state indicates that the remote device has failed.
* In this state no new IO operations are permitted.
* This state is entered from the INITIALIZING state.
* This state is entered from the READY state.
*/
SCI_BASE_REMOTE_DEVICE_STATE_FAILED,
/**
* This state indicates the device is being reset.
* In this state no new IO operations are permitted.
* This state is entered from the READY state.
*/
SCI_BASE_REMOTE_DEVICE_STATE_RESETTING,
/**
* Simply the final state for the base remote device state machine.
*/
SCI_BASE_REMOTE_DEVICE_STATE_FINAL,
SCI_BASE_REMOTE_DEVICE_MAX_STATES
};
/**
* struct sci_base_remote_device - The base remote device object abstracts the
* fields common to all SCI remote device objects.
*
*
*/
struct sci_base_remote_device {
/**
* The field specifies that the parent object for the base remote
* device is the base object itself.
*/
struct sci_base_object parent;
/**
* This field contains the information for the base remote device state
* machine.
*/
struct sci_base_state_machine state_machine;
};
typedef enum sci_status (*SCI_BASE_REMOTE_DEVICE_HANDLER_T)(
struct sci_base_remote_device *
);
typedef enum sci_status (*SCI_BASE_REMOTE_DEVICE_REQUEST_HANDLER_T)(
struct sci_base_remote_device *,
struct sci_base_request *
);
typedef enum sci_status (*SCI_BASE_REMOTE_DEVICE_HIGH_PRIORITY_REQUEST_COMPLETE_HANDLER_T)(
struct sci_base_remote_device *,
struct sci_base_request *,
void *,
enum sci_io_status
);
/**
* struct sci_base_remote_device_state_handler - This structure contains all of
* the state handler methods common to base remote device state machines.
* Handler methods provide the ability to change the behavior for user
* requests or transitions depending on the state the machine is in.
*
*
*/
struct sci_base_remote_device_state_handler {
/**
* The start_handler specifies the method invoked when a user attempts to
* start a remote device.
*/
SCI_BASE_REMOTE_DEVICE_HANDLER_T start_handler;
/**
* The stop_handler specifies the method invoked when a user attempts to
* stop a remote device.
*/
SCI_BASE_REMOTE_DEVICE_HANDLER_T stop_handler;
/**
* The fail_handler specifies the method invoked when a remote device
* failure has occurred. A failure may be due to an inability to
* initialize/configure the device.
*/
SCI_BASE_REMOTE_DEVICE_HANDLER_T fail_handler;
/**
* The destruct_handler specifies the method invoked when attempting to
* destruct a remote device.
*/
SCI_BASE_REMOTE_DEVICE_HANDLER_T destruct_handler;
/**
* The reset handler specifies the method invloked when requesting to reset a
* remote device.
*/
SCI_BASE_REMOTE_DEVICE_HANDLER_T reset_handler;
/**
* The reset complete handler specifies the method invloked when reporting
* that a reset has completed to the remote device.
*/
SCI_BASE_REMOTE_DEVICE_HANDLER_T reset_complete_handler;
/**
* The start_io_handler specifies the method invoked when a user
* attempts to start an IO request for a remote device.
*/
SCI_BASE_REMOTE_DEVICE_REQUEST_HANDLER_T start_io_handler;
/**
* The complete_io_handler specifies the method invoked when a user
* attempts to complete an IO request for a remote device.
*/
SCI_BASE_REMOTE_DEVICE_REQUEST_HANDLER_T complete_io_handler;
/**
* The continue_io_handler specifies the method invoked when a user
* attempts to continue an IO request for a remote device.
*/
SCI_BASE_REMOTE_DEVICE_REQUEST_HANDLER_T continue_io_handler;
/**
* The start_task_handler specifies the method invoked when a user
* attempts to start a task management request for a remote device.
*/
SCI_BASE_REMOTE_DEVICE_REQUEST_HANDLER_T start_task_handler;
/**
* The complete_task_handler specifies the method invoked when a user
* attempts to complete a task management request for a remote device.
*/
SCI_BASE_REMOTE_DEVICE_REQUEST_HANDLER_T complete_task_handler;
};
/**
* sci_base_remote_device_construct() - Construct the base remote device
* @this_remote_device: This parameter specifies the base remote device to be
* constructed.
* @state_table: This parameter specifies the table of state definitions to be
* utilized for the remote device state machine.
*
*/
static inline void sci_base_remote_device_construct(
struct sci_base_remote_device *base_dev,
const struct sci_base_state *state_table)
{
base_dev->parent.private = NULL;
sci_base_state_machine_construct(
&base_dev->state_machine,
&base_dev->parent,
state_table,
SCI_BASE_REMOTE_DEVICE_STATE_INITIAL
);
sci_base_state_machine_start(
&base_dev->state_machine
);
}
#endif /* _SCI_BASE_REMOTE_DEVICE_H_ */
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SCI_BASE_REQUST_H_
#define _SCI_BASE_REQUST_H_
/**
* This file contains all of the constants, types, and method declarations for
* the SCI base IO and task request objects.
*
*
*/
#include "sci_base_state_machine.h"
/**
* enum sci_base_request_states - This enumeration depicts all the states for
* the common request state machine.
*
*
*/
enum sci_base_request_states {
/**
* Simply the initial state for the base request state machine.
*/
SCI_BASE_REQUEST_STATE_INITIAL,
/**
* This state indicates that the request has been constructed. This state
* is entered from the INITIAL state.
*/
SCI_BASE_REQUEST_STATE_CONSTRUCTED,
/**
* This state indicates that the request has been started. This state is
* entered from the CONSTRUCTED state.
*/
SCI_BASE_REQUEST_STATE_STARTED,
/**
* This state indicates that the request has completed.
* This state is entered from the STARTED state. This state is entered from
* the ABORTING state.
*/
SCI_BASE_REQUEST_STATE_COMPLETED,
/**
* This state indicates that the request is in the process of being
* terminated/aborted.
* This state is entered from the CONSTRUCTED state.
* This state is entered from the STARTED state.
*/
SCI_BASE_REQUEST_STATE_ABORTING,
/**
* Simply the final state for the base request state machine.
*/
SCI_BASE_REQUEST_STATE_FINAL,
};
/**
* struct sci_base_request - The base request object abstracts the fields
* common to all SCI IO and task request objects.
*
*
*/
struct sci_base_request {
/**
* The field specifies that the parent object for the base request is the
* base object itself.
*/
struct sci_base_object parent;
/**
* This field contains the information for the base request state machine.
*/
struct sci_base_state_machine state_machine;
};
typedef enum sci_status (*SCI_BASE_REQUEST_HANDLER_T)(
struct sci_base_request *this_request
);
/**
* struct sci_base_request_state_handler - This structure contains all of the
* state handler methods common to base IO and task request state machines.
* Handler methods provide the ability to change the behavior for user
* requests or transitions depending on the state the machine is in.
*
*
*/
struct sci_base_request_state_handler {
/**
* The start_handler specifies the method invoked when a user attempts to
* start a request.
*/
SCI_BASE_REQUEST_HANDLER_T start_handler;
/**
* The abort_handler specifies the method invoked when a user attempts to
* abort a request.
*/
SCI_BASE_REQUEST_HANDLER_T abort_handler;
/**
* The complete_handler specifies the method invoked when a user attempts to
* complete a request.
*/
SCI_BASE_REQUEST_HANDLER_T complete_handler;
/**
* The destruct_handler specifies the method invoked when a user attempts to
* destruct a request.
*/
SCI_BASE_REQUEST_HANDLER_T destruct_handler;
};
/**
* sci_base_request_construct() - Construct the base request.
* @this_request: This parameter specifies the base request to be constructed.
* @state_table: This parameter specifies the table of state definitions to be
* utilized for the request state machine.
*
*/
static inline void sci_base_request_construct(
struct sci_base_request *base_req,
const struct sci_base_state *my_state_table)
{
base_req->parent.private = NULL;
sci_base_state_machine_construct(
&base_req->state_machine,
&base_req->parent,
my_state_table,
SCI_BASE_REQUEST_STATE_INITIAL
);
sci_base_state_machine_start(
&base_req->state_machine
);
}
#endif /* _SCI_BASE_REQUST_H_ */
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SCI_BASE_STATE_H_
#define _SCI_BASE_STATE_H_
#include "sci_object.h"
typedef void (*SCI_BASE_STATE_HANDLER_T)(
void
);
typedef void (*SCI_STATE_TRANSITION_T)(
struct sci_base_object *base_object
);
/**
* struct sci_base_state - The base state object abstracts the fields common to
* all state objects defined in SCI.
*
*
*/
struct sci_base_state {
/**
* This field is a function pointer that defines the method to be
* invoked when the state is entered.
*/
SCI_STATE_TRANSITION_T enter_state;
/**
* This field is a function pointer that defines the method to be
* invoked when the state is exited.
*/
SCI_STATE_TRANSITION_T exit_state;
};
#endif /* _SCI_BASE_STATE_H_ */
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* This file contains all of the functionality common to all state machine
* object implementations.
*
*
*/
#include "sci_base_state_machine.h"
static void sci_state_machine_exit_state(struct sci_base_state_machine *sm)
{
u32 state = sm->current_state_id;
SCI_STATE_TRANSITION_T exit = sm->state_table[state].exit_state;
if (exit)
exit(sm->state_machine_owner);
}
static void sci_state_machine_enter_state(struct sci_base_state_machine *sm)
{
u32 state = sm->current_state_id;
SCI_STATE_TRANSITION_T enter = sm->state_table[state].enter_state;
if (enter)
enter(sm->state_machine_owner);
}
/*
* ******************************************************************************
* * P R O T E C T E D M E T H O D S
* ****************************************************************************** */
/**
* This method will set the initial state and state table for the state
* machine. The caller should follow this request with the initialize
* request to cause the state machine to start.
* @sm: This parameter provides the state machine object to be
* constructed.
* @state_machine_owner: This parameter indicates the object that is owns the
* state machine being constructed.
* @state_table: This parameter specifies the table of state objects that is
* managed by this state machine.
* @initial_state: This parameter specifies the value of the initial state for
* this state machine.
*
*/
void sci_base_state_machine_construct(struct sci_base_state_machine *sm,
struct sci_base_object *owner,
const struct sci_base_state *state_table,
u32 initial_state)
{
sm->state_machine_owner = owner;
sm->initial_state_id = initial_state;
sm->previous_state_id = initial_state;
sm->current_state_id = initial_state;
sm->state_table = state_table;
}
/**
* This method will cause the state machine to enter the initial state.
* @sm: This parameter specifies the state machine that is to
* be started.
*
* sci_base_state_machine_construct() for how to set the initial state none
*/
void sci_base_state_machine_start(struct sci_base_state_machine *sm)
{
sm->current_state_id = sm->initial_state_id;
#if defined(SCI_BASE_ENABLE_SUBJECT_NOTIFICATION)
sci_base_subject_notify(&sm->parent);
#endif
sci_state_machine_enter_state(sm);
}
/**
* This method will cause the state machine to exit it's current state only.
* @sm: This parameter specifies the state machine that is to
* be stopped.
*
*/
void sci_base_state_machine_stop(
struct sci_base_state_machine *sm)
{
sci_state_machine_exit_state(sm);
#if defined(SCI_BASE_ENABLE_SUBJECT_NOTIFICATION)
sci_base_subject_notify(&sm->parent);
#endif
}
/**
* This method performs an update to the current state of the state machine.
* @sm: This parameter specifies the state machine for which
* the caller wishes to perform a state change.
* @next_state: This parameter specifies the new state for the state machine.
*
*/
void sci_base_state_machine_change_state(
struct sci_base_state_machine *sm,
u32 next_state)
{
sci_state_machine_exit_state(sm);
sm->previous_state_id = sm->current_state_id;
sm->current_state_id = next_state;
#if defined(SCI_BASE_ENABLE_SUBJECT_NOTIFICATION)
/* Notify of the state change prior to entering the state. */
sci_base_subject_notify(&sm->parent);
#endif
sci_state_machine_enter_state(sm);
}
/**
* This method simply returns the current state of the state machine to the
* caller.
* @sm: This parameter specifies the state machine for which to
* retrieve the current state.
*
* This method returns a u32 value indicating the current state for the
* supplied state machine.
*/
u32 sci_base_state_machine_get_state(struct sci_base_state_machine *sm)
{
return sm->current_state_id;
}
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* BSD LICENSE
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SCI_BASE_STATE_MACHINE_H_
#define _SCI_BASE_STATE_MACHINE_H_
/**
* This file contains all structures, constants, or method declarations common
* to all state machines defined in SCI.
*
*
*/
#include "sci_base_state.h"
/**
* SET_STATE_HANDLER() -
*
* This macro simply provides simplified retrieval of an objects state handler.
*/
#define SET_STATE_HANDLER(object, table, state) \
(object)->state_handlers = &(table)[(state)]
/**
* struct sci_base_state_machine - This structure defines the fields common to
* all state machines.
*
*
*/
struct sci_base_state_machine {
/**
* This field points to the start of the state machine's state table.
*/
const struct sci_base_state *state_table;
/**
* This field points to the object to which this state machine is
* associated. It serves as a cookie to be provided to the state
* enter/exit methods.
*/
struct sci_base_object *state_machine_owner;
/**
* This field simply indicates the state value for the state machine's
* initial state.
*/
u32 initial_state_id;
/**
* This field indicates the current state of the state machine.
*/
u32 current_state_id;
/**
* This field indicates the previous state of the state machine.
*/
u32 previous_state_id;
};
/*
* ******************************************************************************
* * P R O T E C T E D M E T H O D S
* ****************************************************************************** */
void sci_base_state_machine_construct(
struct sci_base_state_machine *this_state_machine,
struct sci_base_object *state_machine_owner,
const struct sci_base_state *state_table,
u32 initial_state);
void sci_base_state_machine_start(
struct sci_base_state_machine *this_state_machine);
void sci_base_state_machine_stop(
struct sci_base_state_machine *this_state_machine);
void sci_base_state_machine_change_state(
struct sci_base_state_machine *this_state_machine,
u32 next_state);
u32 sci_base_state_machine_get_state(
struct sci_base_state_machine *this_state_machine);
#endif /* _SCI_BASE_STATE_MACHINE_H_ */
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# Makefile for create_fw
#
CC=gcc
CFLAGS=-c -Wall -O2 -g
LDFLAGS=
SOURCES=create_fw.c
OBJECTS=$(SOURCES:.cpp=.o)
EXECUTABLE=create_fw
all: $(SOURCES) $(EXECUTABLE)
$(EXECUTABLE): $(OBJECTS)
$(CC) $(LDFLAGS) $(OBJECTS) -o $@
.c.o:
$(CC) $(CFLAGS) $< -O $@
clean:
rm -f *.o $(EXECUTABLE)
This defines the temporary binary blow we are to pass to the SCU
driver to emulate the binary firmware that we will eventually be
able to access via NVRAM on the SCU controller.
The current size of the binary blob is expected to be 149 bytes or larger
Header Types:
0x1: Phy Masks
0x2: Phy Gens
0x3: SAS Addrs
0xff: End of Data
ID string - u8[12]: "#SCU MAGIC#\0"
Version - u8: 1
SubVersion - u8: 0
Header Type - u8: 0x1
Size - u8: 8
Phy Mask - u32[8]
Header Type - u8: 0x2
Size - u8: 8
Phy Gen - u32[8]
Header Type - u8: 0x3
Size - u8: 8
Sas Addr - u64[8]
Header Type - u8: 0xf
==============================================================================
Place isci_firmware.bin in /lib/firmware
Be sure to recreate the initramfs image to include the firmware.
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