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Commit 71f34979 authored by David Gibson's avatar David Gibson Committed by Josh Boyer
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[POWERPC] Convert remaining dts-v0 files to v1 

At the moment we have a mixture of left-over version 0 and new-format
version 1 files in arch/powerpc/boot/dts.  This is potentially
confusing to people new to the dts format attempting to figure it out.

So, this patch converts all the as-yet unconverted dts v0 files and
converts them to v1.  They're mechanically-converted, and not hand
tweaked so in some cases they're not 100% in keeping with usual v1
style, but the convertor program does have some heuristics so the
discrepancies aren't too bad.

I have checked that this patch produces no changes to the resulting
dtb binaries.
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
Acked-by: default avatarJosh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: default avatarGeoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: default avatarJosh Boyer <jwboyer@linux.vnet.ibm.com>
parent b786af11
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Showing with 1344 additions and 1310 deletions
arch/powerpc/boot/dts/bamboo.dts
View file @ 71f34979
......@@ -11,12 +11,14 @@
* any warranty of any kind, whether express or implied.
*/
/dts-v1/;
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "amcc,bamboo";
compatible = "amcc,bamboo";
dcr-parent = <&/cpus/cpu@0>;
dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
......@@ -34,13 +36,13 @@ cpus {
cpu@0 {
device_type = "cpu";
model = "PowerPC,440EP";
reg = <0>;
reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
i-cache-line-size = <20>;
d-cache-line-size = <20>;
i-cache-size = <8000>;
d-cache-size = <8000>;
i-cache-line-size = <32>;
d-cache-line-size = <32>;
i-cache-size = <32768>;
d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
};
......@@ -48,14 +50,14 @@ cpu@0 {
memory {
device_type = "memory";
reg = <0 0 0>; /* Filled in by zImage */
reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-440ep","ibm,uic";
interrupt-controller;
cell-index = <0>;
dcr-reg = <0c0 009>;
dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
......@@ -65,22 +67,22 @@ UIC1: interrupt-controller1 {
compatible = "ibm,uic-440ep","ibm,uic";
interrupt-controller;
cell-index = <1>;
dcr-reg = <0d0 009>;
dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <1e 4 1f 4>; /* cascade */
interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
SDR0: sdr {
compatible = "ibm,sdr-440ep";
dcr-reg = <00e 002>;
dcr-reg = <0x00e 0x002>;
};
CPR0: cpr {
compatible = "ibm,cpr-440ep";
dcr-reg = <00c 002>;
dcr-reg = <0x00c 0x002>;
};
plb {
......@@ -92,29 +94,29 @@ plb {
SDRAM0: sdram {
compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
dcr-reg = <010 2>;
dcr-reg = <0x010 0x002>;
};
DMA0: dma {
compatible = "ibm,dma-440ep", "ibm,dma-440gp";
dcr-reg = <100 027>;
dcr-reg = <0x100 0x027>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
dcr-reg = <180 62>;
dcr-reg = <0x180 0x062>;
num-tx-chans = <4>;
num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
interrupts = <0 1 2 3 4>;
interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
/*RXEOB*/ 1 &UIC0 b 4
/*SERR*/ 2 &UIC1 0 4
/*TXDE*/ 3 &UIC1 1 4
/*RXDE*/ 4 &UIC1 2 4>;
interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
/*RXEOB*/ 0x1 &UIC0 0xb 0x4
/*SERR*/ 0x2 &UIC1 0x0 0x4
/*TXDE*/ 0x3 &UIC1 0x1 0x4
/*RXDE*/ 0x4 &UIC1 0x2 0x4>;
};
POB0: opb {
......@@ -124,101 +126,101 @@ POB0: opb {
/* Bamboo is oddball in the 44x world and doesn't use the ERPN
* bits.
*/
ranges = <00000000 0 00000000 80000000
80000000 0 80000000 80000000>;
ranges = <0x00000000 0x00000000 0x00000000 0x80000000
0x80000000 0x00000000 0x80000000 0x80000000>;
interrupt-parent = <&UIC1>;
interrupts = <7 4>;
interrupts = <0x7 0x4>;
clock-frequency = <0>; /* Filled in by zImage */
EBC0: ebc {
compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
dcr-reg = <012 2>;
dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by zImage */
interrupts = <5 1>;
interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>;
};
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600300 8>;
virtual-reg = <ef600300>;
reg = <0xef600300 0x00000008>;
virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by zImage */
current-speed = <1c200>;
current-speed = <115200>;
interrupt-parent = <&UIC0>;
interrupts = <0 4>;
interrupts = <0x0 0x4>;
};
UART1: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600400 8>;
virtual-reg = <ef600400>;
reg = <0xef600400 0x00000008>;
virtual-reg = <0xef600400>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
interrupts = <1 4>;
interrupts = <0x1 0x4>;
};
UART2: serial@ef600500 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600500 8>;
virtual-reg = <ef600500>;
reg = <0xef600500 0x00000008>;
virtual-reg = <0xef600500>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
interrupts = <3 4>;
interrupts = <0x3 0x4>;
};
UART3: serial@ef600600 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600600 8>;
virtual-reg = <ef600600>;
reg = <0xef600600 0x00000008>;
virtual-reg = <0xef600600>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
interrupts = <4 4>;
interrupts = <0x4 0x4>;
};
IIC0: i2c@ef600700 {
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
reg = <ef600700 14>;
reg = <0xef600700 0x00000014>;
interrupt-parent = <&UIC0>;
interrupts = <2 4>;
interrupts = <0x2 0x4>;
};
IIC1: i2c@ef600800 {
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
reg = <ef600800 14>;
reg = <0xef600800 0x00000014>;
interrupt-parent = <&UIC0>;
interrupts = <7 4>;
interrupts = <0x7 0x4>;
};
ZMII0: emac-zmii@ef600d00 {
compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
reg = <ef600d00 c>;
reg = <0xef600d00 0x0000000c>;
};
EMAC0: ethernet@ef600e00 {
device_type = "network";
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
interrupts = <1c 4 1d 4>;
reg = <ef600e00 70>;
interrupts = <0x1c 0x4 0x1d 0x4>;
reg = <0xef600e00 0x00000070>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <0 1>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
max-frame-size = <1500>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rmii";
phy-map = <00000000>;
phy-map = <0x00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <0>;
};
......@@ -227,26 +229,26 @@ EMAC1: ethernet@ef600f00 {
device_type = "network";
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
interrupts = <1e 4 1f 4>;
reg = <ef600f00 70>;
interrupts = <0x1e 0x4 0x1f 0x4>;
reg = <0xef600f00 0x00000070>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <2 3>;
mal-rx-channel = <1>;
cell-index = <1>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
max-frame-size = <1500>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rmii";
phy-map = <00000000>;
phy-map = <0x00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <1>;
};
usb@ef601000 {
compatible = "ohci-be";
reg = <ef601000 80>;
interrupts = <8 1 9 1>;
reg = <0xef601000 0x00000080>;
interrupts = <0x8 0x1 0x9 0x1>;
interrupt-parent = < &UIC1 >;
};
};
......@@ -258,35 +260,35 @@ PCI0: pci@ec000000 {
#address-cells = <3>;
compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
primary;
reg = <0 eec00000 8 /* Config space access */
0 eed00000 4 /* IACK */
0 eed00000 4 /* Special cycle */
0 ef400000 40>; /* Internal registers */
reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */
0x00000000 0xeed00000 0x00000004 /* IACK */
0x00000000 0xeed00000 0x00000004 /* Special cycle */
0x00000000 0xef400000 0x00000040>; /* Internal registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
*/
ranges = <02000000 0 a0000000 0 a0000000 0 20000000
01000000 0 00000000 0 e8000000 0 00010000>;
ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <42000000 0 0 0 0 0 80000000>;
dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* Bamboo has all 4 IRQ pins tied together per slot */
interrupt-map-mask = <f800 0 0 0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
interrupt-map = <
/* IDSEL 1 */
0800 0 0 0 &UIC0 1c 8
0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
/* IDSEL 2 */
1000 0 0 0 &UIC0 1b 8
0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8
/* IDSEL 3 */
1800 0 0 0 &UIC0 1a 8
0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8
/* IDSEL 4 */
2000 0 0 0 &UIC0 19 8
0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8
>;
};
};
......
arch/powerpc/boot/dts/canyonlands.dts
View file @ 71f34979
This diff is collapsed.
arch/powerpc/boot/dts/ebony.dts
View file @ 71f34979
This diff is collapsed.
arch/powerpc/boot/dts/ep405.dts
View file @ 71f34979
......@@ -9,12 +9,14 @@
* any warranty of any kind, whether express or implied.
*/
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "ep405";
compatible = "ep405";
dcr-parent = <&/cpus/cpu@0>;
dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC;
......@@ -29,13 +31,13 @@ cpus {
cpu@0 {
device_type = "cpu";
model = "PowerPC,405GP";
reg = <0>;
clock-frequency = <bebc200>; /* Filled in by zImage */
reg = <0x00000000>;
clock-frequency = <200000000>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
i-cache-line-size = <20>;
d-cache-line-size = <20>;
i-cache-size = <4000>;
d-cache-size = <4000>;
i-cache-line-size = <32>;
d-cache-line-size = <32>;
i-cache-size = <16384>;
d-cache-size = <16384>;
dcr-controller;
dcr-access-method = "native";
};
......@@ -43,14 +45,14 @@ cpu@0 {
memory {
device_type = "memory";
reg = <0 0>; /* Filled in by zImage */
reg = <0x00000000 0x00000000>; /* Filled in by zImage */
};
UIC0: interrupt-controller {
compatible = "ibm,uic";
interrupt-controller;
cell-index = <0>;
dcr-reg = <0c0 9>;
dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
......@@ -65,91 +67,91 @@ plb {
SDRAM0: memory-controller {
compatible = "ibm,sdram-405gp";
dcr-reg = <010 2>;
dcr-reg = <0x010 0x002>;
};
MAL: mcmal {
compatible = "ibm,mcmal-405gp", "ibm,mcmal";
dcr-reg = <180 62>;
dcr-reg = <0x180 0x062>;
num-tx-chans = <1>;
num-rx-chans = <1>;
interrupt-parent = <&UIC0>;
interrupts = <
b 4 /* TXEOB */
c 4 /* RXEOB */
a 4 /* SERR */
d 4 /* TXDE */
e 4 /* RXDE */>;
0xb 0x4 /* TXEOB */
0xc 0x4 /* RXEOB */
0xa 0x4 /* SERR */
0xd 0x4 /* TXDE */
0xe 0x4 /* RXDE */>;
};
POB0: opb {
compatible = "ibm,opb-405gp", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
ranges = <ef600000 ef600000 a00000>;
dcr-reg = <0a0 5>;
ranges = <0xef600000 0xef600000 0x00a00000>;
dcr-reg = <0x0a0 0x005>;
clock-frequency = <0>; /* Filled in by zImage */
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600300 8>;
virtual-reg = <ef600300>;
reg = <0xef600300 0x00000008>;
virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by zImage */
current-speed = <2580>;
current-speed = <9600>;
interrupt-parent = <&UIC0>;
interrupts = <0 4>;
interrupts = <0x0 0x4>;
};
UART1: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600400 8>;
virtual-reg = <ef600400>;
reg = <0xef600400 0x00000008>;
virtual-reg = <0xef600400>;
clock-frequency = <0>; /* Filled in by zImage */
current-speed = <2580>;
current-speed = <9600>;
interrupt-parent = <&UIC0>;
interrupts = <1 4>;
interrupts = <0x1 0x4>;
};
IIC: i2c@ef600500 {
compatible = "ibm,iic-405gp", "ibm,iic";
reg = <ef600500 11>;
reg = <0xef600500 0x00000011>;
interrupt-parent = <&UIC0>;
interrupts = <2 4>;
interrupts = <0x2 0x4>;
};
GPIO: gpio@ef600700 {
compatible = "ibm,gpio-405gp";
reg = <ef600700 20>;
reg = <0xef600700 0x00000020>;
};
EMAC: ethernet@ef600800 {
linux,network-index = <0>;
linux,network-index = <0x0>;
device_type = "network";
compatible = "ibm,emac-405gp", "ibm,emac";
interrupt-parent = <&UIC0>;
interrupts = <
f 4 /* Ethernet */
9 4 /* Ethernet Wake Up */>;
0xf 0x4 /* Ethernet */
0x9 0x4 /* Ethernet Wake Up */>;
local-mac-address = [000000000000]; /* Filled in by zImage */
reg = <ef600800 70>;
reg = <0xef600800 0x00000070>;
mal-device = <&MAL>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
max-frame-size = <1500>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rmii";
phy-map = <00000000>;
phy-map = <0x00000000>;
};
};
EBC0: ebc {
compatible = "ibm,ebc-405gp", "ibm,ebc";
dcr-reg = <012 2>;
dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
......@@ -163,13 +165,13 @@ EBC0: ebc {
/* NVRAM and RTC */
nvrtc@4,200000 {
compatible = "ds1742";
reg = <4 200000 0>; /* size fixed up by zImage */
reg = <0x00000004 0x00200000 0x00000000>; /* size fixed up by zImage */
};
/* "BCSR" CPLD contains a PCI irq controller */
bcsr@4,0 {
compatible = "ep405-bcsr";
reg = <4 0 10>;
reg = <0x00000004 0x00000000 0x00000010>;
interrupt-controller;
/* Routing table */
irq-routing = [ 00 /* SYSERR */
......@@ -198,26 +200,26 @@ PCI0: pci@ec000000 {
#address-cells = <3>;
compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
primary;
reg = <eec00000 8 /* Config space access */
eed80000 4 /* IACK */
eed80000 4 /* Special cycle */
ef480000 40>; /* Internal registers */
reg = <0xeec00000 0x00000008 /* Config space access */
0xeed80000 0x00000004 /* IACK */
0xeed80000 0x00000004 /* Special cycle */
0xef480000 0x00000040>; /* Internal registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
*/
ranges = <02000000 0 80000000 80000000 0 20000000
01000000 0 00000000 e8000000 0 00010000>;
ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <42000000 0 0 0 0 80000000>;
dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
/* That's all I know about IRQs on that thing ... */
interrupt-map-mask = <f800 0 0 0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
interrupt-map = <
/* USB */
7000 0 0 0 &UIC0 1e 8 /* IRQ5 */
0x7000 0x0 0x0 0x0 &UIC0 0x1e 0x8 /* IRQ5 */
>;
};
};
......
arch/powerpc/boot/dts/glacier.dts
View file @ 71f34979
This diff is collapsed.
arch/powerpc/boot/dts/haleakala.dts
View file @ 71f34979
......@@ -8,12 +8,14 @@
* any warranty of any kind, whether express or implied.
*/
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "amcc,haleakala";
compatible = "amcc,haleakala", "amcc,kilauea";
dcr-parent = <&/cpus/cpu@0>;
dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
......@@ -28,13 +30,13 @@ cpus {
cpu@0 {
device_type = "cpu";
model = "PowerPC,405EXr";
reg = <0>;
reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by U-Boot */
timebase-frequency = <0>; /* Filled in by U-Boot */
i-cache-line-size = <20>;
d-cache-line-size = <20>;
i-cache-size = <4000>; /* 16 kB */
d-cache-size = <4000>; /* 16 kB */
i-cache-line-size = <32>;
d-cache-line-size = <32>;
i-cache-size = <16384>; /* 16 kB */
d-cache-size = <16384>; /* 16 kB */
dcr-controller;
dcr-access-method = "native";
};
......@@ -42,14 +44,14 @@ cpu@0 {
memory {
device_type = "memory";
reg = <0 0>; /* Filled in by U-Boot */
reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
};
UIC0: interrupt-controller {
compatible = "ibm,uic-405exr", "ibm,uic";
interrupt-controller;
cell-index = <0>;
dcr-reg = <0c0 009>;
dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
......@@ -59,11 +61,11 @@ UIC1: interrupt-controller1 {
compatible = "ibm,uic-405exr","ibm,uic";
interrupt-controller;
cell-index = <1>;
dcr-reg = <0d0 009>;
dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <1e 4 1f 4>; /* cascade */
interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
......@@ -71,11 +73,11 @@ UIC2: interrupt-controller2 {
compatible = "ibm,uic-405exr","ibm,uic";
interrupt-controller;
cell-index = <2>;
dcr-reg = <0e0 009>;
dcr-reg = <0x0e0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <1c 4 1d 4>; /* cascade */
interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
......@@ -88,72 +90,72 @@ plb {
SDRAM0: memory-controller {
compatible = "ibm,sdram-405exr";
dcr-reg = <010 2>;
dcr-reg = <0x010 0x002>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-405exr", "ibm,mcmal2";
dcr-reg = <180 62>;
dcr-reg = <0x180 0x062>;
num-tx-chans = <2>;
num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
interrupts = <0 1 2 3 4>;
interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
/*RXEOB*/ 1 &UIC0 b 4
/*SERR*/ 2 &UIC1 0 4
/*TXDE*/ 3 &UIC1 1 4
/*RXDE*/ 4 &UIC1 2 4>;
interrupt-map-mask = <ffffffff>;
interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
/*RXEOB*/ 0x1 &UIC0 0xb 0x4
/*SERR*/ 0x2 &UIC1 0x0 0x4
/*TXDE*/ 0x3 &UIC1 0x1 0x4
/*RXDE*/ 0x4 &UIC1 0x2 0x4>;
interrupt-map-mask = <0xffffffff>;
};
POB0: opb {
compatible = "ibm,opb-405exr", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
ranges = <80000000 80000000 10000000
ef600000 ef600000 a00000
f0000000 f0000000 10000000>;
dcr-reg = <0a0 5>;
ranges = <0x80000000 0x80000000 0x10000000
0xef600000 0xef600000 0x00a00000
0xf0000000 0xf0000000 0x10000000>;
dcr-reg = <0x0a0 0x005>;
clock-frequency = <0>; /* Filled in by U-Boot */
EBC0: ebc {
compatible = "ibm,ebc-405exr", "ibm,ebc";
dcr-reg = <012 2>;
dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by U-Boot */
/* ranges property is supplied by U-Boot */
interrupts = <5 1>;
interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl512n", "cfi-flash";
bank-width = <2>;
reg = <0 000000 4000000>;
reg = <0x00000000 0x00000000 0x04000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0 200000>;
reg = <0x00000000 0x00200000>;
};
partition@200000 {
label = "root";
reg = <200000 200000>;
reg = <0x00200000 0x00200000>;
};
partition@400000 {
label = "user";
reg = <400000 3b60000>;
reg = <0x00400000 0x03b60000>;
};
partition@3f60000 {
label = "env";
reg = <3f60000 40000>;
reg = <0x03f60000 0x00040000>;
};
partition@3fa0000 {
label = "u-boot";
reg = <3fa0000 60000>;
reg = <0x03fa0000 0x00060000>;
};
};
};
......@@ -161,68 +163,68 @@ partition@3fa0000 {
UART0: serial@ef600200 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600200 8>;
virtual-reg = <ef600200>;
reg = <0xef600200 0x00000008>;
virtual-reg = <0xef600200>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>;
interrupt-parent = <&UIC0>;
interrupts = <1a 4>;
interrupts = <0x1a 0x4>;
};
UART1: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
reg = <ef600300 8>;
virtual-reg = <ef600300>;
reg = <0xef600300 0x00000008>;
virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>;
interrupt-parent = <&UIC0>;
interrupts = <1 4>;
interrupts = <0x1 0x4>;
};
IIC0: i2c@ef600400 {
compatible = "ibm,iic-405exr", "ibm,iic";
reg = <ef600400 14>;
reg = <0xef600400 0x00000014>;
interrupt-parent = <&UIC0>;
interrupts = <2 4>;
interrupts = <0x2 0x4>;
};
IIC1: i2c@ef600500 {
compatible = "ibm,iic-405exr", "ibm,iic";
reg = <ef600500 14>;
reg = <0xef600500 0x00000014>;
interrupt-parent = <&UIC0>;
interrupts = <7 4>;
interrupts = <0x7 0x4>;
};
RGMII0: emac-rgmii@ef600b00 {
compatible = "ibm,rgmii-405exr", "ibm,rgmii";
reg = <ef600b00 104>;
reg = <0xef600b00 0x00000104>;
has-mdio;
};
EMAC0: ethernet@ef600900 {
linux,network-index = <0>;
linux,network-index = <0x0>;
device_type = "network";
compatible = "ibm,emac-405exr", "ibm,emac4";
interrupt-parent = <&EMAC0>;
interrupts = <0 1>;
interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*Status*/ 0 &UIC0 18 4
/*Wake*/ 1 &UIC1 1d 4>;
reg = <ef600900 70>;
interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
/*Wake*/ 0x1 &UIC1 0x1d 0x4>;
reg = <0xef600900 0x00000070>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <2328>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
max-frame-size = <9000>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rgmii";
phy-map = <00000000>;
phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
has-inverted-stacr-oc;
......@@ -237,23 +239,23 @@ PCIE0: pciex@0a0000000 {
#address-cells = <3>;
compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
primary;
port = <0>; /* port number */
reg = <a0000000 20000000 /* Config space access */
ef000000 00001000>; /* Registers */
dcr-reg = <040 020>;
sdr-base = <400>;
port = <0x0>; /* port number */
reg = <0xa0000000 0x20000000 /* Config space access */
0xef000000 0x00001000>; /* Registers */
dcr-reg = <0x040 0x020>;
sdr-base = <0x400>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
ranges = <02000000 0 80000000 90000000 0 08000000
01000000 0 00000000 e0000000 0 00010000>;
ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <42000000 0 0 0 0 80000000>;
dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 0x00 to 0x3f */
bus-range = <00 3f>;
bus-range = <0x0 0x3f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
......@@ -263,12 +265,12 @@ PCIE0: pciex@0a0000000 {
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
interrupt-map-mask = <0000 0 0 7>;
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
0000 0 0 1 &UIC2 0 4 /* swizzled int A */
0000 0 0 2 &UIC2 1 4 /* swizzled int B */
0000 0 0 3 &UIC2 2 4 /* swizzled int C */
0000 0 0 4 &UIC2 3 4 /* swizzled int D */>;
0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
};
};
};
arch/powerpc/boot/dts/holly.dts
View file @ 71f34979
......@@ -10,6 +10,8 @@
* any warranty of any kind, whether express or implied.
*/
/dts-v1/;
/ {
model = "41K7339";
compatible = "ibm,holly";
......@@ -21,22 +23,22 @@ cpus {
#size-cells =<0>;
PowerPC,750CL@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>;
i-cache-line-size = <20>;
d-cache-size = <8000>;
i-cache-size = <8000>;
d-cache-sets = <80>;
i-cache-sets = <80>;
timebase-frequency = <2faf080>;
clock-frequency = <23c34600>;
bus-frequency = <bebc200>;
reg = <0x00000000>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <32768>;
i-cache-size = <32768>;
d-cache-sets = <128>;
i-cache-sets = <128>;
timebase-frequency = <50000000>;
clock-frequency = <600000000>;
bus-frequency = <200000000>;
};
};
memory@0 {
device_type = "memory";
reg = <00000000 20000000>;
reg = <0x00000000 0x20000000>;
};
tsi109@c0000000 {
......@@ -44,33 +46,33 @@ tsi109@c0000000 {
compatible = "tsi109-bridge", "tsi108-bridge";
#address-cells = <1>;
#size-cells = <1>;
ranges = <00000000 c0000000 00010000>;
reg = <c0000000 00010000>;
ranges = <0x00000000 0xc0000000 0x00010000>;
reg = <0xc0000000 0x00010000>;
i2c@7000 {
device_type = "i2c";
compatible = "tsi109-i2c", "tsi108-i2c";
interrupt-parent = <&MPIC>;
interrupts = <e 2>;
reg = <7000 400>;
interrupts = <0xe 0x2>;
reg = <0x00007000 0x00000400>;
};
MDIO: mdio@6000 {
device_type = "mdio";
compatible = "tsi109-mdio", "tsi108-mdio";
reg = <6000 50>;
reg = <0x00006000 0x00000050>;
#address-cells = <1>;
#size-cells = <0>;
PHY1: ethernet-phy@1 {
compatible = "bcm5461a";
reg = <1>;
reg = <0x00000001>;
txc-rxc-delay-disable;
};
PHY2: ethernet-phy@2 {
compatible = "bcm5461a";
reg = <2>;
reg = <0x00000002>;
txc-rxc-delay-disable;
};
};
......@@ -80,10 +82,10 @@ ethernet@6200 {
compatible = "tsi109-ethernet", "tsi108-ethernet";
#address-cells = <1>;
#size-cells = <0>;
reg = <6000 200>;
reg = <0x00006000 0x00000200>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupt-parent = <&MPIC>;
interrupts = <10 2>;
interrupts = <0x10 0x2>;
mdio-handle = <&MDIO>;
phy-handle = <&PHY1>;
};
......@@ -93,10 +95,10 @@ ethernet@6600 {
compatible = "tsi109-ethernet", "tsi108-ethernet";
#address-cells = <1>;
#size-cells = <0>;
reg = <6400 200>;
reg = <0x00006400 0x00000200>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupt-parent = <&MPIC>;
interrupts = <11 2>;
interrupts = <0x11 0x2>;
mdio-handle = <&MDIO>;
phy-handle = <&PHY2>;
};
......@@ -104,23 +106,23 @@ ethernet@6600 {
serial@7808 {
device_type = "serial";
compatible = "ns16550";
reg = <7808 200>;
virtual-reg = <c0007808>;
clock-frequency = <3F9C6000>;
current-speed = <1c200>;
reg = <0x00007808 0x00000200>;
virtual-reg = <0xc0007808>;
clock-frequency = <1067212800>;
current-speed = <115200>;
interrupt-parent = <&MPIC>;
interrupts = <c 2>;
interrupts = <0xc 0x2>;
};
serial@7c08 {
device_type = "serial";
compatible = "ns16550";
reg = <7c08 200>;
virtual-reg = <c0007c08>;
clock-frequency = <3F9C6000>;
current-speed = <1c200>;
reg = <0x00007c08 0x00000200>;
virtual-reg = <0xc0007c08>;
clock-frequency = <1067212800>;
current-speed = <115200>;
interrupt-parent = <&MPIC>;
interrupts = <d 2>;
interrupts = <0xd 0x2>;
};
MPIC: pic@7400 {
......@@ -128,7 +130,7 @@ MPIC: pic@7400 {
compatible = "chrp,open-pic";
interrupt-controller;
#interrupt-cells = <2>;
reg = <7400 400>;
reg = <0x00007400 0x00000400>;
big-endian;
};
......@@ -138,42 +140,42 @@ pci@1000 {
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <1000 1000>;
bus-range = <0 0>;
reg = <0x00001000 0x00001000>;
bus-range = <0x0 0x0>;
/*----------------------------------------------------+
| PCI memory range.
| 01 denotes I/O space
| 02 denotes 32-bit memory space
+----------------------------------------------------*/
ranges = <02000000 0 40000000 40000000 0 10000000
01000000 0 00000000 7e000000 0 00010000>;
clock-frequency = <7f28154>;
ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000
0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>;
clock-frequency = <133333332>;
interrupt-parent = <&MPIC>;
interrupts = <17 2>;
interrupt-map-mask = <f800 0 0 7>;
interrupts = <0x17 0x2>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
/*----------------------------------------------------+
| The INTA, INTB, INTC, INTD are shared.
+----------------------------------------------------*/
interrupt-map = <
0800 0 0 1 &RT0 24 0
0800 0 0 2 &RT0 25 0
0800 0 0 3 &RT0 26 0
0800 0 0 4 &RT0 27 0
1000 0 0 1 &RT0 25 0
1000 0 0 2 &RT0 26 0
1000 0 0 3 &RT0 27 0
1000 0 0 4 &RT0 24 0
1800 0 0 1 &RT0 26 0
1800 0 0 2 &RT0 27 0
1800 0 0 3 &RT0 24 0
1800 0 0 4 &RT0 25 0
2000 0 0 1 &RT0 27 0
2000 0 0 2 &RT0 24 0
2000 0 0 3 &RT0 25 0
2000 0 0 4 &RT0 26 0
0x800 0x0 0x0 0x1 &RT0 0x24 0x0
0x800 0x0 0x0 0x2 &RT0 0x25 0x0
0x800 0x0 0x0 0x3 &RT0 0x26 0x0
0x800 0x0 0x0 0x4 &RT0 0x27 0x0
0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
>;
RT0: router@1180 {
......@@ -183,7 +185,7 @@ RT0: router@1180 {
clock-frequency = <0>;
#address-cells = <0>;
#interrupt-cells = <2>;
interrupts = <17 2>;
interrupts = <0x17 0x2>;
interrupt-parent = <&MPIC>;
};
};
......
arch/powerpc/boot/dts/katmai.dts
View file @ 71f34979
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arch/powerpc/boot/dts/kilauea.dts
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arch/powerpc/boot/dts/makalu.dts
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arch/powerpc/boot/dts/ps3.dts
View file @ 71f34979
......@@ -18,6 +18,8 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/dts-v1/;
/ {
model = "SonyPS3";
compatible = "sony,ps3";
......@@ -34,7 +36,7 @@ chosen {
memory {
device_type = "memory";
reg = <0 0 0 0>;
reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
};
/*
......@@ -55,14 +57,14 @@ cpus {
cpu@0 {
device_type = "cpu";
reg = <0>;
ibm,ppc-interrupt-server#s = <0 1>;
reg = <0x00000000>;
ibm,ppc-interrupt-server#s = <0x0 0x1>;
clock-frequency = <0>;
timebase-frequency = <0>;
i-cache-size = <8000>;
d-cache-size = <8000>;
i-cache-line-size = <80>;
d-cache-line-size = <80>;
i-cache-size = <32768>;
d-cache-size = <32768>;
i-cache-line-size = <128>;
d-cache-line-size = <128>;
};
};
};
arch/powerpc/boot/dts/rainier.dts
View file @ 71f34979
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arch/powerpc/boot/dts/sequoia.dts
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arch/powerpc/boot/dts/taishan.dts
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arch/powerpc/boot/dts/walnut.dts
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arch/powerpc/boot/dts/warp.dts
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arch/powerpc/boot/dts/yosemite.dts
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