Commit 72e0605b authored by Jayachandran C's avatar Jayachandran C Committed by Ralf Baechle

MIPS: Netlogic: Disable writing IRT for disabled blocks

If the device header of a block is not present, return invalid IRT
value so that we do not program an incorrect offset.
Signed-off-by: default avatarJayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8882/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 9bbc6c7d
...@@ -170,16 +170,23 @@ static int xlp_irq_to_irt(int irq) ...@@ -170,16 +170,23 @@ static int xlp_irq_to_irt(int irq)
} }
if (devoff != 0) { if (devoff != 0) {
uint32_t val;
pcibase = nlm_pcicfg_base(devoff); pcibase = nlm_pcicfg_base(devoff);
irt = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG) & 0xffff; val = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG);
/* HW weirdness, I2C IRT entry has to be fixed up */ if (val == 0xffffffff) {
switch (irq) { irt = -1;
case PIC_I2C_1_IRQ: } else {
irt = irt + 1; break; irt = val & 0xffff;
case PIC_I2C_2_IRQ: /* HW weirdness, I2C IRT entry has to be fixed up */
irt = irt + 2; break; switch (irq) {
case PIC_I2C_3_IRQ: case PIC_I2C_1_IRQ:
irt = irt + 3; break; irt = irt + 1; break;
case PIC_I2C_2_IRQ:
irt = irt + 2; break;
case PIC_I2C_3_IRQ:
irt = irt + 3; break;
}
} }
} else if (irq >= PIC_PCIE_LINK_LEGACY_IRQ(0) && } else if (irq >= PIC_PCIE_LINK_LEGACY_IRQ(0) &&
irq <= PIC_PCIE_LINK_LEGACY_IRQ(3)) { irq <= PIC_PCIE_LINK_LEGACY_IRQ(3)) {
......
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