Commit 745ed17a authored by Pan Bian's avatar Pan Bian Committed by Hans de Goede

platform/x86: amd-pmc: put device on error paths

Put the PCI device rdev on error paths to fix potential reference count
leaks.
Signed-off-by: default avatarPan Bian <bianpan2016@163.com>
Link: https://lore.kernel.org/r/20210121045005.73342-1-bianpan2016@163.comReviewed-by: default avatarHans de Goede <hdegoede@redhat.com>
Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
parent eabe5339
...@@ -210,31 +210,39 @@ static int amd_pmc_probe(struct platform_device *pdev) ...@@ -210,31 +210,39 @@ static int amd_pmc_probe(struct platform_device *pdev)
dev->dev = &pdev->dev; dev->dev = &pdev->dev;
rdev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0)); rdev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
if (!rdev || !pci_match_id(pmc_pci_ids, rdev)) if (!rdev || !pci_match_id(pmc_pci_ids, rdev)) {
pci_dev_put(rdev);
return -ENODEV; return -ENODEV;
}
dev->cpu_id = rdev->device; dev->cpu_id = rdev->device;
err = pci_write_config_dword(rdev, AMD_PMC_SMU_INDEX_ADDRESS, AMD_PMC_BASE_ADDR_LO); err = pci_write_config_dword(rdev, AMD_PMC_SMU_INDEX_ADDRESS, AMD_PMC_BASE_ADDR_LO);
if (err) { if (err) {
dev_err(dev->dev, "error writing to 0x%x\n", AMD_PMC_SMU_INDEX_ADDRESS); dev_err(dev->dev, "error writing to 0x%x\n", AMD_PMC_SMU_INDEX_ADDRESS);
pci_dev_put(rdev);
return pcibios_err_to_errno(err); return pcibios_err_to_errno(err);
} }
err = pci_read_config_dword(rdev, AMD_PMC_SMU_INDEX_DATA, &val); err = pci_read_config_dword(rdev, AMD_PMC_SMU_INDEX_DATA, &val);
if (err) if (err) {
pci_dev_put(rdev);
return pcibios_err_to_errno(err); return pcibios_err_to_errno(err);
}
base_addr_lo = val & AMD_PMC_BASE_ADDR_HI_MASK; base_addr_lo = val & AMD_PMC_BASE_ADDR_HI_MASK;
err = pci_write_config_dword(rdev, AMD_PMC_SMU_INDEX_ADDRESS, AMD_PMC_BASE_ADDR_HI); err = pci_write_config_dword(rdev, AMD_PMC_SMU_INDEX_ADDRESS, AMD_PMC_BASE_ADDR_HI);
if (err) { if (err) {
dev_err(dev->dev, "error writing to 0x%x\n", AMD_PMC_SMU_INDEX_ADDRESS); dev_err(dev->dev, "error writing to 0x%x\n", AMD_PMC_SMU_INDEX_ADDRESS);
pci_dev_put(rdev);
return pcibios_err_to_errno(err); return pcibios_err_to_errno(err);
} }
err = pci_read_config_dword(rdev, AMD_PMC_SMU_INDEX_DATA, &val); err = pci_read_config_dword(rdev, AMD_PMC_SMU_INDEX_DATA, &val);
if (err) if (err) {
pci_dev_put(rdev);
return pcibios_err_to_errno(err); return pcibios_err_to_errno(err);
}
base_addr_hi = val & AMD_PMC_BASE_ADDR_LO_MASK; base_addr_hi = val & AMD_PMC_BASE_ADDR_LO_MASK;
pci_dev_put(rdev); pci_dev_put(rdev);
......
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