arm64: dts: fsl-ls1043a-rdb: add delay between CS and CLK signal for flash device

Based on commit d59c90a2("spi: spi-fsl-dspi: Convert
TCFQ users to XSPI FIFO mode ") and 6c1c26ec("spi:
spi-fsl-dspi: Accelerate transfers using larger word size if possible"),
on ls1043a-rdb platform, the spi work mode is changed from TCFQ
mode to XSPI mode. In order to keep the transmission sequence matches
with flash device, it is need to add delay between CS and CLK signal.
The strategy of generating delay value refers to QorIQ LS1043A
Reference Manual.
Signed-off-by: Meng Li <Meng.Li@windriver.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts

@@ -94,6 +94,8 @@ flash@0 {
 		compatible = "n25q128a13", "jedec,spi-nor";  /* 16MB */
 		reg = <0>;
 		spi-max-frequency = <1000000>; /* input clock */
+		fsl,spi-cs-sck-delay = <100>;
+		fsl,spi-sck-cs-delay = <100>;
 	};
 
 	slic@2 {