Commit 74e27871 authored by Philipp Hortmann's avatar Philipp Hortmann Committed by Greg Kroah-Hartman
parent d93f09e6
...@@ -28,9 +28,7 @@ ...@@ -28,9 +28,7 @@
#define RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS 26 #define RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS 26
#define RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS 15 #define RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS 15
#define RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS 15 #define RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS 15
#define RTL8723B_TRANS_SUS_TO_CARDEMU_STEPS 15
#define RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS 15 #define RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS 15
#define RTL8723B_TRANS_PDN_TO_CARDEMU_STEPS 15
#define RTL8723B_TRANS_ACT_TO_LPS_STEPS 15 #define RTL8723B_TRANS_ACT_TO_LPS_STEPS 15
#define RTL8723B_TRANS_LPS_TO_ACT_STEPS 15 #define RTL8723B_TRANS_LPS_TO_ACT_STEPS 15
#define RTL8723B_TRANS_ACT_TO_SWLPS_STEPS 22 #define RTL8723B_TRANS_ACT_TO_SWLPS_STEPS 22
...@@ -128,11 +126,6 @@ ...@@ -128,11 +126,6 @@
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/
#define RTL8723B_TRANS_PDN_TO_CARDEMU \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/
#define RTL8723B_TRANS_ACT_TO_LPS \ #define RTL8723B_TRANS_ACT_TO_LPS \
/* format */ \ /* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
......
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