Commit 7627a0ed authored by Mario Limonciello's avatar Mario Limonciello Committed by Niklas Cassel

ata: ahci: Drop low power policy board type

The low power policy board type was introduced to allow systems
to get into deep states reliably.  Before it was introduced `min_power`
was causing problems for a number of drives.  New power policies
`min_power_with_partial` and `med_power_with_dipm` have been introduced
which provide a more stable baseline for systems.
Tested-by: default avatarDamien Le Moal <dlemoal@kernel.org>
Tested-by: default avatarJian-Hong Pan <jhp@endlessos.org>
Acked-by: default avatarJian-Hong Pan <jhp@endlessos.org>
Acked-by: default avatarChristoph Hellwig <hch@lst.de>
Reviewed-by: default avatarDamien Le Moal <dlemoal@kernel.org>
Reviewed-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Reviewed-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Suggested-by: default avatarChristoph Hellwig <hch@infradead.org>
Signed-off-by: default avatarMario Limonciello <mario.limonciello@amd.com>
[cassel: rebase patch and fix trivial conflicts]
Signed-off-by: default avatarNiklas Cassel <cassel@kernel.org>
parent ae1f3db0
...@@ -116,15 +116,14 @@ config SATA_AHCI ...@@ -116,15 +116,14 @@ config SATA_AHCI
If unsure, say N. If unsure, say N.
config SATA_MOBILE_LPM_POLICY config SATA_MOBILE_LPM_POLICY
int "Default SATA Link Power Management policy for low power chipsets" int "Default SATA Link Power Management policy"
range 0 4 range 0 4
default 0 default 0
depends on SATA_AHCI depends on SATA_AHCI
help help
Select the Default SATA Link Power Management (LPM) policy to use Select the Default SATA Link Power Management (LPM) policy to use
for chipsets / "South Bridges" supporting low-power modes. Such for chipsets / "South Bridges" supporting low-power modes. Such
chipsets are typically found on most laptops but desktops and chipsets are ubiquitous across laptops, desktops and servers.
servers now also widely use chipsets supporting low power modes.
The value set has the following meanings: The value set has the following meanings:
0 => Keep firmware settings 0 => Keep firmware settings
......
This diff is collapsed.
...@@ -241,13 +241,10 @@ enum { ...@@ -241,13 +241,10 @@ enum {
AHCI_HFLAG_YES_ALPM = BIT(23), /* force ALPM cap on */ AHCI_HFLAG_YES_ALPM = BIT(23), /* force ALPM cap on */
AHCI_HFLAG_NO_WRITE_TO_RO = BIT(24), /* don't write to read AHCI_HFLAG_NO_WRITE_TO_RO = BIT(24), /* don't write to read
only registers */ only registers */
AHCI_HFLAG_USE_LPM_POLICY = BIT(25), /* chipset that should use AHCI_HFLAG_SUSPEND_PHYS = BIT(25), /* handle PHYs during
SATA_MOBILE_LPM_POLICY
as default lpm_policy */
AHCI_HFLAG_SUSPEND_PHYS = BIT(26), /* handle PHYs during
suspend/resume */ suspend/resume */
AHCI_HFLAG_NO_SXS = BIT(28), /* SXS not supported */ AHCI_HFLAG_NO_SXS = BIT(26), /* SXS not supported */
AHCI_HFLAG_43BIT_ONLY = BIT(29), /* 43bit DMA addr limit */ AHCI_HFLAG_43BIT_ONLY = BIT(27), /* 43bit DMA addr limit */
/* ap->flags bits */ /* ap->flags bits */
......
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