Commit 76dcd939 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'drm-fixes-for-4.8-rc3' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
 "Pretty quiet so far:

   - a few amdgpu/radeon fixup for pcie pm changes
   - a couple of amdgpu fixes
   - some build fixes
   - printk fix"

* tag 'drm-fixes-for-4.8-rc3' of git://people.freedesktop.org/~airlied/linux:
  drm/amdgpu: Change GART offset to 64-bit
  drm/mediatek: add ARM_SMCCC dependency
  drm/mediatek: add CONFIG_OF dependency
  drm/mediatek: add COMMON_CLK dependency
  drm/amdgpu: Fix memory trashing if UVD ring test fails
  drm/amdgpu: fix vm init error path
  drm/amdkfd: print doorbell offset as a hex value
  Revert "drm/radeon: work around lack of upstream ACPI support for D3cold"
  Revert "drm/amdgpu: work around lack of upstream ACPI support for D3cold"
parents 184ca823 91d62d9f
...@@ -646,9 +646,9 @@ int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev); ...@@ -646,9 +646,9 @@ int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev);
void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev); void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev);
int amdgpu_gart_init(struct amdgpu_device *adev); int amdgpu_gart_init(struct amdgpu_device *adev);
void amdgpu_gart_fini(struct amdgpu_device *adev); void amdgpu_gart_fini(struct amdgpu_device *adev);
void amdgpu_gart_unbind(struct amdgpu_device *adev, unsigned offset, void amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
int pages); int pages);
int amdgpu_gart_bind(struct amdgpu_device *adev, unsigned offset, int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
int pages, struct page **pagelist, int pages, struct page **pagelist,
dma_addr_t *dma_addr, uint32_t flags); dma_addr_t *dma_addr, uint32_t flags);
......
...@@ -200,16 +200,7 @@ static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx) ...@@ -200,16 +200,7 @@ static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx)
atpx->is_hybrid = false; atpx->is_hybrid = false;
if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) { if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
printk("ATPX Hybrid Graphics\n"); printk("ATPX Hybrid Graphics\n");
#if 1
/* This is a temporary hack until the D3 cold support
* makes it upstream. The ATPX power_control method seems
* to still work on even if the system should be using
* the new standardized hybrid D3 cold ACPI interface.
*/
atpx->functions.power_cntl = true;
#else
atpx->functions.power_cntl = false; atpx->functions.power_cntl = false;
#endif
atpx->is_hybrid = true; atpx->is_hybrid = true;
} }
......
...@@ -221,7 +221,7 @@ void amdgpu_gart_table_vram_free(struct amdgpu_device *adev) ...@@ -221,7 +221,7 @@ void amdgpu_gart_table_vram_free(struct amdgpu_device *adev)
* Unbinds the requested pages from the gart page table and * Unbinds the requested pages from the gart page table and
* replaces them with the dummy page (all asics). * replaces them with the dummy page (all asics).
*/ */
void amdgpu_gart_unbind(struct amdgpu_device *adev, unsigned offset, void amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
int pages) int pages)
{ {
unsigned t; unsigned t;
...@@ -268,7 +268,7 @@ void amdgpu_gart_unbind(struct amdgpu_device *adev, unsigned offset, ...@@ -268,7 +268,7 @@ void amdgpu_gart_unbind(struct amdgpu_device *adev, unsigned offset,
* (all asics). * (all asics).
* Returns 0 for success, -EINVAL for failure. * Returns 0 for success, -EINVAL for failure.
*/ */
int amdgpu_gart_bind(struct amdgpu_device *adev, unsigned offset, int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
int pages, struct page **pagelist, dma_addr_t *dma_addr, int pages, struct page **pagelist, dma_addr_t *dma_addr,
uint32_t flags) uint32_t flags)
{ {
......
...@@ -1187,7 +1187,8 @@ int amdgpu_uvd_ring_test_ib(struct amdgpu_ring *ring, long timeout) ...@@ -1187,7 +1187,8 @@ int amdgpu_uvd_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = 0; r = 0;
} }
error:
fence_put(fence); fence_put(fence);
error:
return r; return r;
} }
...@@ -1535,7 +1535,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm) ...@@ -1535,7 +1535,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm)
r = amd_sched_entity_init(&ring->sched, &vm->entity, r = amd_sched_entity_init(&ring->sched, &vm->entity,
rq, amdgpu_sched_jobs); rq, amdgpu_sched_jobs);
if (r) if (r)
return r; goto err;
vm->page_directory_fence = NULL; vm->page_directory_fence = NULL;
...@@ -1565,6 +1565,9 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm) ...@@ -1565,6 +1565,9 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm)
error_free_sched_entity: error_free_sched_entity:
amd_sched_entity_fini(&ring->sched, &vm->entity); amd_sched_entity_fini(&ring->sched, &vm->entity);
err:
drm_free_large(vm->page_tables);
return r; return r;
} }
......
...@@ -184,7 +184,7 @@ u32 __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd, ...@@ -184,7 +184,7 @@ u32 __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd,
sizeof(u32)) + inx; sizeof(u32)) + inx;
pr_debug("kfd: get kernel queue doorbell\n" pr_debug("kfd: get kernel queue doorbell\n"
" doorbell offset == 0x%08d\n" " doorbell offset == 0x%08X\n"
" kernel address == 0x%08lX\n", " kernel address == 0x%08lX\n",
*doorbell_off, (uintptr_t)(kfd->doorbell_kernel_ptr + inx)); *doorbell_off, (uintptr_t)(kfd->doorbell_kernel_ptr + inx));
......
...@@ -2,6 +2,9 @@ config DRM_MEDIATEK ...@@ -2,6 +2,9 @@ config DRM_MEDIATEK
tristate "DRM Support for Mediatek SoCs" tristate "DRM Support for Mediatek SoCs"
depends on DRM depends on DRM
depends on ARCH_MEDIATEK || (ARM && COMPILE_TEST) depends on ARCH_MEDIATEK || (ARM && COMPILE_TEST)
depends on COMMON_CLK
depends on HAVE_ARM_SMCCC
depends on OF
select DRM_GEM_CMA_HELPER select DRM_GEM_CMA_HELPER
select DRM_KMS_HELPER select DRM_KMS_HELPER
select DRM_MIPI_DSI select DRM_MIPI_DSI
......
...@@ -198,16 +198,7 @@ static int radeon_atpx_validate(struct radeon_atpx *atpx) ...@@ -198,16 +198,7 @@ static int radeon_atpx_validate(struct radeon_atpx *atpx)
atpx->is_hybrid = false; atpx->is_hybrid = false;
if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) { if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
printk("ATPX Hybrid Graphics\n"); printk("ATPX Hybrid Graphics\n");
#if 1
/* This is a temporary hack until the D3 cold support
* makes it upstream. The ATPX power_control method seems
* to still work on even if the system should be using
* the new standardized hybrid D3 cold ACPI interface.
*/
atpx->functions.power_cntl = true;
#else
atpx->functions.power_cntl = false; atpx->functions.power_cntl = false;
#endif
atpx->is_hybrid = true; atpx->is_hybrid = true;
} }
......
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