clk: renesas: r8a779f0: Fix Ethernet Switch clocks

The RSwitch2 and EtherTSN-IF clocks were accidentally mixed up.
While at it, rename them to better match the (future) documentation.

Fixes: a3b4137a ("clk: renesas: r8a779f0: Add Ethernet Switch clocks")
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/99b8b41bd2c5043c9e457862ef4bc144869eca58.1668501212.git.geert+renesas@glider.be

drivers/clk/renesas/r8a779f0-cpg-mssr.c

@@ -163,8 +163,8 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = {
 	DEF_MOD("cmt3",		913,	R8A779F0_CLK_R),
 	DEF_MOD("pfc0",		915,	R8A779F0_CLK_CL16M),
 	DEF_MOD("tsc",		919,	R8A779F0_CLK_CL16M),
-	DEF_MOD("tsn",		1505,	R8A779F0_CLK_S0D2_HSC),
-	DEF_MOD("rsw",		1506,	R8A779F0_CLK_RSW2),
+	DEF_MOD("rswitch2",	1505,	R8A779F0_CLK_RSW2),
+	DEF_MOD("ether-serdes",	1506,	R8A779F0_CLK_S0D2_HSC),
 	DEF_MOD("ufs",		1514,	R8A779F0_CLK_S0D4_HSC),
 };