Commit 789451f6 authored by Felipe Balbi's avatar Felipe Balbi

usb: dwc3: calculate the number of endpoints

hwparams2 holds the number of endpoints which
were selected during RTL generation, we can
use that on our driver.
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
parent 5f717919
...@@ -260,6 +260,17 @@ static void dwc3_event_buffers_cleanup(struct dwc3 *dwc) ...@@ -260,6 +260,17 @@ static void dwc3_event_buffers_cleanup(struct dwc3 *dwc)
} }
} }
static void dwc3_core_num_eps(struct dwc3 *dwc)
{
struct dwc3_hwparams *parms = &dwc->hwparams;
dwc->num_in_eps = DWC3_NUM_IN_EPS(parms);
dwc->num_out_eps = DWC3_NUM_EPS(parms) - dwc->num_in_eps;
dev_vdbg(dwc->dev, "found %d IN and %d OUT endpoints\n",
dwc->num_in_eps, dwc->num_out_eps);
}
static void dwc3_cache_hwparams(struct dwc3 *dwc) static void dwc3_cache_hwparams(struct dwc3 *dwc)
{ {
struct dwc3_hwparams *parms = &dwc->hwparams; struct dwc3_hwparams *parms = &dwc->hwparams;
...@@ -336,6 +347,8 @@ static int dwc3_core_init(struct dwc3 *dwc) ...@@ -336,6 +347,8 @@ static int dwc3_core_init(struct dwc3 *dwc)
if (dwc->revision < DWC3_REVISION_190A) if (dwc->revision < DWC3_REVISION_190A)
reg |= DWC3_GCTL_U2RSTECN; reg |= DWC3_GCTL_U2RSTECN;
dwc3_core_num_eps(dwc);
dwc3_writel(dwc->regs, DWC3_GCTL, reg); dwc3_writel(dwc->regs, DWC3_GCTL, reg);
return 0; return 0;
......
...@@ -575,6 +575,14 @@ struct dwc3_hwparams { ...@@ -575,6 +575,14 @@ struct dwc3_hwparams {
/* HWPARAMS1 */ /* HWPARAMS1 */
#define DWC3_NUM_INT(n) (((n) & (0x3f << 15)) >> 15) #define DWC3_NUM_INT(n) (((n) & (0x3f << 15)) >> 15)
/* HWPARAMS3 */
#define DWC3_NUM_IN_EPS_MASK (0x1f << 18)
#define DWC3_NUM_EPS_MASK (0x3f << 12)
#define DWC3_NUM_EPS(p) (((p)->hwparams3 & \
(DWC3_NUM_EPS_MASK)) >> 12)
#define DWC3_NUM_IN_EPS(p) (((p)->hwparams3 & \
(DWC3_NUM_IN_EPS_MASK)) >> 18)
/* HWPARAMS7 */ /* HWPARAMS7 */
#define DWC3_RAM1_DEPTH(n) ((n) & 0xffff) #define DWC3_RAM1_DEPTH(n) ((n) & 0xffff)
...@@ -641,6 +649,8 @@ struct dwc3_scratchpad_array { ...@@ -641,6 +649,8 @@ struct dwc3_scratchpad_array {
* @u2pel: parameter from Set SEL request. * @u2pel: parameter from Set SEL request.
* @u1sel: parameter from Set SEL request. * @u1sel: parameter from Set SEL request.
* @u1pel: parameter from Set SEL request. * @u1pel: parameter from Set SEL request.
* @num_out_eps: number of out endpoints
* @num_in_eps: number of in endpoints
* @ep0_next_event: hold the next expected event * @ep0_next_event: hold the next expected event
* @ep0state: state of endpoint zero * @ep0state: state of endpoint zero
* @link_state: link state * @link_state: link state
...@@ -658,8 +668,10 @@ struct dwc3 { ...@@ -658,8 +668,10 @@ struct dwc3 {
dma_addr_t ep0_trb_addr; dma_addr_t ep0_trb_addr;
dma_addr_t ep0_bounce_addr; dma_addr_t ep0_bounce_addr;
struct dwc3_request ep0_usb_req; struct dwc3_request ep0_usb_req;
/* device lock */ /* device lock */
spinlock_t lock; spinlock_t lock;
struct device *dev; struct device *dev;
struct platform_device *xhci; struct platform_device *xhci;
...@@ -727,6 +739,9 @@ struct dwc3 { ...@@ -727,6 +739,9 @@ struct dwc3 {
u8 speed; u8 speed;
u8 num_out_eps;
u8 num_in_eps;
void *mem; void *mem;
struct dwc3_hwparams hwparams; struct dwc3_hwparams hwparams;
......
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