Commit 79284ade authored by Michal Kalderon's avatar Michal Kalderon Committed by David S. Miller

qed: Add llh ppfid interface and 100g support for offload protocols

This patch refactors the current llh implementation. It exposes a hw
resource called ppfid (port-pfid) and implements an API for configuring
the resource. Default configuration which was used until now limited
the number of filters per PF and did not support engine affinity per
protocol. The new API enables allocating more filter rules per PF and
enables affinitizing protocol packets to a certain engine which
enables full 100g protocol offload support.
Signed-off-by: default avatarAriel Elior <ariel.elior@marvell.com>
Signed-off-by: default avatarMichal Kalderon <michal.kalderon@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 83bf76e3
...@@ -140,6 +140,7 @@ struct qed_cxt_mngr; ...@@ -140,6 +140,7 @@ struct qed_cxt_mngr;
struct qed_sb_sp_info; struct qed_sb_sp_info;
struct qed_ll2_info; struct qed_ll2_info;
struct qed_mcp_info; struct qed_mcp_info;
struct qed_llh_info;
struct qed_rt_data { struct qed_rt_data {
u32 *init_val; u32 *init_val;
...@@ -741,6 +742,7 @@ struct qed_dev { ...@@ -741,6 +742,7 @@ struct qed_dev {
#define QED_DEV_ID_MASK 0xff00 #define QED_DEV_ID_MASK 0xff00
#define QED_DEV_ID_MASK_BB 0x1600 #define QED_DEV_ID_MASK_BB 0x1600
#define QED_DEV_ID_MASK_AH 0x8000 #define QED_DEV_ID_MASK_AH 0x8000
#define QED_IS_E4(dev) (QED_IS_BB(dev) || QED_IS_AH(dev))
u16 chip_num; u16 chip_num;
#define CHIP_NUM_MASK 0xffff #define CHIP_NUM_MASK 0xffff
...@@ -801,6 +803,11 @@ struct qed_dev { ...@@ -801,6 +803,11 @@ struct qed_dev {
u8 num_hwfns; u8 num_hwfns;
struct qed_hwfn hwfns[MAX_HWFNS_PER_DEVICE]; struct qed_hwfn hwfns[MAX_HWFNS_PER_DEVICE];
/* Engine affinity */
u8 l2_affin_hint;
u8 fir_affin;
u8 iwarp_affin;
/* SRIOV */ /* SRIOV */
struct qed_hw_sriov_info *p_iov_info; struct qed_hw_sriov_info *p_iov_info;
#define IS_QED_SRIOV(cdev) (!!(cdev)->p_iov_info) #define IS_QED_SRIOV(cdev) (!!(cdev)->p_iov_info)
...@@ -815,6 +822,10 @@ struct qed_dev { ...@@ -815,6 +822,10 @@ struct qed_dev {
/* Recovery */ /* Recovery */
bool recov_in_prog; bool recov_in_prog;
/* LLH info */
u8 ppfid_bitmap;
struct qed_llh_info *p_llh_info;
/* Linux specific here */ /* Linux specific here */
struct qede_dev *edev; struct qede_dev *edev;
struct pci_dev *pdev; struct pci_dev *pdev;
...@@ -904,6 +915,14 @@ void qed_set_fw_mac_addr(__le16 *fw_msb, ...@@ -904,6 +915,14 @@ void qed_set_fw_mac_addr(__le16 *fw_msb,
__le16 *fw_mid, __le16 *fw_lsb, u8 *mac); __le16 *fw_mid, __le16 *fw_lsb, u8 *mac);
#define QED_LEADING_HWFN(dev) (&dev->hwfns[0]) #define QED_LEADING_HWFN(dev) (&dev->hwfns[0])
#define QED_IS_CMT(dev) ((dev)->num_hwfns > 1)
/* Macros for getting the engine-affinitized hwfn (FIR: fcoe,iscsi,roce) */
#define QED_FIR_AFFIN_HWFN(dev) (&(dev)->hwfns[dev->fir_affin])
#define QED_IWARP_AFFIN_HWFN(dev) (&(dev)->hwfns[dev->iwarp_affin])
#define QED_AFFIN_HWFN(dev) \
(QED_IS_IWARP_PERSONALITY(QED_LEADING_HWFN(dev)) ? \
QED_IWARP_AFFIN_HWFN(dev) : QED_FIR_AFFIN_HWFN(dev))
#define QED_AFFIN_HWFN_IDX(dev) (IS_LEAD_HWFN(QED_AFFIN_HWFN(dev)) ? 0 : 1)
/* Flags for indication of required queues */ /* Flags for indication of required queues */
#define PQ_FLAGS_RLS (BIT(0)) #define PQ_FLAGS_RLS (BIT(0))
...@@ -923,8 +942,6 @@ u16 qed_get_cm_pq_idx_vf(struct qed_hwfn *p_hwfn, u16 vf); ...@@ -923,8 +942,6 @@ u16 qed_get_cm_pq_idx_vf(struct qed_hwfn *p_hwfn, u16 vf);
u16 qed_get_cm_pq_idx_ofld_mtc(struct qed_hwfn *p_hwfn, u8 tc); u16 qed_get_cm_pq_idx_ofld_mtc(struct qed_hwfn *p_hwfn, u8 tc);
u16 qed_get_cm_pq_idx_llt_mtc(struct qed_hwfn *p_hwfn, u8 tc); u16 qed_get_cm_pq_idx_llt_mtc(struct qed_hwfn *p_hwfn, u8 tc);
#define QED_LEADING_HWFN(dev) (&dev->hwfns[0])
/* doorbell recovery mechanism */ /* doorbell recovery mechanism */
void qed_db_recovery_dp(struct qed_hwfn *p_hwfn); void qed_db_recovery_dp(struct qed_hwfn *p_hwfn);
void qed_db_recovery_execute(struct qed_hwfn *p_hwfn); void qed_db_recovery_execute(struct qed_hwfn *p_hwfn);
......
This diff is collapsed.
...@@ -374,26 +374,66 @@ int qed_fw_rss_eng(struct qed_hwfn *p_hwfn, ...@@ -374,26 +374,66 @@ int qed_fw_rss_eng(struct qed_hwfn *p_hwfn,
u8 *dst_id); u8 *dst_id);
/** /**
* @brief qed_llh_add_mac_filter - configures a MAC filter in llh * @brief qed_llh_get_num_ppfid - Return the allocated number of LLH filter
* banks that are allocated to the PF.
* *
* @param p_hwfn * @param cdev
* @param p_ptt *
* @param p_filter - MAC to add * @return u8 - Number of LLH filter banks
*/ */
int qed_llh_add_mac_filter(struct qed_hwfn *p_hwfn, u8 qed_llh_get_num_ppfid(struct qed_dev *cdev);
struct qed_ptt *p_ptt, u8 *p_filter);
enum qed_eng {
QED_ENG0,
QED_ENG1,
QED_BOTH_ENG,
};
/** /**
* @brief qed_llh_remove_mac_filter - removes a MAC filter from llh * @brief qed_llh_set_ppfid_affinity - Set the engine affinity for the given
* LLH filter bank.
*
* @param cdev
* @param ppfid - relative within the allocated ppfids ('0' is the default one).
* @param eng
*
* @return int
*/
int qed_llh_set_ppfid_affinity(struct qed_dev *cdev,
u8 ppfid, enum qed_eng eng);
/**
* @brief qed_llh_set_roce_affinity - Set the RoCE engine affinity
*
* @param cdev
* @param eng
*
* @return int
*/
int qed_llh_set_roce_affinity(struct qed_dev *cdev, enum qed_eng eng);
/**
* @brief qed_llh_add_mac_filter - Add a LLH MAC filter into the given filter
* bank.
*
* @param cdev
* @param ppfid - relative within the allocated ppfids ('0' is the default one).
* @param mac_addr - MAC to add
*/
int qed_llh_add_mac_filter(struct qed_dev *cdev,
u8 ppfid, u8 mac_addr[ETH_ALEN]);
/**
* @brief qed_llh_remove_mac_filter - Remove a LLH MAC filter from the given
* filter bank.
* *
* @param p_hwfn
* @param p_ptt * @param p_ptt
* @param p_filter - MAC to remove * @param p_filter - MAC to remove
*/ */
void qed_llh_remove_mac_filter(struct qed_hwfn *p_hwfn, void qed_llh_remove_mac_filter(struct qed_dev *cdev,
struct qed_ptt *p_ptt, u8 *p_filter); u8 ppfid, u8 mac_addr[ETH_ALEN]);
enum qed_llh_port_filter_type_t { enum qed_llh_prot_filter_type_t {
QED_LLH_FILTER_ETHERTYPE, QED_LLH_FILTER_ETHERTYPE,
QED_LLH_FILTER_TCP_SRC_PORT, QED_LLH_FILTER_TCP_SRC_PORT,
QED_LLH_FILTER_TCP_DEST_PORT, QED_LLH_FILTER_TCP_DEST_PORT,
...@@ -404,36 +444,37 @@ enum qed_llh_port_filter_type_t { ...@@ -404,36 +444,37 @@ enum qed_llh_port_filter_type_t {
}; };
/** /**
* @brief qed_llh_add_protocol_filter - configures a protocol filter in llh * @brief qed_llh_add_protocol_filter - Add a LLH protocol filter into the
* given filter bank.
* *
* @param p_hwfn * @param cdev
* @param p_ptt * @param ppfid - relative within the allocated ppfids ('0' is the default one).
* @param type - type of filters and comparing
* @param source_port_or_eth_type - source port or ethertype to add * @param source_port_or_eth_type - source port or ethertype to add
* @param dest_port - destination port to add * @param dest_port - destination port to add
* @param type - type of filters and comparing * @param type - type of filters and comparing
*/ */
int int
qed_llh_add_protocol_filter(struct qed_hwfn *p_hwfn, qed_llh_add_protocol_filter(struct qed_dev *cdev,
struct qed_ptt *p_ptt, u8 ppfid,
u16 source_port_or_eth_type, enum qed_llh_prot_filter_type_t type,
u16 dest_port, u16 source_port_or_eth_type, u16 dest_port);
enum qed_llh_port_filter_type_t type);
/** /**
* @brief qed_llh_remove_protocol_filter - remove a protocol filter in llh * @brief qed_llh_remove_protocol_filter - Remove a LLH protocol filter from
* the given filter bank.
* *
* @param p_hwfn * @param cdev
* @param p_ptt * @param ppfid - relative within the allocated ppfids ('0' is the default one).
* @param type - type of filters and comparing
* @param source_port_or_eth_type - source port or ethertype to add * @param source_port_or_eth_type - source port or ethertype to add
* @param dest_port - destination port to add * @param dest_port - destination port to add
* @param type - type of filters and comparing
*/ */
void void
qed_llh_remove_protocol_filter(struct qed_hwfn *p_hwfn, qed_llh_remove_protocol_filter(struct qed_dev *cdev,
struct qed_ptt *p_ptt, u8 ppfid,
u16 source_port_or_eth_type, enum qed_llh_prot_filter_type_t type,
u16 dest_port, u16 source_port_or_eth_type, u16 dest_port);
enum qed_llh_port_filter_type_t type);
/** /**
* *@brief Cleanup of previous driver remains prior to load * *@brief Cleanup of previous driver remains prior to load
......
...@@ -12612,8 +12612,10 @@ struct public_drv_mb { ...@@ -12612,8 +12612,10 @@ struct public_drv_mb {
#define DRV_MSG_CODE_BIST_TEST 0x001e0000 #define DRV_MSG_CODE_BIST_TEST 0x001e0000
#define DRV_MSG_CODE_SET_LED_MODE 0x00200000 #define DRV_MSG_CODE_SET_LED_MODE 0x00200000
#define DRV_MSG_CODE_RESOURCE_CMD 0x00230000 #define DRV_MSG_CODE_RESOURCE_CMD 0x00230000
#define DRV_MSG_CODE_GET_TLV_DONE 0x002f0000 #define DRV_MSG_CODE_GET_TLV_DONE 0x002f0000
#define DRV_MSG_CODE_GET_ENGINE_CONFIG 0x00370000
#define DRV_MSG_CODE_GET_PPFID_BITMAP 0x43000000
#define RESOURCE_CMD_REQ_RESC_MASK 0x0000001F #define RESOURCE_CMD_REQ_RESC_MASK 0x0000001F
#define RESOURCE_CMD_REQ_RESC_SHIFT 0 #define RESOURCE_CMD_REQ_RESC_SHIFT 0
...@@ -12802,6 +12804,18 @@ struct public_drv_mb { ...@@ -12802,6 +12804,18 @@ struct public_drv_mb {
#define FW_MB_PARAM_LOAD_DONE_DID_EFUSE_ERROR (1 << 0) #define FW_MB_PARAM_LOAD_DONE_DID_EFUSE_ERROR (1 << 0)
#define FW_MB_PARAM_ENG_CFG_FIR_AFFIN_VALID_MASK 0x00000001
#define FW_MB_PARAM_ENG_CFG_FIR_AFFIN_VALID_SHIFT 0
#define FW_MB_PARAM_ENG_CFG_FIR_AFFIN_VALUE_MASK 0x00000002
#define FW_MB_PARAM_ENG_CFG_FIR_AFFIN_VALUE_SHIFT 1
#define FW_MB_PARAM_ENG_CFG_L2_AFFIN_VALID_MASK 0x00000004
#define FW_MB_PARAM_ENG_CFG_L2_AFFIN_VALID_SHIFT 2
#define FW_MB_PARAM_ENG_CFG_L2_AFFIN_VALUE_MASK 0x00000008
#define FW_MB_PARAM_ENG_CFG_L2_AFFIN_VALUE_SHIFT 3
#define FW_MB_PARAM_PPFID_BITMAP_MASK 0xFF
#define FW_MB_PARAM_PPFID_BITMAP_SHIFT 0
u32 drv_pulse_mb; u32 drv_pulse_mb;
#define DRV_PULSE_SEQ_MASK 0x00007fff #define DRV_PULSE_SEQ_MASK 0x00007fff
#define DRV_PULSE_SYSTEM_TIME_MASK 0xffff0000 #define DRV_PULSE_SYSTEM_TIME_MASK 0xffff0000
......
...@@ -2528,7 +2528,7 @@ qed_iwarp_ll2_slowpath(void *cxt, ...@@ -2528,7 +2528,7 @@ qed_iwarp_ll2_slowpath(void *cxt,
memset(fpdu, 0, sizeof(*fpdu)); memset(fpdu, 0, sizeof(*fpdu));
} }
static int qed_iwarp_ll2_stop(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) static int qed_iwarp_ll2_stop(struct qed_hwfn *p_hwfn)
{ {
struct qed_iwarp_info *iwarp_info = &p_hwfn->p_rdma_info->iwarp; struct qed_iwarp_info *iwarp_info = &p_hwfn->p_rdma_info->iwarp;
int rc = 0; int rc = 0;
...@@ -2563,8 +2563,9 @@ static int qed_iwarp_ll2_stop(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) ...@@ -2563,8 +2563,9 @@ static int qed_iwarp_ll2_stop(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
iwarp_info->ll2_mpa_handle = QED_IWARP_HANDLE_INVAL; iwarp_info->ll2_mpa_handle = QED_IWARP_HANDLE_INVAL;
} }
qed_llh_remove_mac_filter(p_hwfn, qed_llh_remove_mac_filter(p_hwfn->cdev, 0,
p_ptt, p_hwfn->p_rdma_info->iwarp.mac_addr); p_hwfn->p_rdma_info->iwarp.mac_addr);
return rc; return rc;
} }
...@@ -2608,8 +2609,7 @@ qed_iwarp_ll2_alloc_buffers(struct qed_hwfn *p_hwfn, ...@@ -2608,8 +2609,7 @@ qed_iwarp_ll2_alloc_buffers(struct qed_hwfn *p_hwfn,
static int static int
qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn, qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn,
struct qed_rdma_start_in_params *params, struct qed_rdma_start_in_params *params)
struct qed_ptt *p_ptt)
{ {
struct qed_iwarp_info *iwarp_info; struct qed_iwarp_info *iwarp_info;
struct qed_ll2_acquire_data data; struct qed_ll2_acquire_data data;
...@@ -2628,7 +2628,7 @@ qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn, ...@@ -2628,7 +2628,7 @@ qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn,
ether_addr_copy(p_hwfn->p_rdma_info->iwarp.mac_addr, params->mac_addr); ether_addr_copy(p_hwfn->p_rdma_info->iwarp.mac_addr, params->mac_addr);
rc = qed_llh_add_mac_filter(p_hwfn, p_ptt, params->mac_addr); rc = qed_llh_add_mac_filter(p_hwfn->cdev, 0, params->mac_addr);
if (rc) if (rc)
return rc; return rc;
...@@ -2653,7 +2653,7 @@ qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn, ...@@ -2653,7 +2653,7 @@ qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn,
rc = qed_ll2_acquire_connection(p_hwfn, &data); rc = qed_ll2_acquire_connection(p_hwfn, &data);
if (rc) { if (rc) {
DP_NOTICE(p_hwfn, "Failed to acquire LL2 connection\n"); DP_NOTICE(p_hwfn, "Failed to acquire LL2 connection\n");
qed_llh_remove_mac_filter(p_hwfn, p_ptt, params->mac_addr); qed_llh_remove_mac_filter(p_hwfn->cdev, 0, params->mac_addr);
return rc; return rc;
} }
...@@ -2757,12 +2757,12 @@ qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn, ...@@ -2757,12 +2757,12 @@ qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn,
&iwarp_info->mpa_buf_list); &iwarp_info->mpa_buf_list);
return rc; return rc;
err: err:
qed_iwarp_ll2_stop(p_hwfn, p_ptt); qed_iwarp_ll2_stop(p_hwfn);
return rc; return rc;
} }
int qed_iwarp_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, int qed_iwarp_setup(struct qed_hwfn *p_hwfn,
struct qed_rdma_start_in_params *params) struct qed_rdma_start_in_params *params)
{ {
struct qed_iwarp_info *iwarp_info; struct qed_iwarp_info *iwarp_info;
...@@ -2794,10 +2794,10 @@ int qed_iwarp_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, ...@@ -2794,10 +2794,10 @@ int qed_iwarp_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
qed_iwarp_async_event); qed_iwarp_async_event);
qed_ooo_setup(p_hwfn); qed_ooo_setup(p_hwfn);
return qed_iwarp_ll2_start(p_hwfn, params, p_ptt); return qed_iwarp_ll2_start(p_hwfn, params);
} }
int qed_iwarp_stop(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) int qed_iwarp_stop(struct qed_hwfn *p_hwfn)
{ {
int rc; int rc;
...@@ -2808,7 +2808,7 @@ int qed_iwarp_stop(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) ...@@ -2808,7 +2808,7 @@ int qed_iwarp_stop(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
qed_spq_unregister_async_cb(p_hwfn, PROTOCOLID_IWARP); qed_spq_unregister_async_cb(p_hwfn, PROTOCOLID_IWARP);
return qed_iwarp_ll2_stop(p_hwfn, p_ptt); return qed_iwarp_ll2_stop(p_hwfn);
} }
static void qed_iwarp_qp_in_error(struct qed_hwfn *p_hwfn, static void qed_iwarp_qp_in_error(struct qed_hwfn *p_hwfn,
......
...@@ -183,13 +183,13 @@ struct qed_iwarp_listener { ...@@ -183,13 +183,13 @@ struct qed_iwarp_listener {
int qed_iwarp_alloc(struct qed_hwfn *p_hwfn); int qed_iwarp_alloc(struct qed_hwfn *p_hwfn);
int qed_iwarp_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, int qed_iwarp_setup(struct qed_hwfn *p_hwfn,
struct qed_rdma_start_in_params *params); struct qed_rdma_start_in_params *params);
void qed_iwarp_init_fw_ramrod(struct qed_hwfn *p_hwfn, void qed_iwarp_init_fw_ramrod(struct qed_hwfn *p_hwfn,
struct iwarp_init_func_ramrod_data *p_ramrod); struct iwarp_init_func_ramrod_data *p_ramrod);
int qed_iwarp_stop(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); int qed_iwarp_stop(struct qed_hwfn *p_hwfn);
void qed_iwarp_resc_free(struct qed_hwfn *p_hwfn); void qed_iwarp_resc_free(struct qed_hwfn *p_hwfn);
......
...@@ -1574,12 +1574,12 @@ int qed_ll2_establish_connection(void *cxt, u8 connection_handle) ...@@ -1574,12 +1574,12 @@ int qed_ll2_establish_connection(void *cxt, u8 connection_handle)
if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
qed_llh_add_protocol_filter(p_hwfn, p_ptt, qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
ETH_P_FCOE, 0, QED_LLH_FILTER_ETHERTYPE,
QED_LLH_FILTER_ETHERTYPE); ETH_P_FCOE, 0);
qed_llh_add_protocol_filter(p_hwfn, p_ptt, qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
ETH_P_FIP, 0, QED_LLH_FILTER_ETHERTYPE,
QED_LLH_FILTER_ETHERTYPE); ETH_P_FIP, 0);
} }
out: out:
...@@ -1980,12 +1980,12 @@ int qed_ll2_terminate_connection(void *cxt, u8 connection_handle) ...@@ -1980,12 +1980,12 @@ int qed_ll2_terminate_connection(void *cxt, u8 connection_handle)
if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
qed_llh_remove_protocol_filter(p_hwfn, p_ptt, qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
ETH_P_FCOE, 0, QED_LLH_FILTER_ETHERTYPE,
QED_LLH_FILTER_ETHERTYPE); ETH_P_FCOE, 0);
qed_llh_remove_protocol_filter(p_hwfn, p_ptt, qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
ETH_P_FIP, 0, QED_LLH_FILTER_ETHERTYPE,
QED_LLH_FILTER_ETHERTYPE); ETH_P_FIP, 0);
} }
out: out:
...@@ -2386,8 +2386,6 @@ static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params) ...@@ -2386,8 +2386,6 @@ static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
goto release_terminate; goto release_terminate;
} }
rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
params->ll2_mac_address);
qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
if (rc) { if (rc) {
DP_ERR(cdev, "Failed to allocate LLH filter\n"); DP_ERR(cdev, "Failed to allocate LLH filter\n");
...@@ -2423,8 +2421,6 @@ static int qed_ll2_stop(struct qed_dev *cdev) ...@@ -2423,8 +2421,6 @@ static int qed_ll2_stop(struct qed_dev *cdev)
goto fail; goto fail;
} }
qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
cdev->ll2_mac_address);
qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt); qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
eth_zero_addr(cdev->ll2_mac_address); eth_zero_addr(cdev->ll2_mac_address);
......
...@@ -3685,3 +3685,68 @@ int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) ...@@ -3685,3 +3685,68 @@ int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
return qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_FEATURE_SUPPORT, return qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_FEATURE_SUPPORT,
features, &mcp_resp, &mcp_param); features, &mcp_resp, &mcp_param);
} }
int qed_mcp_get_engine_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
{
struct qed_mcp_mb_params mb_params = {0};
struct qed_dev *cdev = p_hwfn->cdev;
u8 fir_valid, l2_valid;
int rc;
mb_params.cmd = DRV_MSG_CODE_GET_ENGINE_CONFIG;
rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
if (rc)
return rc;
if (mb_params.mcp_resp == FW_MSG_CODE_UNSUPPORTED) {
DP_INFO(p_hwfn,
"The get_engine_config command is unsupported by the MFW\n");
return -EOPNOTSUPP;
}
fir_valid = QED_MFW_GET_FIELD(mb_params.mcp_param,
FW_MB_PARAM_ENG_CFG_FIR_AFFIN_VALID);
if (fir_valid)
cdev->fir_affin =
QED_MFW_GET_FIELD(mb_params.mcp_param,
FW_MB_PARAM_ENG_CFG_FIR_AFFIN_VALUE);
l2_valid = QED_MFW_GET_FIELD(mb_params.mcp_param,
FW_MB_PARAM_ENG_CFG_L2_AFFIN_VALID);
if (l2_valid)
cdev->l2_affin_hint =
QED_MFW_GET_FIELD(mb_params.mcp_param,
FW_MB_PARAM_ENG_CFG_L2_AFFIN_VALUE);
DP_INFO(p_hwfn,
"Engine affinity config: FIR={valid %hhd, value %hhd}, L2_hint={valid %hhd, value %hhd}\n",
fir_valid, cdev->fir_affin, l2_valid, cdev->l2_affin_hint);
return 0;
}
int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
{
struct qed_mcp_mb_params mb_params = {0};
struct qed_dev *cdev = p_hwfn->cdev;
int rc;
mb_params.cmd = DRV_MSG_CODE_GET_PPFID_BITMAP;
rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
if (rc)
return rc;
if (mb_params.mcp_resp == FW_MSG_CODE_UNSUPPORTED) {
DP_INFO(p_hwfn,
"The get_ppfid_bitmap command is unsupported by the MFW\n");
return -EOPNOTSUPP;
}
cdev->ppfid_bitmap = QED_MFW_GET_FIELD(mb_params.mcp_param,
FW_MB_PARAM_PPFID_BITMAP);
DP_VERBOSE(p_hwfn, QED_MSG_SP, "PPFID bitmap 0x%hhx\n",
cdev->ppfid_bitmap);
return 0;
}
...@@ -1186,4 +1186,20 @@ void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); ...@@ -1186,4 +1186,20 @@ void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
*/ */
int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn); int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn);
/**
* @brief Get the engine affinity configuration.
*
* @param p_hwfn
* @param p_ptt
*/
int qed_mcp_get_engine_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
/**
* @brief Get the PPFID bitmap.
*
* @param p_hwfn
* @param p_ptt
*/
int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
#endif #endif
...@@ -700,7 +700,7 @@ static int qed_rdma_setup(struct qed_hwfn *p_hwfn, ...@@ -700,7 +700,7 @@ static int qed_rdma_setup(struct qed_hwfn *p_hwfn,
return rc; return rc;
if (QED_IS_IWARP_PERSONALITY(p_hwfn)) { if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
rc = qed_iwarp_setup(p_hwfn, p_ptt, params); rc = qed_iwarp_setup(p_hwfn, params);
if (rc) if (rc)
return rc; return rc;
} else { } else {
...@@ -742,7 +742,7 @@ static int qed_rdma_stop(void *rdma_cxt) ...@@ -742,7 +742,7 @@ static int qed_rdma_stop(void *rdma_cxt)
(ll2_ethertype_en & 0xFFFE)); (ll2_ethertype_en & 0xFFFE));
if (QED_IS_IWARP_PERSONALITY(p_hwfn)) { if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
rc = qed_iwarp_stop(p_hwfn, p_ptt); rc = qed_iwarp_stop(p_hwfn);
if (rc) { if (rc) {
qed_ptt_release(p_hwfn, p_ptt); qed_ptt_release(p_hwfn, p_ptt);
return rc; return rc;
...@@ -1899,23 +1899,12 @@ static int qed_roce_ll2_set_mac_filter(struct qed_dev *cdev, ...@@ -1899,23 +1899,12 @@ static int qed_roce_ll2_set_mac_filter(struct qed_dev *cdev,
u8 *old_mac_address, u8 *old_mac_address,
u8 *new_mac_address) u8 *new_mac_address)
{ {
struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
struct qed_ptt *p_ptt;
int rc = 0; int rc = 0;
p_ptt = qed_ptt_acquire(p_hwfn);
if (!p_ptt) {
DP_ERR(cdev,
"qed roce ll2 mac filter set: failed to acquire PTT\n");
return -EINVAL;
}
if (old_mac_address) if (old_mac_address)
qed_llh_remove_mac_filter(p_hwfn, p_ptt, old_mac_address); qed_llh_remove_mac_filter(cdev, 0, old_mac_address);
if (new_mac_address) if (new_mac_address)
rc = qed_llh_add_mac_filter(p_hwfn, p_ptt, new_mac_address); rc = qed_llh_add_mac_filter(cdev, 0, new_mac_address);
qed_ptt_release(p_hwfn, p_ptt);
if (rc) if (rc)
DP_ERR(cdev, DP_ERR(cdev,
......
...@@ -254,6 +254,10 @@ ...@@ -254,6 +254,10 @@
0x500840UL 0x500840UL
#define NIG_REG_LLH_TAGMAC_DEF_PF_VECTOR \ #define NIG_REG_LLH_TAGMAC_DEF_PF_VECTOR \
0x50196cUL 0x50196cUL
#define NIG_REG_LLH_PPFID2PFID_TBL_0 \
0x501970UL
#define NIG_REG_LLH_ENG_CLS_ROCE_QP_SEL \
0x50
#define NIG_REG_LLH_CLS_TYPE_DUALMODE \ #define NIG_REG_LLH_CLS_TYPE_DUALMODE \
0x501964UL 0x501964UL
#define NIG_REG_LLH_FUNC_TAG_EN 0x5019b0UL #define NIG_REG_LLH_FUNC_TAG_EN 0x5019b0UL
...@@ -1626,6 +1630,8 @@ ...@@ -1626,6 +1630,8 @@
#define PHY_PCIE_REG_PHY1_K2_E5 \ #define PHY_PCIE_REG_PHY1_K2_E5 \
0x624000UL 0x624000UL
#define NIG_REG_ROCE_DUPLICATE_TO_HOST 0x5088f0UL #define NIG_REG_ROCE_DUPLICATE_TO_HOST 0x5088f0UL
#define NIG_REG_PPF_TO_ENGINE_SEL 0x508900UL
#define NIG_REG_PPF_TO_ENGINE_SEL_SIZE 8
#define PRS_REG_LIGHT_L2_ETHERTYPE_EN 0x1f0968UL #define PRS_REG_LIGHT_L2_ETHERTYPE_EN 0x1f0968UL
#define NIG_REG_LLH_ENG_CLS_ENG_ID_TBL 0x501b90UL #define NIG_REG_LLH_ENG_CLS_ENG_ID_TBL 0x501b90UL
#define DORQ_REG_PF_DPM_ENABLE 0x100510UL #define DORQ_REG_PF_DPM_ENABLE 0x100510UL
......
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